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From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "John Hubbard" <jhubbard@nvidia.com>
Cc: "Danilo Krummrich" <dakr@kernel.org>,
	"Timur Tabi" <ttabi@nvidia.com>,
	"Alistair Popple" <apopple@nvidia.com>,
	"Eliot Courtney" <ecourtney@nvidia.com>,
	"Zhi Wang" <zhiw@nvidia.com>, "David Airlie" <airlied@gmail.com>,
	"Simona Vetter" <simona@ffwll.ch>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Miguel Ojeda" <ojeda@kernel.org>,
	"Alex Gaynor" <alex.gaynor@gmail.com>,
	"Boqun Feng" <boqun.feng@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
	"Benno Lossin" <lossin@kernel.org>,
	"Andreas Hindborg" <a.hindborg@kernel.org>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Trevor Gross" <tmgross@umich.edu>,
	nova-gpu@lists.linux.dev, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 03/17] gpu: nova-core: add the GIN vector, leaf and subtree types
Date: Mon, 21 Sep 2026 15:34:58 +0900	[thread overview]
Message-ID: <DLKSALWQJPTD.3GB5J9TR4JUBQ@nvidia.com> (raw)
In-Reply-To: <20260912044400.677097-4-jhubbard@nvidia.com>

On Sat Sep 12, 2026 at 1:43 PM JST, John Hubbard wrote:
<...>
> diff --git a/drivers/gpu/nova-core/irq/interrupt_tree.rs b/drivers/gpu/nova-core/irq/interrupt_tree.rs
> new file mode 100644
> index 000000000000..24976a3146be
> --- /dev/null
> +++ b/drivers/gpu/nova-core/irq/interrupt_tree.rs
> @@ -0,0 +1,238 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// SPDX-FileCopyrightText: Copyright (c) 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
> +
> +//! Vector addressing in the GIN CPU interrupt tree.
> +//!
> +//! A [`GinVector`] names an interrupt source, a [`LeafIndex`] the leaf register that latches it,
> +//! a [`LeafMask`] a set of vectors within one leaf, and a [`Subtree`] one `TOP` bit. The types
> +//! keep the four from being confused with one another.
> +//!
> +//! See `Documentation/gpu/nova/core/interrupts.rst`.
> +
> +use kernel::{
> +    num::Bounded,
> +    prelude::*, //
> +};
> +
> +use crate::num;
> +
> +/// Number of vectors one leaf register carries, one per bit.
> +const VECTORS_PER_LEAF: u32 = u32::BITS;
> +
> +/// Number of leaves one subtree covers.
> +const LEAVES_PER_SUBTREE: u32 = 2;
> +
> +/// Number of subtrees the widest supported tree implements.
> +const MAX_NUM_SUBTREES: u32 = 8;
> +
> +/// Number of leaves the widest supported tree implements.
> +const MAX_NUM_LEAVES: u32 = MAX_NUM_SUBTREES * LEAVES_PER_SUBTREE;
> +
> +/// Number of bits needed to address every vector in the widest supported tree.
> +const VECTOR_BITS: u32 = (MAX_NUM_LEAVES * VECTORS_PER_LEAF).ilog2();
> +
> +/// Index of a leaf register within the widest supported tree. An 8-leaf tree implements only the
> +/// lower half of the range.
> +pub(super) type LeafIndex = Bounded<usize, { MAX_NUM_LEAVES.ilog2() }>;
> +
> +/// Number of leaves a tree implements.
> +#[derive(Clone, Copy, Debug, Eq, PartialEq)]
> +#[repr(usize)]

supernit: since we use `self as u32` below, let's make the internal
representation `u32` as well so the cast becomes an actual no-op.

> +pub(super) enum LeafCount {
> +    /// Turing through Ada.
> +    Eight = 8,
> +
> +    /// Hopper and later.
> +    Sixteen = 16,
> +}
> +
> +impl LeafCount {
> +    pub(super) const fn into_u32(self) -> u32 {
> +        // CAST: both discriminants are 16 or below.
> +        self as u32
> +    }
> +
> +    pub(super) const fn into_raw(self) -> usize {
> +        num::u32_as_usize(self.into_u32())
> +    }
> +
> +    /// Returns the number of subtrees a tree of this size implements.
> +    pub(super) const fn subtree_count(self) -> u32 {
> +        self.into_u32() / LEAVES_PER_SUBTREE
> +    }
> +
> +    /// Returns the set of every subtree a tree of this size implements.
> +    pub(super) const fn subtree_set(self) -> SubtreeSet {
> +        SubtreeSet((1u32 << self.subtree_count()) - 1)
> +    }
> +
> +    /// Returns the number of vectors a tree of this size carries.
> +    pub(super) const fn vector_count(self) -> u32 {
> +        self.into_u32() * VECTORS_PER_LEAF
> +    }
> +}
> +
> +// `VECTOR_BITS` and `LeafCount::Sixteen` are written separately. This assert keeps them in
> +// agreement about the widest supported tree.
> +static_assert!(1 << VECTOR_BITS == LeafCount::Sixteen.vector_count());
> +
> +/// Set of vectors within one leaf, one bit per vector.
> +#[derive(Clone, Copy, Debug, Eq, PartialEq)]
> +pub(super) struct LeafMask(u32);
> +
> +impl LeafMask {
> +    /// Returns the mask with every vector set.
> +    pub(super) const fn all() -> Self {
> +        Self(u32::MAX)
> +    }
> +
> +    pub(super) const fn from_raw(raw: u32) -> Self {
> +        Self(raw)
> +    }
> +
> +    pub(super) const fn into_raw(self) -> u32 {
> +        self.0
> +    }
> +
> +    pub(super) const fn is_empty(self) -> bool {
> +        self.0 == 0
> +    }
> +
> +    /// Returns whether every vector in `other` is also in this mask.
> +    pub(super) const fn contains(self, other: Self) -> bool {
> +        self.0 & other.0 == other.0
> +    }
> +}
> +
> +impl From<Bounded<u32, 32>> for LeafMask {
> +    fn from(vectors: Bounded<u32, 32>) -> Self {
> +        Self(vectors.get())
> +    }
> +}
> +
> +impl From<LeafMask> for Bounded<u32, 32> {
> +    fn from(vectors: LeafMask) -> Self {
> +        vectors.0.into()
> +    }
> +}
> +
> +/// One subtree, held as the `TOP` bit that covers it.
> +///
> +/// # Invariants
> +///
> +/// Exactly one bit is set.
> +#[derive(Clone, Copy, Debug, Eq, PartialEq)]
> +pub(super) struct Subtree(u32);
> +
> +impl Subtree {
> +    /// Returns the subtree at index `idx`.
> +    const fn new(idx: u32) -> Self {
> +        // INVARIANT: shifting `1` left leaves exactly one bit set.
> +        Self(1 << idx)
> +    }
> +
> +    /// Returns this subtree's index within the tree.
> +    pub(super) const fn index(self) -> u32 {
> +        self.0.trailing_zeros()
> +    }
> +
> +    pub(super) const fn into_raw(self) -> u32 {
> +        self.0
> +    }
> +}
> +
> +/// Set of subtrees, one bit per subtree, in the layout of the `TOP` registers.
> +#[derive(Clone, Copy, Debug, Eq, PartialEq)]
> +pub(super) struct SubtreeSet(u32);
> +
> +impl SubtreeSet {
> +    pub(super) const fn contains(self, subtree: Subtree) -> bool {
> +        self.0 & subtree.into_raw() != 0
> +    }
> +
> +    pub(super) const fn is_empty(self) -> bool {
> +        self.0 == 0
> +    }
> +
> +    pub(super) const fn intersection(self, other: Self) -> Self {
> +        Self(self.0 & other.0)
> +    }
> +
> +    /// Returns one more than the highest index in this set, or `0` for an empty set. An MSI-X
> +    /// allocation that covers the set needs this many entries.
> +    pub(super) const fn span(self) -> u32 {
> +        u32::BITS - self.0.leading_zeros()
> +    }
> +
> +    /// Returns the subtrees of this set, lowest index first.
> +    #[expect(dead_code)]
> +    pub(super) fn iter(self) -> impl Iterator<Item = Subtree> {
> +        (0..u32::BITS)
> +            .map(Subtree::new)
> +            .filter(move |subtree| self.contains(*subtree))
> +    }
> +}
> +
> +impl From<Subtree> for SubtreeSet {
> +    fn from(subtree: Subtree) -> Self {
> +        Self(subtree.into_raw())
> +    }
> +}
> +
> +impl From<Bounded<u32, 32>> for SubtreeSet {
> +    fn from(subtrees: Bounded<u32, 32>) -> Self {
> +        Self(subtrees.get())
> +    }
> +}
> +
> +impl From<SubtreeSet> for Bounded<u32, 32> {
> +    fn from(subtrees: SubtreeSet) -> Self {
> +        subtrees.0.into()
> +    }
> +}
> +
> +/// A GIN interrupt vector, bounded to the widest tree any supported part implements.

"part" is new vocabulary and might be confusing to the reader. "Chipset"
or "variant" would be better imo.

> +#[derive(Clone, Copy, Debug, Eq, PartialEq)]
> +pub(super) struct GinVector(Bounded<u32, VECTOR_BITS>);
> +
> +impl GinVector {
> +    /// Returns vector number `VECTOR`.
> +    ///
> +    /// Fails to compile if `VECTOR` is beyond the widest supported tree.
> +    pub(super) const fn new<const VECTOR: u32>() -> Self {
> +        Self(Bounded::<u32, VECTOR_BITS>::new::<VECTOR>())
> +    }
> +
> +    pub(super) const fn into_raw(self) -> u32 {
> +        self.0.get()
> +    }
> +
> +    /// Returns this vector's leaf.
> +    pub(super) fn leaf_index(self) -> LeafIndex {
> +        // CALC: `self.0 / VECTORS_PER_LEAF`.
> +        self.0.shr::<{ VECTORS_PER_LEAF.ilog2() }, _>().cast()
> +    }
> +
> +    /// Returns this vector's bit within its leaf.
> +    pub(super) const fn leaf_mask(self) -> LeafMask {
> +        LeafMask(1 << (self.0.get() % VECTORS_PER_LEAF))
> +    }
> +
> +    /// Returns this vector's subtree.
> +    pub(super) const fn subtree(self) -> Subtree {
> +        Subtree::new(self.0.get() / (VECTORS_PER_LEAF * LEAVES_PER_SUBTREE))
> +    }
> +
> +    /// Checks that a tree with `leaves` leaves implements this vector.
> +    ///
> +    /// # Errors
> +    ///
> +    /// `EINVAL` if it does not.
> +    pub(super) const fn validate(self, leaves: LeafCount) -> Result {
> +        if self.0.get() >= leaves.vector_count() {
> +            return Err(EINVAL);
> +        }
> +
> +        Ok(())

This is a simple if/else case, so:

    if self.0.get() >= leaves.vector_count() {
        Err(EINVAL)
    } else {
        Ok(())
    }

is more idiomatic.

  reply	other threads:[~2026-09-21  6:35 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-12  4:43 [PATCH v4 00/17] nova-core: GPU interrupt support and GSP event delivery John Hubbard
2026-09-12  4:43 ` [PATCH v4 01/17] rust: pci: declare IrqType and IrqTypes with impl_flags John Hubbard
2026-09-12  4:43 ` [PATCH v4 02/17] rust: sync: completion: add wait_for_completion_timeout() John Hubbard
2026-09-12  4:43 ` [PATCH v4 03/17] gpu: nova-core: add the GIN vector, leaf and subtree types John Hubbard
2026-09-21  6:34   ` Alexandre Courbot [this message]
2026-09-12  4:43 ` [PATCH v4 04/17] gpu: nova-core: add the GIN CPU interrupt tree and MSI EOI registers John Hubbard
2026-09-12  4:43 ` [PATCH v4 05/17] gpu: nova-core: add the per-architecture GIN CPU interrupt HAL John Hubbard
2026-09-12  4:43 ` [PATCH v4 06/17] gpu: nova-core: add the GIN interrupt tree and allocate its vectors John Hubbard
2026-09-21  6:35   ` Alexandre Courbot
2026-09-12  4:43 ` [PATCH v4 07/17] gpu: nova-core: wait for GFW boot in probe, not in the Gpu constructor John Hubbard
2026-09-21  6:35   ` Alexandre Courbot
2026-09-12  4:43 ` [PATCH v4 08/17] gpu: nova-core: add an interrupt delivery self-test John Hubbard
2026-09-21  6:35   ` Alexandre Courbot
2026-09-12  4:43 ` [PATCH v4 09/17] gpu: nova-core: log GSP events instead of discarding them John Hubbard
2026-09-12  4:43 ` [PATCH v4 10/17] gpu: nova-core: stop re-parsing a bad GSP message John Hubbard
2026-09-21  6:32   ` Alexandre Courbot
2026-09-12  4:43 ` [PATCH v4 11/17] gpu: nova-core: return ENOMSG for an unmatched " John Hubbard
2026-09-12  4:43 ` [PATCH v4 12/17] gpu: nova-core: bound a GSP wait by a single deadline John Hubbard
2026-09-12  4:43 ` [PATCH v4 13/17] gpu: nova-core: add a GSP message queue drain John Hubbard
2026-09-12  4:43 ` [PATCH v4 14/17] gpu: nova-core: add the falcon interrupt registers and their HAL John Hubbard
2026-09-21  6:37   ` Alexandre Courbot
2026-09-12  4:43 ` [PATCH v4 15/17] gpu: nova-core: service GSP events from the SWGEN0 interrupt John Hubbard
2026-09-21  6:46   ` Alexandre Courbot
2026-09-21  7:20     ` Alexandre Courbot
2026-09-12  4:43 ` [PATCH v4 16/17] gpu: nova-core: add KUnit tests for the interrupt tree and HALs John Hubbard
2026-09-21  6:47   ` Alexandre Courbot
2026-09-12  4:44 ` [PATCH v4 17/17] gpu: nova-core: document the GIN interrupt controller and GSP events John Hubbard
2026-09-21  6:59 ` [PATCH v4 00/17] nova-core: GPU interrupt support and GSP event delivery Alexandre Courbot

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