Re: [PATCH v4 00/17] nova-core: GPU interrupt support and GSP event delivery

["Alexandre Courbot" <acourbot@nvidia.com>]

On Sat Sep 12, 2026 at 1:43 PM JST, John Hubbard wrote:
> This series adds support for GIN, the GPU Interrupt and Notification
> unit, which is the GPU's interrupt controller, so that GSP events reach
> the driver as interrupts rather than only when the driver polls for
> them.
>
> The handler is threaded. The top half touches only GPU registers, and
> the IRQ thread drains the GSP-to-CPU message queue.
>
> This is based on drm-rust-next at d669686f8170 ("gpu: nova-core: mm: Add
> BAR1 memory management self-tests"), which now includes the PRAMIN and
> BAR1 memory management series from Joel and Eliot. The PRAMIN series
> brought the NOVA_CORE_SELFTESTS option and the assertion macros for
> probe-time hardware tests, and the interrupt self-test uses both.

The design is... halfway there. The bottom parts look mostly ok now, but
the top types are inflexible (a hardcoded set of interrupt vectors known
at probe-time, without a realistic possibility of adding/removing
handlers dynamically), confusingly separated, still not integrated into
the command queue which keeps polling by the end of the series (with the
IRQ handler only draining messages into oblivion), and in the end with
all this machinery we realistically cannot handle more than one IRQ
anyway due to the fact that dropping a top enable guard disables all the
leaves from that subtree.

It is also becoming a bit tedious to describe the architecture through
comments and I'd rather hack the bits that need fixing directly, which
would be a much more efficient use of my time. The HAL patch still doing
ad-hoc matches on the chipset despite my v3 comments consolidates that
impression.

So my hope is that we can we move forward and merge a v5 or v6 as a MVP
for the self-tests and GSP interrupt, and I'll follow-up with the fixes
I want on top.