[PATCH] mxcsr patch for i386 & x86-64

["Kamble, Nitin A" <nitin.a.kamble@intel.com>]

[-- Attachment #1: Type: text/plain, Size: 312 bytes --]

Hi Andrew, Linus,
     Attached is the patch to enable proper mxcsr register masking in
the Linux Kernel. 

Please refer to IA32 Software Developer's Manual, Volume 1, Section
11.6.6 for more details.

Thanks & Regards,
Nitin
------------------------------------------------------------------------
-

[-- Attachment #2: mxcsr_i386_x86-64_2.6.6-rc3.patch --]
[-- Type: application/octet-stream, Size: 6253 bytes --]

--- 2.6.6-rc3/arch/i386/kernel/cpu/common.c.orig	2004-05-03 18:00:03.000000000 -0700
+++ 2.6.6-rc3/arch/i386/kernel/cpu/common.c	2004-05-04 11:45:07.000000000 -0700
@@ -536,5 +536,7 @@
 	 */
 	current_thread_info()->status = 0;
 	current->used_math = 0;
+	clts();
+	mxcsr_mask_init();
 	stts();
 }
--- 2.6.6-rc3/arch/i386/kernel/i387.c.orig	2004-05-03 18:02:16.000000000 -0700
+++ 2.6.6-rc3/arch/i386/kernel/i387.c	2004-05-04 11:27:49.000000000 -0700
@@ -10,6 +10,7 @@
 
 #include <linux/config.h>
 #include <linux/sched.h>
+#include <linux/init.h>
 #include <asm/processor.h>
 #include <asm/i387.h>
 #include <asm/math_emu.h>
@@ -24,6 +25,22 @@
 #define HAVE_HWFP 1
 #endif
 
+static unsigned long common_mxcsr_mask = 0xffffffff;
+
+void mxcsr_mask_init(void)
+{
+	unsigned long mask;
+	if (!cpu_has_fxsr)
+		mask = 0x0;
+	else {
+		memset(&current->thread.i387.fxsave, 0, sizeof(struct i387_fxsave_struct));
+		asm volatile("fxsave %0" : : "m" (current->thread.i387.fxsave)); 
+		mask = current->thread.i387.fxsave.mxcsr_mask;
+		if (mask == 0UL) mask = 0x0000ffbf;
+	} 
+	common_mxcsr_mask &= mask;
+}
+
 /*
  * The _current_ task is using the FPU for the first time
  * so initialize it and set the mxcsr to its default
@@ -207,7 +224,7 @@
 void set_fpu_mxcsr( struct task_struct *tsk, unsigned short mxcsr )
 {
 	if ( cpu_has_xmm ) {
-		tsk->thread.i387.fxsave.mxcsr = (mxcsr & 0xffbf);
+		tsk->thread.i387.fxsave.mxcsr = (mxcsr & common_mxcsr_mask);
 	}
 }
 
@@ -355,8 +372,7 @@
 	clear_fpu( tsk );
 	err = __copy_from_user( &tsk->thread.i387.fxsave, &buf->_fxsr_env[0],
 				sizeof(struct i387_fxsave_struct) );
-	/* mxcsr bit 6 and 31-16 must be zero for security reasons */
-	tsk->thread.i387.fxsave.mxcsr &= 0xffbf;
+	set_fpu_mxcsr(tsk, tsk->thread.i387.fxsave.mxcsr);
 	return err ? 1 : convert_fxsr_from_user( &tsk->thread.i387.fxsave, buf );
 }
 
@@ -457,8 +473,7 @@
 		if (__copy_from_user( &tsk->thread.i387.fxsave, buf,
 				  sizeof(struct user_fxsr_struct) ))
 			ret = -EFAULT;
-		/* mxcsr bit 6 and 31-16 must be zero for security reasons */
-		tsk->thread.i387.fxsave.mxcsr &= 0xffbf;
+		set_fpu_mxcsr(tsk, tsk->thread.i387.fxsave.mxcsr);
 	} else {
 		ret = -EIO;
 	}
--- 2.6.6-rc3/arch/x86_64/kernel/i387.c.orig	2004-05-03 18:00:31.000000000 -0700
+++ 2.6.6-rc3/arch/x86_64/kernel/i387.c	2004-05-04 11:27:29.000000000 -0700
@@ -24,6 +24,23 @@
 #include <asm/ptrace.h>
 #include <asm/uaccess.h>
 
+static unsigned long common_mxcsr_mask = 0xffffffff;
+
+void set_fpu_mxcsr(struct task_struct *tsk, unsigned short mxcsr)
+{
+	tsk->thread.i387.fxsave.mxcsr = (mxcsr & common_mxcsr_mask);
+}
+
+void mxcsr_mask_init(void)
+{
+	unsigned long mask;
+	memset(&current->thread.i387.fxsave, 0, sizeof(struct i387_fxsave_struct));
+	asm volatile("fxsave %0" : : "m" (current->thread.i387.fxsave));
+	mask = current->thread.i387.fxsave.mxcsr_mask;
+	if (mask == 0UL) mask = 0x0000ffbf;
+	common_mxcsr_mask &= mask;
+}
+
 /*
  * Called at bootup to set up the initial FPU state that is later cloned
  * into all processes.
@@ -40,6 +57,8 @@
 
 	write_cr0(oldcr0 & ~((1UL<<3)|(1UL<<2))); /* clear TS and EM */
 
+	clts();
+	mxcsr_mask_init();
 	/* clean state in init */
 	stts();
 	current_thread_info()->status = 0;
--- 2.6.6-rc3/arch/x86_64/ia32/fpu32.c.orig	2004-05-03 18:00:02.000000000 -0700
+++ 2.6.6-rc3/arch/x86_64/ia32/fpu32.c	2004-05-03 18:05:10.000000000 -0700
@@ -155,7 +155,7 @@
 				     &buf->_fxsr_env[0],
 				     sizeof(struct i387_fxsave_struct)))
 			return -1;
-	tsk->thread.i387.fxsave.mxcsr &= 0xffbf;
+		set_fpu_mxcsr(tsk, tsk->thread.i387.fxsave.mxcsr);
 		tsk->used_math = 1;
 	} 
 	return convert_fxsr_from_user(&tsk->thread.i387.fxsave, buf);
--- 2.6.6-rc3/arch/x86_64/ia32/ptrace32.c.orig	2004-05-03 18:00:31.000000000 -0700
+++ 2.6.6-rc3/arch/x86_64/ia32/ptrace32.c	2004-05-03 18:05:10.000000000 -0700
@@ -357,7 +357,7 @@
 		/* no checking to be bug-to-bug compatible with i386 */
 		__copy_from_user(&child->thread.i387.fxsave, u, sizeof(*u));
 		child->used_math = 1;
-	        child->thread.i387.fxsave.mxcsr &= 0xffbf;
+		set_fpu_mxcsr(child, child->thread.i387.fxsave.mxcsr);
 		ret = 0; 
 			break;
 		}
--- 2.6.6-rc3/include/asm-x86_64/i387.h.orig	2004-05-03 18:01:02.000000000 -0700
+++ 2.6.6-rc3/include/asm-x86_64/i387.h	2004-05-04 11:45:58.000000000 -0700
@@ -52,8 +52,8 @@
 	}							\
 } while (0)
 
-#define load_mxcsr(val) do { \
-		unsigned long __mxcsr = ((unsigned long)(val) & 0xffbf); \
+#define load_mxcsr(val, mask) do { \
+		unsigned long __mxcsr = ((unsigned long)(val) & (mask)); \
 		asm volatile("ldmxcsr %0" : : "m" (__mxcsr)); \
 } while (0)
 
@@ -75,7 +75,7 @@
 #define set_fpu_cwd(t,val) ((t)->thread.i387.fxsave.cwd = (val))
 #define set_fpu_swd(t,val) ((t)->thread.i387.fxsave.swd = (val))
 #define set_fpu_fxsr_twd(t,val) ((t)->thread.i387.fxsave.twd = (val))
-#define set_fpu_mxcsr(t,val) ((t)->thread.i387.fxsave.mxcsr = (val)&0xffbf)
+extern void set_fpu_mxcsr(struct task_struct *tsk, unsigned short mxcsr);
 
 static inline int restore_fpu_checking(struct i387_fxsave_struct *fx) 
 { 
--- 2.6.6-rc3/include/asm-i386/i387.h.orig	2004-05-03 18:01:31.000000000 -0700
+++ 2.6.6-rc3/include/asm-i386/i387.h	2004-05-04 11:42:05.000000000 -0700
@@ -16,6 +16,7 @@
 #include <asm/sigcontext.h>
 #include <asm/user.h>
 
+extern void mxcsr_mask_init(void);
 extern void init_fpu(struct task_struct *);
 /*
  * FPU lazy state save handling...
@@ -91,8 +92,8 @@
 extern void set_fpu_twd( struct task_struct *tsk, unsigned short twd );
 extern void set_fpu_mxcsr( struct task_struct *tsk, unsigned short mxcsr );
 
-#define load_mxcsr( val ) do { \
-	unsigned long __mxcsr = ((unsigned long)(val) & 0xffbf); \
+#define load_mxcsr(val, mask) do { \
+	unsigned long __mxcsr = ((unsigned long)(val) & (mask)); \
 	asm volatile( "ldmxcsr %0" : : "m" (__mxcsr) ); \
 } while (0)
 
--- 2.6.6-rc3/include/asm-i386/processor.h.orig	2004-05-03 18:00:03.000000000 -0700
+++ 2.6.6-rc3/include/asm-i386/processor.h	2004-05-03 18:05:10.000000000 -0700
@@ -332,7 +332,7 @@
 	long	foo;
 	long	fos;
 	long	mxcsr;
-	long	reserved;
+	long	mxcsr_mask;
 	long	st_space[32];	/* 8*16 bytes for each FP-reg = 128 bytes */
 	long	xmm_space[32];	/* 8*16 bytes for each XMM-reg = 128 bytes */
 	long	padding[56];