From: Linus Torvalds <torvalds@osdl.org>
To: "Kamble, Nitin A" <nitin.a.kamble@intel.com>
Cc: Andrew Morton <akpm@osdl.org>,
linux-kernel@vger.kernel.org, "Nakajima,
Jun" <jun.nakajima@intel.com>,
"Mallick, Asit K" <asit.k.mallick@intel.com>,
"Saxena, Sunil" <sunil.saxena@intel.com>
Subject: Re: [PATCH] mxcsr patch for i386 & x86-64
Date: Tue, 4 May 2004 12:10:22 -0700 (PDT) [thread overview]
Message-ID: <Pine.LNX.4.58.0405041201440.3271@ppc970.osdl.org> (raw)
In-Reply-To: <E305A4AFB7947540BC487567B5449BA802CA7BEC@scsmsx402.sc.intel.com>
On Tue, 4 May 2004, Kamble, Nitin A wrote:
>
> Attached is the patch to enable proper mxcsr register masking in
> the Linux Kernel.
>
> Please refer to IA32 Software Developer's Manual, Volume 1, Section
> 11.6.6 for more details.
Ahh. Have we verified that the new semantics of that MXCSR_MASK field
works on non-intel CPU's too?
It would also (in my opinion) make sense to just export the
"common_mxcsr_mask" (and probably just rename it as "mxcsr_feature_mask"
or something - where does that "common" come from? Is it just to imply
that it's the bits that all CPU's support "in common", or what?
Right now you export a function that does just a simple mask operation,
and quite frankly, that just seems to make it less clear what the code is
doing. So who not get rid of that "set_fpu_mxcsr()" function, and just
replace all the "0xffbf" uses with "mxcsr_feature_mask"?
Hmm?
Linus
next prev parent reply other threads:[~2004-05-04 19:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-05-04 18:50 Kamble, Nitin A
2004-05-04 19:10 ` Linus Torvalds [this message]
2004-05-04 19:26 ` Linus Torvalds
2004-05-04 20:24 ` Linus Torvalds
2004-05-04 21:07 ` Jeff Garzik
2004-05-05 13:51 ` Pavel Machek
2004-05-04 20:25 Kamble, Nitin A
2004-05-04 21:06 Kamble, Nitin A
2004-05-04 21:47 Nakajima, Jun
2004-05-06 21:00 Kamble, Nitin A
2004-05-07 14:23 ` Pavel Machek
2004-05-07 1:40 Kamble, Nitin A
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