From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: vkoul@kernel.org, fabrizio.castro.jz@renesas.com,
biju.das.jz@bp.renesas.com, geert+renesas@glider.be,
prabhakar.mahadev-lad.rj@bp.renesas.com
Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH v5 6/6] dmaengine: sh: rz-dmac: Add device_{pause,resume}() callbacks
Date: Thu, 18 Dec 2025 09:48:18 +0200 [thread overview]
Message-ID: <a0a4666a-edc4-4455-9e62-d61254447e36@tuxon.dev> (raw)
In-Reply-To: <20251217135213.400280-7-claudiu.beznea.uj@bp.renesas.com>
Hi,
On 12/17/25 15:52, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> Add support for device_{pause, resume}() callbacks. These are required by
> the RZ/G2L SCIFA driver.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>
> Changes in v5:
> - used suspend capability of the controller to pause/resume
> the transfers
>
> drivers/dma/sh/rz-dmac.c | 35 +++++++++++++++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c
> index c3035b94ef2c..e349ade1845f 100644
> --- a/drivers/dma/sh/rz-dmac.c
> +++ b/drivers/dma/sh/rz-dmac.c
> @@ -135,6 +135,7 @@ struct rz_dmac {
> #define CHANNEL_8_15_COMMON_BASE 0x0700
>
> #define CHSTAT_ER BIT(4)
> +#define CHSTAT_SUS BIT(3)
> #define CHSTAT_EN BIT(0)
>
> #define CHCTRL_CLRINTMSK BIT(17)
> @@ -827,6 +828,38 @@ static enum dma_status rz_dmac_tx_status(struct dma_chan *chan,
> return status;
> }
>
> +static int rz_dmac_device_pause(struct dma_chan *chan)
> +{
> + struct rz_dmac_chan *channel = to_rz_dmac_chan(chan);
> + u32 val;
> +
> + scoped_guard(spinlock_irqsave, &channel->vc.lock) {
> + val = rz_dmac_ch_readl(channel, CHCTRL, 1);
> + val |= CHCTRL_CLRSUS;
This is wrong, I overlooked it. It should have set the CHCTRL_SETSUS bit.
> + rz_dmac_ch_writel(channel, val, CHCTRL, 1);
> + }
> +
> + return read_poll_timeout_atomic(rz_dmac_ch_readl, val,
> + (val & CHSTAT_SUS), 1, 1024, false,
> + channel, CHSTAT, 1);
> +}
> +
> +static int rz_dmac_device_resume(struct dma_chan *chan)
> +{
> + struct rz_dmac_chan *channel = to_rz_dmac_chan(chan);
> + u32 val;
> +
> + scoped_guard(spinlock_irqsave, &channel->vc.lock) {
> + val = rz_dmac_ch_readl(channel, CHCTRL, 1);
> + val &= ~CHCTRL_CLRSUS;
Same here. It should have set the CHCTRL_CLRSUS bit.
I'll update it in the next version.
Thank you,
Claudiu
prev parent reply other threads:[~2025-12-18 7:48 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-17 13:52 [PATCH v5 0/6] dmaengine: sh: rz-dmac: Add tx_status and pause/resume support Claudiu
2025-12-17 13:52 ` [PATCH v5 1/6] dmaengine: sh: rz-dmac: Protect the driver specific lists Claudiu
2025-12-17 13:52 ` [PATCH v5 2/6] dmaengine: sh: rz-dmac: Move all CHCTRL updates under spinlock Claudiu
2025-12-17 16:16 ` Biju Das
2025-12-18 7:43 ` Claudiu Beznea
2025-12-18 8:30 ` Biju Das
2025-12-17 13:52 ` [PATCH v5 3/6] dmaengine: sh: rz-dmac: Drop unnecessary local_irq_save() call Claudiu
2025-12-17 13:52 ` [PATCH v5 4/6] dmaengine: sh: rz-dmac: Add rz_dmac_invalidate_lmdesc() Claudiu
2025-12-17 13:52 ` [PATCH v5 5/6] dmaengine: sh: rz-dmac: Add device_tx_status() callback Claudiu
2025-12-17 13:52 ` [PATCH v5 6/6] dmaengine: sh: rz-dmac: Add device_{pause,resume}() callbacks Claudiu
2025-12-18 7:48 ` Claudiu Beznea [this message]
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