From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Biju Das <biju.das.jz@bp.renesas.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
"geert+renesas@glider.be" <geert+renesas@glider.be>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>,
"stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [PATCH v5 2/6] dmaengine: sh: rz-dmac: Move all CHCTRL updates under spinlock
Date: Thu, 18 Dec 2025 09:43:54 +0200 [thread overview]
Message-ID: <e2037b38-4c20-4f1e-b681-ae3def30823c@tuxon.dev> (raw)
In-Reply-To: <TY3PR01MB113463722674503F2B15F944786ABA@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi, Biju,
On 12/17/25 18:16, Biju Das wrote:
> Hi Claudiu,
>
>> -----Original Message-----
>> From: Claudiu <claudiu.beznea@tuxon.dev>
>> Sent: 17 December 2025 13:52
>> To: vkoul@kernel.org; Fabrizio Castro <fabrizio.castro.jz@renesas.com>; Biju Das
>> <biju.das.jz@bp.renesas.com>; geert+renesas@glider.be; Prabhakar Mahadev Lad <prabhakar.mahadev-
>> lad.rj@bp.renesas.com>
>> Cc: Claudiu.Beznea <claudiu.beznea@tuxon.dev>; dmaengine@vger.kernel.org; linux-
>> kernel@vger.kernel.org; Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>; stable@vger.kernel.org
>> Subject: [PATCH v5 2/6] dmaengine: sh: rz-dmac: Move all CHCTRL updates under spinlock
>>
>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> Both rz_dmac_disable_hw() and rz_dmac_irq_handle_channel() update the CHCTRL registers. To avoid
>> concurrency issues when updating these registers, take the virtual channel lock. All other CHCTRL
>> updates were already protected by the same lock.
>>
>> Previously, rz_dmac_disable_hw() disabled and re-enabled local IRQs, before accessing CHCTRL registers
>> but this does not ensure race-free access.
>
> Maybe I am missing some thing here about race-access:
>
> local_irq_save(flags);
> rz_dmac_ch_writel(channel, CHCTRL_DEFAULT, CHCTRL, 1);
>
> After local_irq_save there won't be any IRQ. So how there
> can be a race in IRQ handler.
My point was to address races that may happen b/w different cores trying
to set CHCTRL. E.g.:
core0: take the IRQ and set CHCTRL
core1: call rz_dmac_issue_pending() -> rz_dmac_xfer_desc() ->
rz_dmac_enable_hw() -> set CHCTRL
However, looking again though the HW manual, the CHCTRL returns zero
when it is read, for each individual bit. Thus, there is no need for any
kind of locking around this register. Also, read-modify-write approach
when updating settings though it is not needed.
I'll adjust it in the next version.
Thank you,
Claudiu
next prev parent reply other threads:[~2025-12-18 7:43 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-17 13:52 [PATCH v5 0/6] dmaengine: sh: rz-dmac: Add tx_status and pause/resume support Claudiu
2025-12-17 13:52 ` [PATCH v5 1/6] dmaengine: sh: rz-dmac: Protect the driver specific lists Claudiu
2025-12-17 13:52 ` [PATCH v5 2/6] dmaengine: sh: rz-dmac: Move all CHCTRL updates under spinlock Claudiu
2025-12-17 16:16 ` Biju Das
2025-12-18 7:43 ` Claudiu Beznea [this message]
2025-12-18 8:30 ` Biju Das
2025-12-17 13:52 ` [PATCH v5 3/6] dmaengine: sh: rz-dmac: Drop unnecessary local_irq_save() call Claudiu
2025-12-17 13:52 ` [PATCH v5 4/6] dmaengine: sh: rz-dmac: Add rz_dmac_invalidate_lmdesc() Claudiu
2025-12-17 13:52 ` [PATCH v5 5/6] dmaengine: sh: rz-dmac: Add device_tx_status() callback Claudiu
2025-12-17 13:52 ` [PATCH v5 6/6] dmaengine: sh: rz-dmac: Add device_{pause,resume}() callbacks Claudiu
2025-12-18 7:48 ` Claudiu Beznea
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