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From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Ryan Roberts <ryan.roberts@arm.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/6] arm64/mm: TTBRx_EL1 related changes
Date: Thu, 13 Nov 2025 14:48:44 +0530	[thread overview]
Message-ID: <a1306c3a-5d2e-48e0-aaa8-4e19ea81bef3@arm.com> (raw)
In-Reply-To: <20251103052618.586763-1-anshuman.khandual@arm.com>

On 03/11/25 10:56 AM, Anshuman Khandual wrote:
> This series contains some TTBRx_EL1 related changes, aimed at standardizing
> TTBRx_EL1 register field accesses via tools sysreg format and also explains
> 52 PA specific handling methods via a new macro along with in code comments
> 
> This series applies on v6.18-rc4
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Ryan Roberts <ryan.roberts@arm.com>
> Cc: Ard Biesheuvel <ardb@kernel.org>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> 
> Anshuman Khandual (6):
>   arm64/mm: Directly use TTBRx_EL1_ASID_MASK
>   arm64/mm: Directly use TTBRx_EL1_CnP
>   arm64/mm: Represent TTBR_BADDR_MASK_52 with TTBRx_EL1_BADDR_MASK
>   arm64/mm: Ensure correct 48 bit PA gets into TTBRx_EL1
>   arm64/mm: Describe 52 PA folding into TTBRx_EL1
>   arm64/mm: Describe TTBR1_BADDR_4852_OFFSET
> 
>  arch/arm64/include/asm/asm-uaccess.h   |  2 +-
>  arch/arm64/include/asm/assembler.h     |  3 ++-
>  arch/arm64/include/asm/mmu_context.h   |  2 +-
>  arch/arm64/include/asm/pgtable-hwdef.h | 23 ++++++++++++++++++++---
>  arch/arm64/include/asm/pgtable.h       |  5 +++--
>  arch/arm64/include/asm/uaccess.h       |  6 +++---
>  arch/arm64/kernel/entry.S              |  2 +-
>  arch/arm64/kernel/mte.c                |  4 ++--
>  arch/arm64/mm/context.c                |  8 ++++----
>  arch/arm64/mm/mmu.c                    |  2 +-
>  10 files changed, 38 insertions(+), 19 deletions(-)

Gentle ping. Beside [PATCH 4/6] (which can be dropped as indicated by Mark)
any concerns regarding reset of these changes here ?

  parent reply	other threads:[~2025-11-13  9:18 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-03  5:26 Anshuman Khandual
2025-11-03  5:26 ` [PATCH 1/6] arm64/mm: Directly use TTBRx_EL1_ASID_MASK Anshuman Khandual
2025-11-03  5:26 ` [PATCH 2/6] arm64/mm: Directly use TTBRx_EL1_CnP Anshuman Khandual
2025-11-03  5:26 ` [PATCH 3/6] arm64/mm: Represent TTBR_BADDR_MASK_52 with TTBRx_EL1_BADDR_MASK Anshuman Khandual
2025-11-03  5:26 ` [PATCH 4/6] arm64/mm: Ensure correct 48 bit PA gets into TTBRx_EL1 Anshuman Khandual
2025-11-04 15:17   ` Mark Rutland
2025-11-05  3:35     ` Anshuman Khandual
2025-11-03  5:26 ` [PATCH 5/6] arm64/mm: Describe 52 PA folding " Anshuman Khandual
2025-11-03  5:26 ` [PATCH 6/6] arm64/mm: Describe TTBR1_BADDR_4852_OFFSET Anshuman Khandual
2025-11-13  9:18 ` Anshuman Khandual [this message]
2025-11-14  9:55   ` [PATCH 0/6] arm64/mm: TTBRx_EL1 related changes Mark Rutland
2025-11-19  1:07     ` Anshuman Khandual

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