From: <Ryan.Wanner@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<alexandre.belloni@bootlin.com>, <claudiu.beznea@tuxon.dev>,
<nicolas.ferre@microchip.com>
Cc: <linux-clk@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
<varshini.rajendran@microchip.com>
Subject: [PATCH v4 23/31] clk: at91: sama5d2: switch to parent_hw and parent_data
Date: Thu, 18 Sep 2025 14:16:05 -0700 [thread overview]
Message-ID: <a2f7cce73739fc795d17710a3bb017158c090735.1758226719.git.Ryan.Wanner@microchip.com> (raw)
In-Reply-To: <cover.1758226719.git.Ryan.Wanner@microchip.com>
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch SAMA5D2 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Adjust commit message.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/sama5d2.c | 157 ++++++++++++++++++++-----------------
1 file changed, 85 insertions(+), 72 deletions(-)
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index f5d6c7a96cf2..231cec1f80e1 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -37,9 +37,9 @@ static const struct clk_pcr_layout sama5d2_pcr_layout = {
.pid_mask = GENMASK(6, 0),
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} sama5d2_systemck[] = {
@@ -47,14 +47,14 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "lcdck", .p = "masterck_div", .id = 3 },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "pck2", .p = "prog2", .id = 10 },
- { .n = "iscck", .p = "masterck_div", .id = 18 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "lcdck", .id = 3 },
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "pck2", .id = 10 },
+ { .n = "iscck", .id = 18 },
};
static const struct {
@@ -164,12 +164,12 @@ static const struct clk_programmable_layout sama5d2_programmable_layout = {
static void __init sama5d2_pmc_setup(struct device_node *np)
{
+ struct clk_hw *hw, *audio_fracck_hw, *usbck_hw, *main_rc_hw, *main_osc_hw;
+ const char *slow_clk_name, *main_xtal_name;
struct clk_range range = CLK_RANGE(0, 0);
- const char *slck_name, *mainxtal_name;
- struct pmc_data *sama5d2_pmc;
- const char *parent_names[6];
+ struct clk_parent_data parent_data[6];
struct regmap *regmap, *regmap_sfr;
- struct clk_hw *hw;
+ struct pmc_data *sama5d2_pmc;
int i;
bool bypass;
@@ -177,12 +177,12 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
if (i < 0)
return;
- slck_name = of_clk_get_parent_name(np, i);
+ slow_clk_name = of_clk_get_parent_name(np, i);
i = of_property_match_string(np, "clock-names", "main_xtal");
if (i < 0)
return;
- mainxtal_name = of_clk_get_parent_name(np, i);
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -195,51 +195,51 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
if (!sama5d2_pmc)
return;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 100000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 100000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
- bypass);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(main_xtal_name), bypass);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_MAIN] = hw;
-
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]), 0,
&sama5d3_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
+ hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck",
- "mainck", NULL);
- if (IS_ERR(hw))
+ audio_fracck_hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]));
+ if (IS_ERR(audio_fracck_hw))
goto err_free;
- hw = at91_clk_register_audio_pll_pad(regmap, "audiopll_padck",
- "audiopll_fracck", NULL);
+ hw = at91_clk_register_audio_pll_pad(regmap, "audiopll_padck", NULL,
+ &AT91_CLK_PD_HW(audio_fracck_hw));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_AUDIOPINCK] = hw;
- hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck",
- "audiopll_fracck", NULL);
+ hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck", NULL,
+ &AT91_CLK_PD_HW(audio_fracck_hw));
if (IS_ERR(hw))
goto err_free;
@@ -249,25 +249,26 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
if (IS_ERR(regmap_sfr))
regmap_sfr = NULL;
- hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ hw = at91_clk_register_master_div(regmap, "masterck_div", NULL,
+ &AT91_CLK_PD_HW(hw),
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
@@ -276,31 +277,32 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->chws[PMC_MCK] = hw;
- hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL);
+ hw = at91_clk_register_h32mx(regmap, "h32mxck", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_MCK2] = hw;
- parent_names[0] = "plladivck";
- parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
+ usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
- parent_names[5] = "audiopll_pmcck";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]);
+ parent_data[5] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_AUDIOPLLCK]);
for (i = 0; i < 3; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 6, i,
+ NULL, parent_data, 6, i,
&sama5d2_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -309,9 +311,18 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ sama5d2_systemck[0].parent_hw = sama5d2_pmc->chws[PMC_MCK];
+ sama5d2_systemck[1].parent_hw = sama5d2_pmc->chws[PMC_MCK];
+ sama5d2_systemck[2].parent_hw = usbck_hw;
+ sama5d2_systemck[3].parent_hw = usbck_hw;
+ sama5d2_systemck[4].parent_hw = sama5d2_pmc->pchws[0];
+ sama5d2_systemck[5].parent_hw = sama5d2_pmc->pchws[1];
+ sama5d2_systemck[6].parent_hw = sama5d2_pmc->pchws[2];
+ sama5d2_systemck[7].parent_hw = sama5d2_pmc->chws[PMC_MCK];
for (i = 0; i < ARRAY_SIZE(sama5d2_systemck); i++) {
- hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n,
- sama5d2_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(sama5d2_systemck[i].parent_hw),
sama5d2_systemck[i].id,
sama5d2_systemck[i].flags);
if (IS_ERR(hw))
@@ -324,7 +335,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sama5d2_pcr_layout,
sama5d2_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]),
sama5d2_periphck[i].id,
&range, INT_MIN,
sama5d2_periphck[i].flags);
@@ -338,7 +350,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sama5d2_pcr_layout,
sama5d2_periph32ck[i].n,
- "h32mxck", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK2]),
sama5d2_periph32ck[i].id,
&sama5d2_periph32ck[i].r,
INT_MIN, 0);
@@ -348,17 +361,17 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->phws[sama5d2_periph32ck[i].id] = hw;
}
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
- parent_names[5] = "audiopll_pmcck";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]);
+ parent_data[5] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_AUDIOPLLCK]);
for (i = 0; i < ARRAY_SIZE(sama5d2_gck); i++) {
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sama5d2_pcr_layout,
sama5d2_gck[i].n,
- parent_names, NULL, NULL, 6,
+ NULL, parent_data, NULL, 6,
sama5d2_gck[i].id,
&sama5d2_gck[i].r,
sama5d2_gck[i].chg_pid);
@@ -369,19 +382,19 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
}
if (regmap_sfr) {
- parent_names[0] = "i2s0_clk";
- parent_names[1] = "i2s0_gclk";
+ parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->phws[54]); /* i2s0_clk */
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->ghws[54]); /* i2s0_gclk */
hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s0_muxclk",
- parent_names, NULL, 2, 0);
+ NULL, parent_data, 2, 0);
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_I2S0_MUX] = hw;
- parent_names[0] = "i2s1_clk";
- parent_names[1] = "i2s1_gclk";
+ parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->phws[55]); /* i2s1_clk */
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->ghws[55]); /* i2s1_gclk */
hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s1_muxclk",
- parent_names, NULL, 2, 1);
+ NULL, parent_data, 2, 1);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
next prev parent reply other threads:[~2025-09-18 21:16 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-10-20 19:40 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 02/31] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-10-20 19:38 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-10-20 19:41 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 05/31] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-10-20 19:41 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 06/31] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-10-20 19:42 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 07/31] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-10-20 19:43 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 08/31] clk: at91: clk-master: " Ryan.Wanner
2025-10-20 19:44 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 09/31] clk: at91: clk-programmable: " Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 10/31] clk: at91: clk-generated: " Ryan.Wanner
2025-10-20 19:39 ` Claudiu Beznea
2025-10-20 19:45 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-10-20 19:17 ` Claudiu Beznea
2025-12-18 16:23 ` Ryan.Wanner
2025-12-23 14:00 ` claudiu beznea
2026-01-05 17:58 ` Ryan.Wanner
2026-01-10 15:03 ` Claudiu Beznea
2026-01-12 21:25 ` Ryan Wanner
2026-01-16 6:57 ` claudiu beznea
2025-09-18 21:15 ` [PATCH v4 12/31] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
2025-10-20 19:14 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 14/31] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 15/31] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 16/31] clk: at91: clk-plldiv: " Ryan.Wanner
2025-10-20 19:12 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 17/31] clk: at91: clk-h32mx: " Ryan.Wanner
2025-10-20 19:12 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 18/31] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-10-20 19:13 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 19/31] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-10-20 19:14 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 20/31] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-10-20 19:17 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-10-20 19:15 ` Claudiu Beznea
2026-01-09 17:03 ` Ryan Wanner
2026-01-10 15:07 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 22/31] clk: at91: sam9x60: " Ryan.Wanner
2025-09-18 21:16 ` Ryan.Wanner [this message]
2025-10-20 19:19 ` [PATCH v4 23/31] clk: at91: sama5d2: " Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 24/31] clk: at91: sama5d3: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 25/31] clk: at91: sama5d4: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 26/31] clk: at91: at91sam9x5: " Ryan.Wanner
2025-10-20 19:19 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 27/31] clk: at91: at91rm9200: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 28/31] clk: at91: at91sam9260: " Ryan.Wanner
2025-10-20 19:35 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 29/31] clk: at91: at91sam9g45: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 30/31] clk: at91: at91sam9n12: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 31/31] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
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