From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Harshal Dev <harshal.dev@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Val Packett <val@packett.cool>,
Stephan Gerhold <stephan.gerhold@linaro.org>,
Abel Vesa <abel.vesa@linaro.org>,
Udit Tiwari <quic_utiwari@quicinc.com>,
Neeraj Soni <quic_neersoni@quicinc.com>
Subject: Re: [PATCH v3] arm64: dts: qcom: x1e80100: Add crypto engine
Date: Fri, 5 Dec 2025 11:32:56 +0100 [thread overview]
Message-ID: <a6561d3a-87c8-4a1e-bf1d-f7ac390f8424@oss.qualcomm.com> (raw)
In-Reply-To: <31d09e5d-7dd7-407d-af25-c5d1e5c9c431@oss.qualcomm.com>
On 12/5/25 11:28 AM, Harshal Dev wrote:
> Hi Konrad,
>
> On 12/4/2025 7:14 PM, Konrad Dybcio wrote:
>> On 11/27/25 10:43 AM, Harshal Dev wrote:
>>> On X Elite, there is a crypto engine IP block similar to ones found on
>>> SM8x50 platforms.
>>>
>>> Describe the crypto engine and its BAM.
>>>
>>> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
>>> ---
[...]
>>> + crypto: crypto@1dfa000 {
>>> + compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce";
>>> + reg = <0x0 0x01dfa000 0x0 0x6000>;
>>> + dmas = <&cryptobam 4>, <&cryptobam 5>;
>>> + dma-names = "rx", "tx";
>>
>> one a line, please
>
> I did not quite get this comment, could you please clarify a bit more? :)
dma-names = "rx",
"tx";
Konrad
prev parent reply other threads:[~2025-12-05 10:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-27 9:43 Harshal Dev
2025-12-04 13:44 ` Konrad Dybcio
2025-12-05 10:28 ` Harshal Dev
2025-12-05 10:32 ` Konrad Dybcio [this message]
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