From: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Georgi Djakov <djakov@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Mike Tipton <mike.tipton@oss.qualcomm.com>
Subject: Re: [PATCH 1/3] dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS
Date: Thu, 5 Feb 2026 15:10:31 +0530 [thread overview]
Message-ID: <a9c2f6e2-0185-4a1e-bed6-fd1f542b2367@oss.qualcomm.com> (raw)
In-Reply-To: <ac26d960-5c05-4681-aefe-4827b74ef29e@oss.qualcomm.com>
On 2/5/2026 2:31 PM, Konrad Dybcio wrote:
> On 2/5/26 7:06 AM, Odelu Kukatla wrote:
>>
>>
>> On 2/2/2026 4:33 PM, Konrad Dybcio wrote:
>>> On 2/2/26 8:05 AM, Odelu Kukatla wrote:
>>>> Aggre1-noc interconnect node on QCS615 has QoS registers located
>>>> inside a block whose interface is clock-gated. For that node,
>>>> driver must enable the corresponding clock(s) before accessing
>>>> the registers. Add the 'clocks' property so the driver can obtain
>>>> and enable the required clock(s).
>>>>
>>>> Only interconnects that have clock‑gated QoS register interface
>>>> use this property; it is not applicable to all interconnect nodes.
>>>>
>>>> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
>>>> ---
>
> [...]
>
>>>> + - if:
>>>> + properties:
>>>> + compatible:
>>>> + contains:
>>>> + enum:
>>>> + - qcom,qcs615-aggre1-noc
>>>> + then:
>>>> + properties:
>>>> + clocks:
>>>> + items:
>>>> + - description: aggre UFS PHY AXI clock
>>>> + - description: aggre USB2 SEC AXI clock
>>>> + - description: aggre USB3 PRIM AXI clock
>>>
>>> Should we also include the IPA clock here?
>>>
>>
>> Thanks for the review!
>>
>> For QCS615, the IPA clock is already enabled by the bootloader (xBL) and
>> kept on during the boot‑up stage. Because of this, we do not need to
>> explicitly enable the IPA clock in the interconnect driver when
>> accessing the QoS registers.
>
> Would we need to re-enable it to re-program the hardware if say the
> icc module is loaded after unused clk cleanup or after a cx collapse?
>
IPA clock is not managed by GCC clock controller driver, so
clk_disable_unused does not disable it. As a result, the icc provider
does not need to re enable an IPA clock for QoS access after unused clk
cleanup. And QCS615 does *not* support Cx collapse.
Thanks,
Odelu
> Konrad
next prev parent reply other threads:[~2026-02-05 9:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 7:05 [PATCH 0/3] Enable QoS configuration on QCS615 Odelu Kukatla
2026-02-02 7:05 ` [PATCH 1/3] dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS Odelu Kukatla
2026-02-02 11:03 ` Konrad Dybcio
2026-02-05 6:06 ` Odelu Kukatla
2026-02-05 9:01 ` Konrad Dybcio
2026-02-05 9:40 ` Odelu Kukatla [this message]
2026-02-05 10:29 ` Dmitry Baryshkov
2026-02-06 4:58 ` Odelu Kukatla
2026-02-06 6:51 ` Dmitry Baryshkov
2026-02-10 9:40 ` Odelu Kukatla
2026-02-02 7:05 ` [PATCH 2/3] interconnect: qcom: qcs615: enable QoS configuration Odelu Kukatla
2026-02-02 20:33 ` Dmitry Baryshkov
2026-02-05 9:10 ` Konrad Dybcio
2026-02-02 7:05 ` [PATCH 3/3] arm64: dts: qcom: talos: Add clocks for " Odelu Kukatla
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