Re: [PATCH 1/3] dt-bindings: interconnect: qcom,qcs615-rpmh: add clocks property to enable QoS

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 2/5/26 7:06 AM, Odelu Kukatla wrote:
> 
> 
> On 2/2/2026 4:33 PM, Konrad Dybcio wrote:
>> On 2/2/26 8:05 AM, Odelu Kukatla wrote:
>>> Aggre1-noc interconnect node on QCS615 has QoS registers located
>>> inside a block whose interface is clock-gated. For that node,
>>> driver must enable the corresponding clock(s) before accessing
>>> the registers. Add the 'clocks' property so the driver can obtain
>>> and enable the required clock(s).
>>>
>>> Only interconnects that have clock‑gated QoS register interface
>>> use this property; it is not applicable to all interconnect nodes.
>>>
>>> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
>>> ---

[...]

>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - qcom,qcs615-aggre1-noc
>>> +    then:
>>> +      properties:
>>> +        clocks:
>>> +          items:
>>> +            - description: aggre UFS PHY AXI clock
>>> +            - description: aggre USB2 SEC AXI clock
>>> +            - description: aggre USB3 PRIM AXI clock
>>
>> Should we also include the IPA clock here?
>>
> 
> Thanks for the review!
> 
> For QCS615, the IPA clock is already enabled by the bootloader (xBL) and
> kept on during the boot‑up stage. Because of this, we do not need to
> explicitly enable the IPA clock in the interconnect driver when
> accessing the QoS registers.

Would we need to re-enable it to re-program the hardware if say the
icc module is loaded after unused clk cleanup or after a cx collapse?

Konrad