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From: Vasant Hegde <vasant.hegde@amd.com>
To: "Jörg Rödel" <joro@8bytes.org>, suravee.suthikulpanit@amd.com
Cc: Wei Wang <wei.w.wang@hotmail.com>,
	will@kernel.org, robin.murphy@arm.com, thomas.lendacky@amd.com,
	aik@amd.com, jgg@nvidia.com, kevin.tian@intel.com,
	xuyongwei@open-hieco.net, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 0/3] iommu/amd: Fix and improve SB IOAPIC IVRS validation
Date: Sun, 17 May 2026 23:25:26 +0530	[thread overview]
Message-ID: <a9e17e1e-8ff9-4dc8-99b2-37bde23755d5@amd.com> (raw)
In-Reply-To: <ui2oa3gdlq6v3qfsezadn7rxa7osisjmag7us5ufw2k6mn75gr@mzilog72gwf2>

Joerg,


On 5/11/2026 1:10 PM, Jörg Rödel wrote:
> Suravee, Vasant, could you please have a look at this series?

Sure. We are testing it internally. We will respond back this week.

-Vasant



  reply	other threads:[~2026-05-17 17:55 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-06 15:40 Wei Wang
2026-04-06 15:40 ` [PATCH v1 1/3] iommu/amd: Prevent SB IOAPIC from overriding IVRS validation errors Wei Wang
2026-05-29  4:13   ` Vasant Hegde
2026-04-06 15:40 ` [PATCH v1 2/3] iommu/amd: Fix false positive in SB IOAPIC IVRS validation Wei Wang
2026-05-29  4:30   ` Vasant Hegde
2026-04-06 15:40 ` [PATCH v1 3/3] iommu/amd: Dynamically verify Southbridge IOAPIC via PCI config space Wei Wang
2026-05-29  4:30   ` Vasant Hegde
2026-05-11  7:40 ` [PATCH v1 0/3] iommu/amd: Fix and improve SB IOAPIC IVRS validation Jörg Rödel
2026-05-17 17:55   ` Vasant Hegde [this message]
2026-05-26 13:40     ` 徐勇伟

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