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From: Frank Li <Frank.li@nxp.com>
To: Haibo Chen <haibo.chen@nxp.com>
Cc: Han Xu <han.xu@nxp.com>, Yogesh Gaur <yogeshgaur.83@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	linux-spi@vger.kernel.org, imx@lists.linux.dev,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 5/5] spi: spi-nxp-fspi: Add OCT-DTR mode support
Date: Wed, 17 Sep 2025 12:30:19 -0400	[thread overview]
Message-ID: <aMriG3Sp4Ns93Mxd@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20250917-flexspi-ddr-v2-5-bb9fe2a01889@nxp.com>

On Wed, Sep 17, 2025 at 03:27:10PM +0800, Haibo Chen wrote:
> Add OCT-DTR mode support in default, since flexspi do not supports
> swapping bytes on a 16 bit boundary in OCT-DTR mode, so mark swap16
> as false.
>
> lx2160a do not support DQS, so add a quirk to disable DTR mode for this

does?

> platform.
>
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

>  drivers/spi/spi-nxp-fspi.c | 18 ++++++++++++++++--
>  1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
> index d25679fafad7a94a7ea2a79d7e3da53f4939c9fa..f9371f98a65bdc7e5eaa612c0770a6228bdda364 100644
> --- a/drivers/spi/spi-nxp-fspi.c
> +++ b/drivers/spi/spi-nxp-fspi.c
> @@ -330,6 +330,8 @@
>
>  /* Access flash memory using IP bus only */
>  #define FSPI_QUIRK_USE_IP_ONLY	BIT(0)
> +/* Disable DTR */
> +#define FSPI_QUIRK_DISABLE_DTR	BIT(1)
>
>  struct nxp_fspi_devtype_data {
>  	unsigned int rxfifo;
> @@ -344,7 +346,7 @@ static struct nxp_fspi_devtype_data lx2160a_data = {
>  	.rxfifo = SZ_512,       /* (64  * 64 bits)  */
>  	.txfifo = SZ_1K,        /* (128 * 64 bits)  */
>  	.ahb_buf_size = SZ_2K,  /* (256 * 64 bits)  */
> -	.quirks = 0,
> +	.quirks = FSPI_QUIRK_DISABLE_DTR,
>  	.lut_num = 32,
>  	.little_endian = true,  /* little-endian    */
>  };
> @@ -1231,6 +1233,13 @@ static const struct spi_controller_mem_ops nxp_fspi_mem_ops = {
>  };
>
>  static const struct spi_controller_mem_caps nxp_fspi_mem_caps = {
> +	.dtr = true,
> +	.swap16 = false,
> +	.per_op_freq = true,
> +};
> +
> +static const struct spi_controller_mem_caps nxp_fspi_mem_caps_disable_dtr = {
> +	.dtr = false,
>  	.per_op_freq = true,
>  };
>
> @@ -1346,7 +1355,12 @@ static int nxp_fspi_probe(struct platform_device *pdev)
>  	ctlr->bus_num = -1;
>  	ctlr->num_chipselect = NXP_FSPI_MAX_CHIPSELECT;
>  	ctlr->mem_ops = &nxp_fspi_mem_ops;
> -	ctlr->mem_caps = &nxp_fspi_mem_caps;
> +
> +	if (f->devtype_data->quirks & FSPI_QUIRK_DISABLE_DTR)
> +		ctlr->mem_caps = &nxp_fspi_mem_caps_disable_dtr;
> +	else
> +		ctlr->mem_caps = &nxp_fspi_mem_caps;
> +
>  	ctlr->dev.of_node = np;
>
>  	ret = devm_add_action_or_reset(dev, nxp_fspi_cleanup, f);
>
> --
> 2.34.1
>

  reply	other threads:[~2025-09-17 16:30 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-17  7:27 [PATCH v2 0/5] spi: spi-nxp-fspi: add DTR " Haibo Chen
2025-09-17  7:27 ` [PATCH v2 1/5] spi: spi-nxp-fspi: extract function nxp_fspi_dll_override() Haibo Chen
2025-09-17 16:24   ` Frank Li
2025-09-17  7:27 ` [PATCH v2 2/5] spi: spi-nxp-fspi: set back to dll override mode when clock rate < 100MHz Haibo Chen
2025-09-17 16:26   ` Frank Li
2025-09-17  7:27 ` [PATCH v2 3/5] spi: spi-nxp-fspi: Add the DDR LUT command support Haibo Chen
2025-09-17  7:27 ` [PATCH v2 4/5] spi: spi-nxp-fspi: add the support for sample data from DQS pad Haibo Chen
2025-09-17 16:28   ` Frank Li
2025-09-17  7:27 ` [PATCH v2 5/5] spi: spi-nxp-fspi: Add OCT-DTR mode support Haibo Chen
2025-09-17 16:30   ` Frank Li [this message]
2025-09-17 18:09     ` Mark Brown
2025-09-19 16:03 ` [PATCH v2 0/5] spi: spi-nxp-fspi: add DTR " Mark Brown

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