From: Linu Cherian <linu.cherian@arm.com>
To: Ryan Roberts <ryan.roberts@arm.com>
Cc: Will Deacon <will@kernel.org>, Ard Biesheuvel <ardb@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
Oliver Upton <oliver.upton@linux.dev>,
Marc Zyngier <maz@kernel.org>, Dev Jain <dev.jain@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 09/13] arm64: mm: Refactor flush_tlb_page() to use __tlbi_level_asid()
Date: Tue, 6 Jan 2026 08:55:44 +0530 [thread overview]
Message-ID: <aVyAuMxJQ2mXpFd1@a079125.arm.com> (raw)
In-Reply-To: <20251216144601.2106412-10-ryan.roberts@arm.com>
On Tue, Dec 16, 2025 at 02:45:54PM +0000, Ryan Roberts wrote
> Now that we have __tlbi_level_asid(), let's refactor the
> *flush_tlb_page*() variants to use it rather than open coding.
>
> The emitted tlbi(s) is/are intended to be exactly the same as before; no
> TTL hint is provided. Although the spec for flush_tlb_page() allows for
> setting the TTL hint to 3, it turns out that
> flush_tlb_fix_spurious_fault_pmd() depends on
> local_flush_tlb_page_nonotify() to invalidate the level 2 entry. This
> will be fixed separately.
>
> Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
> ---
> arch/arm64/include/asm/tlbflush.h | 12 ++----------
> 1 file changed, 2 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index 3b72a71feac0..37c782ddc149 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -327,12 +327,8 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
> static inline void __local_flush_tlb_page_nonotify_nosync(struct mm_struct *mm,
> unsigned long uaddr)
> {
> - unsigned long addr;
> -
> dsb(nshst);
> - addr = __TLBI_VADDR(uaddr, ASID(mm));
> - __tlbi(vale1, addr);
> - __tlbi_user(vale1, addr);
> + __tlbi_level_asid(vale1, uaddr, TLBI_TTL_UNKNOWN, ASID(mm));
> }
>
> static inline void local_flush_tlb_page_nonotify(struct vm_area_struct *vma,
> @@ -354,12 +350,8 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma,
> static inline void __flush_tlb_page_nosync(struct mm_struct *mm,
> unsigned long uaddr)
> {
> - unsigned long addr;
> -
> dsb(ishst);
> - addr = __TLBI_VADDR(uaddr, ASID(mm));
> - __tlbi(vale1is, addr);
> - __tlbi_user(vale1is, addr);
> + __tlbi_level_asid(vale1is, uaddr, TLBI_TTL_UNKNOWN, ASID(mm));
> mmu_notifier_arch_invalidate_secondary_tlbs(mm, uaddr & PAGE_MASK,
> (uaddr & PAGE_MASK) + PAGE_SIZE);
> }
Reviewed-by: Linu Cherian <linu.cherian@arm.com>
next prev parent reply other threads:[~2026-01-06 3:25 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-16 14:45 [PATCH v1 00/13] arm64: Refactor TLB invalidation API and implementation Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 01/13] arm64: mm: Re-implement the __tlbi_level macro as a C function Ryan Roberts
2025-12-16 17:53 ` Jonathan Cameron
2026-01-02 14:18 ` Ryan Roberts
2026-01-05 5:30 ` Linu Cherian
2026-01-05 17:09 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 02/13] arm64: mm: Introduce a C wrapper for by-range TLB invalidation Ryan Roberts
2026-01-05 5:33 ` Linu Cherian
2026-01-05 17:12 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 03/13] arm64: mm: Implicitly invalidate user ASID based on TLBI operation Ryan Roberts
2025-12-16 18:01 ` Jonathan Cameron
2026-01-02 14:20 ` Ryan Roberts
2025-12-18 6:30 ` Linu Cherian
2025-12-18 7:05 ` Linu Cherian
2025-12-18 15:47 ` Linu Cherian
2026-01-02 14:30 ` Ryan Roberts
2026-01-05 13:03 ` Linu Cherian
2026-01-05 5:34 ` Linu Cherian
2026-01-05 17:13 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 04/13] arm64: mm: Push __TLBI_VADDR() into __tlbi_level() Ryan Roberts
2026-01-05 5:35 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 05/13] arm64: mm: Inline __TLBI_VADDR_RANGE() into __tlbi_range() Ryan Roberts
2026-01-05 5:35 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 06/13] arm64: mm: Re-implement the __flush_tlb_range_op macro in C Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 07/13] arm64: mm: Simplify __TLBI_RANGE_NUM() macro Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 08/13] arm64: mm: Simplify __flush_tlb_range_limit_excess() Ryan Roberts
2025-12-17 8:12 ` Dev Jain
2026-01-02 15:23 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 09/13] arm64: mm: Refactor flush_tlb_page() to use __tlbi_level_asid() Ryan Roberts
2026-01-06 3:25 ` Linu Cherian [this message]
2025-12-16 14:45 ` [PATCH v1 10/13] arm64: mm: Refactor __flush_tlb_range() to take flags Ryan Roberts
2026-01-06 4:51 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 11/13] arm64: mm: More flags for __flush_tlb_range() Ryan Roberts
2026-01-06 15:28 ` Linu Cherian
2026-01-12 11:52 ` Ryan Roberts
2026-01-07 3:21 ` Linu Cherian
2026-01-12 12:00 ` Ryan Roberts
2025-12-16 14:45 ` [PATCH v1 12/13] arm64: mm: Wrap flush_tlb_page() around ___flush_tlb_range() Ryan Roberts
2026-01-07 9:57 ` Linu Cherian
2025-12-16 14:45 ` [PATCH v1 13/13] arm64: mm: Provide level hint for flush_tlb_page() Ryan Roberts
2026-01-07 14:44 ` Linu Cherian
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