[PATCH][RFC] platform/x86: intel_speed_select: Use static_cpu_has for HWP check

[PATCH][RFC] platform/x86: intel_speed_select: Use static_cpu_has for HWP check

[lirongqing]

From: Li RongQing <lirongqing@baidu.com>

The current implementation of disable_dynamic_sst_features() reads
MSR_PM_ENABLE to check if HWP is enabled. This can be optimized by
using static_cpu_has(X86_FEATURE_HWP), which is the standard way
in the kernel to check for HWP support without the overhead of
an MSR read.

Replace the MSR read with static_cpu_has().

Signed-off-by: Li RongQing <lirongqing@baidu.com>
---
 drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
index b8cdaa2..416620b 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
@@ -556,10 +556,7 @@ static struct tpmi_per_power_domain_info *get_instance(int pkg_id, int power_dom
 
 static bool disable_dynamic_sst_features(void)
 {
-	u64 value;
-
-	rdmsrq(MSR_PM_ENABLE, value);
-	return !(value & 0x1);
+	return !static_cpu_has(X86_FEATURE_HWP);
 }
 
 #define _read_cp_info(name_str, name, offset, start, width, mult_factor)\
-- 
2.9.4

答复: [PATCH][RFC] platform/x86: intel_speed_select: Use static_cpu_has for HWP check

[Li,Rongqing(ACG CCN)]

>  static bool disable_dynamic_sst_features(void)
>  {
> -	u64 value;
> -
> -	rdmsrq(MSR_PM_ENABLE, value);
> -	return !(value & 0x1);
> +	return !static_cpu_has(X86_FEATURE_HWP);
>  }
> 
>  #define _read_cp_info(name_str, name, offset, start, width, mult_factor)\
> --


static_cpu_has(X86_FEATURE_HWP) is different from value of MSR_PM_ENABLE, when intel_pstate=no_hwp is configured in kernel cmdline

Sorry for the noise, please drop this patch;

[Li,Rongqing] 


> 2.9.4

Re: [PATCH][RFC] platform/x86: intel_speed_select: Use static_cpu_has for HWP check

[srinivas pandruvada]

On Fri, 2026-02-27 at 22:51 -0500, lirongqing wrote:
> From: Li RongQing <lirongqing@baidu.com>
> 
> The current implementation of disable_dynamic_sst_features() reads
> MSR_PM_ENABLE to check if HWP is enabled. This can be optimized by
> using static_cpu_has(X86_FEATURE_HWP), which is the standard way
> in the kernel to check for HWP support without the overhead of
> an MSR read.
> 
> Replace the MSR read with static_cpu_has().
> 
That is not same. Presence of HWP feature means that HWP can be enabled
on this SoC. But user can boot with option to not enable HWP by
intel_pstate driver.
If HWP is not enabled, then SST features can't be enabled.

Thanks,
Srinivas

> Signed-off-by: Li RongQing <lirongqing@baidu.com>
> ---
>  drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c | 5 +---
> -
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git
> a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> index b8cdaa2..416620b 100644
> --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> @@ -556,10 +556,7 @@ static struct tpmi_per_power_domain_info
> *get_instance(int pkg_id, int power_dom
>  
>  static bool disable_dynamic_sst_features(void)
>  {
> -	u64 value;
> -
> -	rdmsrq(MSR_PM_ENABLE, value);
> -	return !(value & 0x1);
> +	return !static_cpu_has(X86_FEATURE_HWP);
>  }
>  
>  #define _read_cp_info(name_str, name, offset, start, width,
> mult_factor)\

Re: 答复: [PATCH][RFC] platform/x86: intel_speed_select: Use static_cpu_has for HWP check

[srinivas pandruvada]

On Sat, 2026-02-28 at 06:57 +0000, Li,Rongqing(ACG CCN) wrote:
> >  static bool disable_dynamic_sst_features(void)
> >  {
> > -	u64 value;
> > -
> > -	rdmsrq(MSR_PM_ENABLE, value);
> > -	return !(value & 0x1);
> > +	return !static_cpu_has(X86_FEATURE_HWP);
> >  }
> > 
> >  #define _read_cp_info(name_str, name, offset, start, width,
> > mult_factor)\
> > --
> 
> 
> static_cpu_has(X86_FEATURE_HWP) is different from value of
> MSR_PM_ENABLE, when intel_pstate=no_hwp is configured in kernel
> cmdline
> 
> Sorry for the noise, please drop this patch;
> 

No worries.

-Srinivas

> [Li,Rongqing] 
> 
> 
> > 2.9.4

答复: [外部邮件] Re: [PATCH][RFC] platform/x86: intel_speed_select: Use static_cpu_has for HWP check

[Li,Rongqing(ACG CCN)]

> That is not same. Presence of HWP feature means that HWP can be enabled on
> this SoC. But user can boot with option to not enable HWP by intel_pstate
> driver.

> If HWP is not enabled, then SST features can't be enabled.
> 

If HWP is not enabled, Can the PCT is enabled from BIOS? 

In my machine, HWP is disabled, but PCT is enabled; and can not disable PCT by " ./intel-speed-select core-power disable"


[root@tjzj-acg-tge2026-01-281zrfild.tjzj.baidu.com ~]# rdmsr 0x770
0
[root@tjzj-acg-tge2026-01-281zrfild.tjzj.baidu.com ~]# cpupower monitor
              | Nehalem                   || Mperf              || Idle_Stats
 PKG|CORE| CPU| C3   | C6   | PC3  | PC6   || C0   | Cx   | Freq  || POLL | C1
   0|   0|   0|  0.00|  0.00|  0.00|  0.00||  0.64| 99.36|  4598||  0.00| 99.50
   0|   0| 128|  0.00|  0.00|  0.00|  0.00||  1.98| 98.02|  4581||  0.00| 98.10
   0|   1|   1|  0.00|  0.00|  0.00|  0.00|| 99.38|  0.62|  2299||  0.00|  0.00
   0|   1| 129|  0.00|  0.00|  0.00|  0.00|| 99.18|  0.82|  2299||  0.00|  0.00
   0|   2|   2|  0.00|  0.00|  0.00|  0.00|| 99.38|  0.62|  2299||  0.00|  0.00
   0|   2| 130|  0.00|  0.00|  0.00|  0.00|| 99.18|  0.82|  2299||  0.00|  0.00
   0|   3|   3|  0.00|  0.00|  0.00|  0.00||  3.13| 96.87|  2300||  0.00| 96.90
   0|   3| 131|  0.00|  0.00|  0.00|  0.00||  0.01| 99.99|  2754||  0.00| 100.2
   0|   4|   4|  0.00|  0.00|  0.00|  0.00||  1.38| 98.62|  2301||  0.00| 98.81
   0|   4| 132|  0.00|  0.00|  0.00|  0.00||  0.18| 99.82|  2321||  0.00| 100.0
   0|   5|   5|  0.00|  0.00|  0.00|  0.00||  0.61| 99.39|  2305||  0.00| 100.1
   0|   5| 133|  0.00|  0.00|  0.00|  0.00||  5.13| 94.87|  2299||  0.02| 95.02
   0|   6|   6|  0.00|  0.00|  0.00|  0.00||  0.15| 99.85|  2321||  0.00| 100.5
   0|   6| 134|  0.00|  0.00|  0.00|  0.00||  2.28| 97.72|  2300||  0.00| 98.00
   0|   7|   7|  0.00|  0.00|  0.00|  0.00||  0.67| 99.33|  2305||  0.00| 99.76
   0|   7| 135|  0.00|  0.00|  0.00|  0.00||  0.20| 99.80|  2319||  0.00| 100.0
   0|   8|   8|  0.00|  0.00|  0.00|  0.00|| 10.16| 89.84|  2299||  0.02| 89.91
   0|   8| 136|  0.00|  0.00|  0.00|  0.00||  0.01| 99.99|  2786||  0.00| 100.2
   0|   9|   9|  0.00|  0.00|  0.00|  0.00||  0.04| 99.96|  2393||  0.00| 100.4
   0|   9| 137|  0.00|  0.00|  0.00|  0.00||  2.17| 97.83|  2300||  0.00| 97.84



[Li,Rongqing] 



> Thanks,
> Srinivas
> 
> > Signed-off-by: Li RongQing <lirongqing@baidu.com>
> > ---
> >  drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c | 5 +---
> > -
> >  1 file changed, 1 insertion(+), 4 deletions(-)
> >
> > diff --git
> > a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> > b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> > index b8cdaa2..416620b 100644
> > --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> > +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> > @@ -556,10 +556,7 @@ static struct tpmi_per_power_domain_info
> > *get_instance(int pkg_id, int power_dom
> >
> >  static bool disable_dynamic_sst_features(void)
> >  {
> > -	u64 value;
> > -
> > -	rdmsrq(MSR_PM_ENABLE, value);
> > -	return !(value & 0x1);
> > +	return !static_cpu_has(X86_FEATURE_HWP);
> >  }
> >
> >  #define _read_cp_info(name_str, name, offset, start, width,
> > mult_factor)\