[PATCH] mmc: sdhci-of-dwcmshc: downgrade HS200/HS400 clock-reduce message to dev_dbg

[PATCH] mmc: sdhci-of-dwcmshc: downgrade HS200/HS400 clock-reduce message to dev_dbg

[Jun Yan]

dwcmshc_rk3568_set_clock() refuses to lower the bus clock below 52 MHz
when the eMMC is in HS200/HS400 mode, since those modes require a
minimum 52 MHz bus clock.  This is expected behaviour, but it is
currently reported at dev_err level and therefore fires on every boot
and on every suspend/resume cycle, cluttering the kernel log.

Demote the message to dev_dbg so it stays out of the default log while
remaining available via dynamic debug.

Signed-off-by: Jun Yan <jerrysteve1101@gmail.com>
---
 drivers/mmc/host/sdhci-of-dwcmshc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index c688f3eaf468..b4fb1c1e6d99 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -790,7 +790,7 @@ static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock
 	if (clock <= 52000000) {
 		if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200 ||
 		    host->mmc->ios.timing == MMC_TIMING_MMC_HS400) {
-			dev_err(mmc_dev(host->mmc),
+			dev_dbg(mmc_dev(host->mmc),
 				"Can't reduce the clock below 52MHz in HS200/HS400 mode");
 			goto enable_clk;
 		}
-- 
2.56.0

Re: [PATCH] mmc: sdhci-of-dwcmshc: downgrade HS200/HS400 clock-reduce message to dev_dbg

[Shawn Lin]

Hi Jun

在 2026/10/09 星期五 16:46, Jun Yan 写道:
> dwcmshc_rk3568_set_clock() refuses to lower the bus clock below 52 MHz
> when the eMMC is in HS200/HS400 mode, since those modes require a
> minimum 52 MHz bus clock.  This is expected behaviour, but it is
> currently reported at dev_err level and therefore fires on every boot
> and on every suspend/resume cycle, cluttering the kernel log.
> 
> Demote the message to dev_dbg so it stays out of the default log while
> remaining available via dynamic debug.
> 

ios.clock and ios.timing are independent fields, updated by the MMC core
through separate calls. During card init, the core will hit this that
clock <= 52 MHz  but timing in {HS200, HS400}, so it is a normal,
intermediate state, not an error. So the message on every boot.

Changes it to dev_dbg is fine to me:
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>

Thanks.

> Signed-off-by: Jun Yan <jerrysteve1101@gmail.com>
> ---
>   drivers/mmc/host/sdhci-of-dwcmshc.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index c688f3eaf468..b4fb1c1e6d99 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -790,7 +790,7 @@ static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock
>   	if (clock <= 52000000) {
>   		if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200 ||
>   		    host->mmc->ios.timing == MMC_TIMING_MMC_HS400) {
> -			dev_err(mmc_dev(host->mmc),
> +			dev_dbg(mmc_dev(host->mmc),
>   				"Can't reduce the clock below 52MHz in HS200/HS400 mode");
>   			goto enable_clk;
>   		}

Re: [PATCH] mmc: sdhci-of-dwcmshc: downgrade HS200/HS400 clock-reduce message to dev_dbg

[Adrian Hunter]

On 09/10/2026 11:46, Jun Yan wrote:
> dwcmshc_rk3568_set_clock() refuses to lower the bus clock below 52 MHz
> when the eMMC is in HS200/HS400 mode, since those modes require a
> minimum 52 MHz bus clock.  This is expected behaviour, but it is
> currently reported at dev_err level and therefore fires on every boot
> and on every suspend/resume cycle, cluttering the kernel log.
> 
> Demote the message to dev_dbg so it stays out of the default log while
> remaining available via dynamic debug.
> 
> Signed-off-by: Jun Yan <jerrysteve1101@gmail.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-of-dwcmshc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
> index c688f3eaf468..b4fb1c1e6d99 100644
> --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> @@ -790,7 +790,7 @@ static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock
>  	if (clock <= 52000000) {
>  		if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200 ||
>  		    host->mmc->ios.timing == MMC_TIMING_MMC_HS400) {
> -			dev_err(mmc_dev(host->mmc),
> +			dev_dbg(mmc_dev(host->mmc),
>  				"Can't reduce the clock below 52MHz in HS200/HS400 mode");
>  			goto enable_clk;
>  		}