From: Frank Li <Frank.li@nxp.com>
To: Koichiro Den <den@valinux.co.jp>
Cc: Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Marek Vasut <marek.vasut+renesas@mailbox.org>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 07/12] dmaengine: dw-edma-pcie: Add default IRQ match data
Date: Thu, 21 May 2026 12:12:31 -0400 [thread overview]
Message-ID: <ag8u762OGN8bV1Vh@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20260521063115.2842238-8-den@valinux.co.jp>
On Thu, May 21, 2026 at 03:31:10PM +0900, Koichiro Den wrote:
> Store the default per-channel interrupt routing mode in dw-edma-pcie
> match data and copy it into dw_edma_chip during probe.
>
> No functional change intended. Existing Synopsys EDDA and AMD/Xilinx MDB
> matches leave the field zero, which is DW_EDMA_CH_IRQ_DEFAULT.
>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> drivers/dma/dw-edma/dw-edma-pcie.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
> index 8ae164169c7e..cf2f09f1891c 100644
> --- a/drivers/dma/dw-edma/dw-edma-pcie.c
> +++ b/drivers/dma/dw-edma/dw-edma-pcie.c
> @@ -83,6 +83,7 @@ struct dw_edma_pcie_match_data {
> int (*parse_caps)(struct pci_dev *pdev,
> struct dw_edma_pcie_data *pdata, bool *non_ll);
> unsigned long flags;
> + enum dw_edma_ch_irq_mode default_irq_mode;
> };
>
> #define DW_EDMA_PCIE_F_DEVMEM_PHYS_OFF BIT(0)
> @@ -432,6 +433,7 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev,
> chip->dev = dev;
>
> chip->mf = dma_data->mf;
> + chip->default_irq_mode = match->default_irq_mode;
> chip->nr_irqs = nr_irqs;
> chip->ops = &dw_edma_pcie_plat_ops;
> chip->cfg_non_ll = non_ll;
> --
> 2.51.0
>
next prev parent reply other threads:[~2026-05-21 16:12 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 6:31 [PATCH 00/12] dmaengine: dw-edma: Prepare for PCI EP DMA (part 1/3) Koichiro Den
2026-05-21 6:31 ` [PATCH 01/12] dmaengine: Make dma_get_slave_channel() public Koichiro Den
2026-05-21 6:31 ` [PATCH 02/12] dmaengine: dw-edma: Add channel lookup helper Koichiro Den
2026-05-21 15:50 ` Frank Li
2026-05-21 6:31 ` [PATCH 03/12] dmaengine: dw-edma: Add per-channel interrupt routing control Koichiro Den
2026-05-21 6:31 ` [PATCH 04/12] dmaengine: dw-edma: Add partial channel ownership mode Koichiro Den
2026-05-21 6:31 ` [PATCH 05/12] dmaengine: dw-edma-pcie: Add capability match data Koichiro Den
2026-05-21 16:06 ` Frank Li
2026-05-22 14:38 ` Koichiro Den
2026-05-22 20:54 ` Frank Li
2026-05-21 6:31 ` [PATCH 06/12] dmaengine: dw-edma-pcie: Rename DMA data copy Koichiro Den
2026-05-21 16:10 ` Frank Li
2026-05-22 14:41 ` Koichiro Den
2026-05-21 6:31 ` [PATCH 07/12] dmaengine: dw-edma-pcie: Add default IRQ match data Koichiro Den
2026-05-21 16:12 ` Frank Li [this message]
2026-05-21 6:31 ` [PATCH 08/12] dmaengine: dw-edma-pcie: Add raw slave address match flag Koichiro Den
2026-05-21 16:15 ` Frank Li
2026-05-22 14:45 ` Koichiro Den
2026-05-21 6:31 ` [PATCH 09/12] dmaengine: dw-edma-pcie: Add register offset " Koichiro Den
2026-05-21 16:17 ` Frank Li
2026-05-22 14:57 ` Koichiro Den
2026-05-22 20:51 ` Frank Li
2026-05-21 6:31 ` [PATCH 10/12] dmaengine: dw-edma-pcie: Factor descriptor block addresses Koichiro Den
2026-05-21 16:21 ` Frank Li
2026-05-21 6:31 ` [PATCH 11/12] dmaengine: dw-edma-pcie: Handle optional data blocks Koichiro Den
2026-05-21 16:25 ` Frank Li
2026-05-21 6:31 ` [PATCH 12/12] dmaengine: dw-edma-pcie: Add chip flags match data Koichiro Den
2026-05-21 16:26 ` Frank Li
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