* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-07-02 16:01 Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-07-02 16:01 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Andrew Martin, Linux Kernel Mailing List,
Linux Next Mailing List, William Palacek
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Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
between commit:
1142738572ef3 ("drm/amdkfd: Fix SMI event PID reporting for containers")
from the origin tree and commits:
60271ec06e04b ("drm/amdkfd: Fix SMI event PID reporting for containers")
9ba9a1486312d ("drm/amdkfd: use scnprintf/vscnprintf in kfd_smi_event_add")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --cc drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
index e659cd50eb0bd,6a7b4d959541b..0000000000000
--- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
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^ permalink raw reply [flat|nested] 12+ messages in thread* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-11-10 19:34 Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-11-10 19:34 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Alex Hung, Asad Kamal, Hawking Zhang, Heng Zhou,
Ivan Lipski, Jesse Zhang, John Harrison, Kees Cook, Kees Cook,
Kenneth Feng, Kevin Wang, Linux Kernel Mailing List,
Linux Next Mailing List, Luqmaan Irshad, Maxime Ripard, Ray Wu,
Sunil Khatri, Tom Chung
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Hi all,
Today's linux-next merge of the amdgpu tree got conflicts in:
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c
drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test.c
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.h
between commits:
0af298e62e5cf ("treewide: refresh kmalloc_obj() conversions")
e5e23f4d97d3e ("drm/amdgpu: dm: Switch to drm_atomic_helper_connector_create_state")
6027db7db7737 ("drm/amd/pm: preserve committed OD features for SMU 13.0.0/13.0.7")
44d0d3031e479 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
947da95066248 ("drm/amdgpu: wake the GPU for INFO queries that access the hardware")
4c2c17f639b39 ("drm/amd/pm: Notify node unload during driver unload")
0c8b2a9b97852 ("drm/amd/pm: Add NPM metrics reads and SetNpmLimit")
1afded4c7642e ("drm/amd/pm: Add set_npm_limit function")
from the origin tree and commits:
184c9b0c4bd16 ("drm/amdgpu/gfx12: program the SPM VMID once the RLC runs")
b1680aea938dd ("drm/amd/display: Fix use-after-free in dm_test_hpd_rx_offload_work_msg_rdy")
907aebc5578ae ("drm/amdgpu/gfx12: disallow GFXOFF while updating the SPM VMID")
5c99c1a6f168c ("drm/amd/pm: Add a metrics revision for SMU 15.0.8")
3888e12e4cd5a ("drm/amd/pm: Report SMU 15.0.8 XGMI bandwidth")
ea449fd526d2c ("drm/amdgpu/gfx12: flush the scratch register write in the ring test")
a5b825c0c583c ("drm/amd/display: Assert NOT_NULL on allocs")
137f79a560320 ("drm/amd/display: Use kunit_kcalloc for arrays")
adf63026e1fa7 ("drm/amd/pm: preserve committed OD features for SMU 13.0.0/13.0.7")
d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
d0cf969e9fdc5 ("drm/amd/display: fix NULL dc deref in hpd_init KUnit tests")
f9fcae49dfef2 ("drm/amdgpu: return copy errors from AMDGPU_INFO_UQ_FW_AREAS")
09e125304063e ("drm/amdgpu: defer XCP DRM device free until primary release")
90b1b26bb030d ("drm/amdgpu: remove the unused ring parameter from update_spm_vmid()")
0788f801df5ad ("drm/amdgpu: use spm_vmid for the default RLC SPM VMID")
6c056350226aa ("drm/amdkfd: fix lost wakeup in interrupt drain on debugged process exit")
f02d796d69b68 ("drm/amdgpu/gfx_v12_0: Remove legacy CP programming")
002bf1a555a0c ("drm/amdgpu: store the user-queue VMID mask instead of first_kfd_vmid")
5ee0ab19c2c0e ("drm/amdgpu: wake the GPU for INFO queries that access the hardware")
8b810d7825aa9 ("drm/amd/pm: Notify node unload during driver unload")
f918ad983d61e ("drm/amd/pm: Add NPM metrics reads and SetNpmLimit")
65d4256d3cf01 ("drm/amd/pm: Add set_npm_limit function")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 335c523592bfa,7c9c58af06583..0000000000000
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@@ -919,7 -919,8 +919,7 @@@ int amdgpu_info_ioctl(struct drm_devic
if (ret)
return ret;
- regs = kmalloc_array(info->read_mmr_reg.count, sizeof(*regs),
- GFP_KERNEL);
+ regs = kmalloc_objs(*regs, info->read_mmr_reg.count);
if (!regs)
return -ENOMEM;
@@@ -1430,24 -1431,24 +1430,24 @@@
return ret;
ret = copy_to_user(out, &meta_info,
- min((size_t)size, sizeof(meta_info))) ? -EFAULT : 0;
- return 0;
+ min((size_t)size, sizeof(meta_info)));
+ return ret ? -EFAULT : 0;
case AMDGPU_HW_IP_COMPUTE:
ret = amdgpu_userq_metadata_info_compute(adev, info, &meta_info.compute);
if (ret)
return ret;
ret = copy_to_user(out, &meta_info,
- min((size_t)size, sizeof(meta_info))) ? -EFAULT : 0;
- return 0;
+ min((size_t)size, sizeof(meta_info)));
+ return ret ? -EFAULT : 0;
case AMDGPU_HW_IP_DMA:
ret = amdgpu_userq_metadata_info_sdma(adev, info, &meta_info.sdma);
if (ret)
return ret;
ret = copy_to_user(out, &meta_info,
- min((size_t)size, sizeof(meta_info))) ? -EFAULT : 0;
- return 0;
+ min((size_t)size, sizeof(meta_info)));
+ return ret ? -EFAULT : 0;
default:
return -EINVAL;
}
@@@ -1517,7 -1518,7 +1517,7 @@@ int amdgpu_driver_open_kms(struct drm_d
if (r < 0)
goto pm_put;
- fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
+ fpriv = kzalloc_obj(*fpriv);
if (unlikely(!fpriv)) {
r = -ENOMEM;
goto out_suspend;
@@@ -1533,6 -1534,8 +1533,8 @@@
if (r)
goto error_pasid;
+ init_completion(&fpriv->irq_drain_done);
+
pasid = amdgpu_pasid_alloc(16, fpriv);
if (pasid < 0) {
dev_warn(adev->dev, "No more PASIDs available!");
@@@ -1668,6 -1671,7 +1670,7 @@@ void amdgpu_driver_release_kms(struct d
{
struct amdgpu_device *adev = drm_to_adev(dev);
+ amdgpu_xcp_dev_fini(adev);
amdgpu_device_fini_sw(adev);
pci_set_drvdata(adev->pdev, NULL);
}
diff --combined drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 95f2dbba65852,cb15dad0e57b9..0000000000000
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@@ -286,6 -286,8 +286,8 @@@ static void gfx_v12_0_ring_invalidate_t
bool all_hub, uint8_t dst_sel);
static void gfx_v12_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id);
static void gfx_v12_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id);
+ static void gfx_v12_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id,
+ unsigned int vmid);
static void gfx_v12_0_userq_priv_fault_work(struct work_struct *work);
static void gfx_v12_0_update_perf_clk(struct amdgpu_device *adev,
bool enable);
@@@ -458,6 -460,11 +460,11 @@@ static int gfx_v12_0_ring_test_ring(str
int r;
WREG32(scratch, 0xCAFEDEAD);
+ /*
+ * Read the value back so the posted write reaches the register before
+ * the CP writes the test value; otherwise it can overwrite the result.
+ */
+ RREG32(scratch);
r = amdgpu_ring_alloc(ring, 5);
if (r) {
drm_err(adev_to_drm(adev),
@@@ -771,10 -778,6 +778,6 @@@ static int gfx_v12_0_rlc_init(struct am
return r;
}
- /* init spm vmid with 0xf */
- if (adev->gfx.rlc.funcs->update_spm_vmid)
- adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf);
-
return 0;
}
@@@ -1808,7 -1811,7 +1811,7 @@@ static void gfx_v12_0_init_compute_vmid
SCRATCH_APP_BASE;
mutex_lock(&adev->srbm_mutex);
- for (i = adev->vm_manager.first_kfd_vmid; i < AMDGPU_NUM_VMID; i++) {
+ for_each_uq_gfx_vmid(i, adev) {
soc24_grbm_select(adev, 0, 0, 0, i);
/* CP and shaders */
WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);
@@@ -2147,6 -2150,12 +2150,12 @@@ static int gfx_v12_0_rlc_resume(struct
adev->gfx.rlc.funcs->start(adev);
}
+ /*
+ * The RLC comes up with RLC_SPM_MC_CNTL cleared, program the SPM VMID
+ * once it runs, also after a GPU reset or a resume.
+ */
+ gfx_v12_0_update_spm_vmid(adev, 0, adev->vm_manager.spm_vmid);
+
return 0;
}
@@@ -2714,109 -2723,6 +2723,6 @@@ static int gfx_v12_0_cp_gfx_start(struc
adev->gfx.config.max_hw_contexts - 1);
WREG32_SOC15(GC, 0, regCP_DEVICE_ID, 1);
- if (!amdgpu_async_gfx_ring)
- gfx_v12_0_cp_gfx_enable(adev, true);
-
- return 0;
- }
-
- static void gfx_v12_0_cp_gfx_switch_pipe(struct amdgpu_device *adev,
- CP_PIPE_ID pipe)
- {
- u32 tmp;
-
- tmp = RREG32_SOC15(GC, 0, regGRBM_GFX_CNTL);
- tmp = REG_SET_FIELD(tmp, GRBM_GFX_CNTL, PIPEID, pipe);
-
- WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, tmp);
- }
-
- static void gfx_v12_0_cp_gfx_set_doorbell(struct amdgpu_device *adev,
- struct amdgpu_ring *ring)
- {
- u32 tmp;
-
- tmp = RREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL);
- if (ring->use_doorbell) {
- tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
- DOORBELL_OFFSET, ring->doorbell_index);
- tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
- DOORBELL_EN, 1);
- } else {
- tmp = REG_SET_FIELD(tmp, CP_RB_DOORBELL_CONTROL,
- DOORBELL_EN, 0);
- }
- WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_CONTROL, tmp);
-
- tmp = REG_SET_FIELD(0, CP_RB_DOORBELL_RANGE_LOWER,
- DOORBELL_RANGE_LOWER, ring->doorbell_index);
- WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_LOWER, tmp);
-
- WREG32_SOC15(GC, 0, regCP_RB_DOORBELL_RANGE_UPPER,
- CP_RB_DOORBELL_RANGE_UPPER__DOORBELL_RANGE_UPPER_MASK);
- }
-
- static int gfx_v12_0_cp_gfx_resume(struct amdgpu_device *adev)
- {
- struct amdgpu_ring *ring;
- u32 tmp;
- u32 rb_bufsz;
- u64 rb_addr, rptr_addr, wptr_gpu_addr;
-
- /* Set the write pointer delay */
- WREG32_SOC15(GC, 0, regCP_RB_WPTR_DELAY, 0);
-
- /* set the RB to use vmid 0 */
- WREG32_SOC15(GC, 0, regCP_RB_VMID, 0);
-
- /* Init gfx ring 0 for pipe 0 */
- mutex_lock(&adev->srbm_mutex);
- gfx_v12_0_cp_gfx_switch_pipe(adev, PIPE_ID0);
-
- /* Set ring buffer size */
- ring = &adev->gfx.gfx_ring[0];
- rb_bufsz = order_base_2(ring->ring_size / 8);
- tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);
- tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);
- tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, KMD_QUEUE, 1);
- WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);
-
- /* Initialize the ring buffer's write pointers */
- ring->wptr = 0;
- WREG32_SOC15(GC, 0, regCP_RB0_WPTR, lower_32_bits(ring->wptr));
- WREG32_SOC15(GC, 0, regCP_RB0_WPTR_HI, upper_32_bits(ring->wptr));
-
- /* set the wb address whether it's enabled or not */
- rptr_addr = ring->rptr_gpu_addr;
- WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR, lower_32_bits(rptr_addr));
- WREG32_SOC15(GC, 0, regCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) &
- CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK);
-
- wptr_gpu_addr = ring->wptr_gpu_addr;
- WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_LO,
- lower_32_bits(wptr_gpu_addr));
- WREG32_SOC15(GC, 0, regCP_RB_WPTR_POLL_ADDR_HI,
- upper_32_bits(wptr_gpu_addr));
-
- mdelay(1);
- WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);
-
- rb_addr = ring->gpu_addr >> 8;
- WREG32_SOC15(GC, 0, regCP_RB0_BASE, rb_addr);
- WREG32_SOC15(GC, 0, regCP_RB0_BASE_HI, upper_32_bits(rb_addr));
-
- WREG32_SOC15(GC, 0, regCP_RB_ACTIVE, 1);
-
- gfx_v12_0_cp_gfx_set_doorbell(adev, ring);
- mutex_unlock(&adev->srbm_mutex);
-
- /* Switch to pipe 0 */
- mutex_lock(&adev->srbm_mutex);
- gfx_v12_0_cp_gfx_switch_pipe(adev, PIPE_ID0);
- mutex_unlock(&adev->srbm_mutex);
-
- /* start the ring */
- gfx_v12_0_cp_gfx_start(adev);
return 0;
}
@@@ -3520,9 -3426,6 +3426,6 @@@ static int gfx_v12_0_kcq_resume(struct
{
int i, r;
- if (!amdgpu_async_gfx_ring)
- gfx_v12_0_cp_compute_enable(adev, true);
-
for (i = 0; i < adev->gfx.num_compute_rings; i++) {
r = gfx_v12_0_kcq_init_queue(&adev->gfx.compute_ring[i]);
if (r)
@@@ -3553,10 -3456,8 +3456,8 @@@ static int gfx_v12_0_cp_resume(struct a
gfx_v12_0_cp_set_doorbell_range(adev);
- if (amdgpu_async_gfx_ring) {
- gfx_v12_0_cp_compute_enable(adev, true);
- gfx_v12_0_cp_gfx_enable(adev, true);
- }
+ gfx_v12_0_cp_compute_enable(adev, true);
+ gfx_v12_0_cp_gfx_enable(adev, true);
if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) {
r = amdgpu_mes_kiq_hw_init(adev, 0);
@@@ -3578,15 -3479,9 +3479,9 @@@
if (r)
return r;
- if (!amdgpu_async_gfx_ring) {
- r = gfx_v12_0_cp_gfx_resume(adev);
- if (r)
- return r;
- } else {
- r = gfx_v12_0_cp_async_gfx_ring_resume(adev);
- if (r)
- return r;
- }
+ r = gfx_v12_0_cp_async_gfx_ring_resume(adev);
+ if (r)
+ return r;
for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
ring = &adev->gfx.gfx_ring[i];
@@@ -3902,10 -3797,8 +3797,8 @@@ static int gfx_v12_0_hw_fini(struct amd
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
if (!adev->no_hw_access) {
- if (amdgpu_async_gfx_ring) {
- if (amdgpu_gfx_disable_kgq(adev, 0))
- DRM_ERROR("KGQ disable failed\n");
- }
+ if (amdgpu_gfx_disable_kgq(adev, 0))
+ DRM_ERROR("KGQ disable failed\n");
if (amdgpu_gfx_disable_kcq(adev, 0))
DRM_ERROR("KCQ disable failed\n");
@@@ -4075,7 -3968,6 +3968,6 @@@ static void gfx_v12_0_update_perf_clk(s
static void gfx_v12_0_update_spm_vmid(struct amdgpu_device *adev,
int xcc_id,
- struct amdgpu_ring *ring,
unsigned vmid)
{
u32 reg, data;
@@@ -4095,14 -3987,6 +3987,6 @@@
else
WREG32_SOC15(GC, 0, regRLC_SPM_MC_CNTL, data);
amdgpu_gfx_off_ctrl(adev, true);
-
- if (ring
- && amdgpu_sriov_is_pp_one_vf(adev)
- && ((ring->funcs->type == AMDGPU_RING_TYPE_GFX)
- || (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE))) {
- uint32_t reg = SOC15_REG_OFFSET(GC, 0, regRLC_SPM_MC_CNTL);
- amdgpu_ring_emit_wreg(ring, reg, data);
- }
}
static const struct amdgpu_rlc_funcs gfx_v12_0_rlc_funcs = {
diff --combined drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c
index abdcf8fd808b9,c130d809098ca..0000000000000
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_crtc_test.c
@@@ -114,7 -114,7 +114,7 @@@ static void dm_test_crtc_vrr_active_irq
struct amdgpu_crtc *acrtc = kunit_kzalloc(test, sizeof(*acrtc),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->dm_irq_params.freesync_config.state = VRR_STATE_ACTIVE_VARIABLE;
@@@ -130,7 -130,7 +130,7 @@@ static void dm_test_crtc_vrr_active_irq
struct amdgpu_crtc *acrtc = kunit_kzalloc(test, sizeof(*acrtc),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->dm_irq_params.freesync_config.state = VRR_STATE_ACTIVE_FIXED;
@@@ -146,7 -146,7 +146,7 @@@ static void dm_test_crtc_vrr_active_irq
struct amdgpu_crtc *acrtc = kunit_kzalloc(test, sizeof(*acrtc),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->dm_irq_params.freesync_config.state = VRR_STATE_INACTIVE;
@@@ -162,7 -162,7 +162,7 @@@ static void dm_test_crtc_vrr_active_irq
struct amdgpu_crtc *acrtc = kunit_kzalloc(test, sizeof(*acrtc),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->dm_irq_params.freesync_config.state = VRR_STATE_DISABLED;
@@@ -178,7 -178,7 +178,7 @@@ static void dm_test_crtc_vrr_active_irq
struct amdgpu_crtc *acrtc = kunit_kzalloc(test, sizeof(*acrtc),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->dm_irq_params.freesync_config.state = VRR_STATE_UNSUPPORTED;
@@@ -197,7 -197,7 +197,7 @@@ static void dm_test_crtc_vrr_active_var
sizeof(*dm_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->freesync_config.state = VRR_STATE_ACTIVE_VARIABLE;
@@@ -214,7 -214,7 +214,7 @@@ static void dm_test_crtc_vrr_active_fix
sizeof(*dm_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->freesync_config.state = VRR_STATE_ACTIVE_FIXED;
@@@ -231,7 -231,7 +231,7 @@@ static void dm_test_crtc_vrr_active_ina
sizeof(*dm_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->freesync_config.state = VRR_STATE_INACTIVE;
@@@ -248,7 -248,7 +248,7 @@@ static void dm_test_crtc_vrr_active_dis
sizeof(*dm_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->freesync_config.state = VRR_STATE_DISABLED;
@@@ -265,7 -265,7 +265,7 @@@ static void dm_test_crtc_vrr_active_uns
sizeof(*dm_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->freesync_config.state = VRR_STATE_UNSUPPORTED;
@@@ -304,7 -304,7 +304,7 @@@ static void dm_test_crtc_is_headless_no
struct amdgpu_device *adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
struct drm_device *dev = dm_kunit_alloc_drm_with_connector_list(test);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
adev->dm.ddev = dev;
KUNIT_EXPECT_TRUE(test, amdgpu_dm_is_headless(adev));
@@@ -320,8 -320,8 +320,8 @@@ static void dm_test_crtc_is_headless_wr
struct drm_device *dev = dm_kunit_alloc_drm_with_connector_list(test);
struct drm_connector *wb = kunit_kzalloc(test, sizeof(*wb), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, wb);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, wb);
adev->dm.ddev = dev;
dm_test_add_connector(dev, wb, DRM_MODE_CONNECTOR_WRITEBACK,
@@@ -340,8 -340,8 +340,8 @@@ static void dm_test_crtc_is_headless_di
struct drm_device *dev = dm_kunit_alloc_drm_with_connector_list(test);
struct drm_connector *display = kunit_kzalloc(test, sizeof(*display), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, display);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, display);
adev->dm.ddev = dev;
dm_test_add_connector(dev, display, DRM_MODE_CONNECTOR_HDMIA,
@@@ -360,8 -360,8 +360,8 @@@ static void dm_test_crtc_is_headless_co
struct drm_device *dev = dm_kunit_alloc_drm_with_connector_list(test);
struct drm_connector *display = kunit_kzalloc(test, sizeof(*display), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, display);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, display);
adev->dm.ddev = dev;
dm_test_add_connector(dev, display, DRM_MODE_CONNECTOR_HDMIA,
@@@ -381,9 -381,9 +381,9 @@@ static void dm_test_crtc_is_headless_mi
struct drm_connector *wb = kunit_kzalloc(test, sizeof(*wb), GFP_KERNEL);
struct drm_connector *display = kunit_kzalloc(test, sizeof(*display), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, wb);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, display);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, wb);
+ KUNIT_ASSERT_NOT_NULL(test, display);
adev->dm.ddev = dev;
dm_test_add_connector(dev, wb, DRM_MODE_CONNECTOR_WRITEBACK,
@@@ -426,7 -426,7 +426,7 @@@ static void dm_test_crtc_set_vupdate_ir
adev = dm_kunit_alloc_adev(test);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->otg_inst = -1;
@@@ -451,7 -451,7 +451,7 @@@ static void dm_test_crtc_set_vupdate_ir
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->otg_inst = 0;
@@@ -514,20 -514,19 +514,19 @@@ static void dm_test_crtc_set_vupdate_ir
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
dc = dm_kunit_alloc_dc_with_ctx(test);
res_pool = kunit_kzalloc(test, sizeof(*res_pool), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, res_pool);
+ KUNIT_ASSERT_NOT_NULL(test, res_pool);
irqs = kunit_kzalloc(test, sizeof(*irqs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, irqs);
+ KUNIT_ASSERT_NOT_NULL(test, irqs);
/*
* Populate the per-source info table so amdgpu_dm_irq_set() succeeds.
*/
- info = kunit_kzalloc(test, sizeof(*info) * DAL_IRQ_SOURCES_NUMBER,
- GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, info);
+ info = kunit_kcalloc(test, DAL_IRQ_SOURCES_NUMBER, sizeof(*info), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, info);
for (i = 0; i < DAL_IRQ_SOURCES_NUMBER; i++)
info[i].funcs = &dm_test_vupdate_irq_src_funcs;
@@@ -560,7 -559,7 +559,7 @@@ static void dm_test_idle_create_workque
struct idle_workqueue *idle_work;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
idle_work = idle_create_workqueue(adev);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, idle_work);
@@@ -588,7 -587,7 +587,7 @@@ static void dm_test_idle_worker_disable
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
idle_work = kunit_kzalloc(test, sizeof(*idle_work), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, idle_work);
+ KUNIT_ASSERT_NOT_NULL(test, idle_work);
idle_work->dm = &adev->dm;
idle_work->enable = false;
@@@ -623,7 -622,7 +622,7 @@@ static void dm_test_idle_worker_enabled
adev->dm.dc->idle_optimizations_allowed = false;
idle_work = kunit_kzalloc(test, sizeof(*idle_work), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, idle_work);
+ KUNIT_ASSERT_NOT_NULL(test, idle_work);
idle_work->dm = &adev->dm;
idle_work->enable = true;
@@@ -668,12 -667,12 +667,12 @@@ static void dm_test_idle_worker_enabled
/* A connected display makes amdgpu_dm_is_headless() false. */
display = kunit_kzalloc(test, sizeof(*display), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, display);
+ KUNIT_ASSERT_NOT_NULL(test, display);
dm_test_add_connector(adev->dm.ddev, display, DRM_MODE_CONNECTOR_HDMIA,
connector_status_connected);
idle_work = kunit_kzalloc(test, sizeof(*idle_work), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, idle_work);
+ KUNIT_ASSERT_NOT_NULL(test, idle_work);
idle_work->dm = &adev->dm;
idle_work->enable = true;
adev->dm.idle_workqueue = idle_work;
@@@ -727,7 -726,7 +726,7 @@@ static void dm_test_idle_worker_enabled
adev->dm.dc->caps.is_apu = true;
/* dc_allow() logs via DC_LOG_DEBUG() when it flips the flag. */
logger = kunit_kzalloc(test, sizeof(*logger), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, logger);
+ KUNIT_ASSERT_NOT_NULL(test, logger);
logger->dev = &adev->ddev;
adev->dm.dc->ctx->logger = logger;
/* dc_allow() only flips the flag when clk_mgr and apply() are present. */
@@@ -736,7 -735,7 +735,7 @@@
adev->dm.dc->hwss.apply_idle_power_optimizations = dm_test_idle_apply_flip;
idle_work = kunit_kzalloc(test, sizeof(*idle_work), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, idle_work);
+ KUNIT_ASSERT_NOT_NULL(test, idle_work);
idle_work->dm = &adev->dm;
idle_work->enable = true;
adev->dm.idle_workqueue = idle_work;
@@@ -764,7 -763,7 +763,7 @@@ static void dm_test_crtc_set_static_scr
struct dc_stream_state *stream;
dm = kunit_kzalloc(test, sizeof(*dm), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm);
+ KUNIT_ASSERT_NOT_NULL(test, dm);
link = dm_kunit_alloc_link(test);
stream = dm_kunit_alloc_stream(test, link);
@@@ -790,7 -789,7 +789,7 @@@ static void dm_test_crtc_set_static_scr
struct dc_stream_state *stream;
dm = kunit_kzalloc(test, sizeof(*dm), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm);
+ KUNIT_ASSERT_NOT_NULL(test, dm);
link = dm_kunit_alloc_link(test);
stream = dm_kunit_alloc_stream(test, link);
@@@ -816,7 -815,7 +815,7 @@@ static void dm_test_crtc_set_static_scr
struct dc_stream_state *stream;
dm = kunit_kzalloc(test, sizeof(*dm), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm);
+ KUNIT_ASSERT_NOT_NULL(test, dm);
link = dm_kunit_alloc_link(test);
stream = dm_kunit_alloc_stream(test, link);
@@@ -842,7 -841,7 +841,7 @@@ static void dm_test_crtc_enable_vblank_
struct amdgpu_crtc *acrtc;
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->base.enabled = false;
@@@ -926,7 -925,7 +925,7 @@@ static void dm_test_crtc_arm_irq_src(st
atomic_t *enabled;
enabled = kunit_kzalloc(test, sizeof(*enabled), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, enabled);
+ KUNIT_ASSERT_NOT_NULL(test, enabled);
atomic_set(enabled, count);
src->num_types = 1;
@@@ -970,11 -969,11 +969,11 @@@ dm_test_crtc_setup_enable(struct kunit
adev->mode_info.num_crtc = 1;
reset_domain = kunit_kzalloc(test, sizeof(*reset_domain), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reset_domain);
+ KUNIT_ASSERT_NOT_NULL(test, reset_domain);
adev->reset_domain = reset_domain;
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->base.funcs = &dm_test_crtc_funcs;
acrtc->base.enabled = true;
@@@ -988,7 -987,7 +987,7 @@@
stream = dm_kunit_alloc_stream(test, link);
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->stream = stream;
acrtc->base.state = &dm_state->base;
@@@ -1053,16 -1052,15 +1052,15 @@@ static void dm_test_crtc_enable_vblank_
acrtc_state->freesync_config.state = VRR_STATE_ACTIVE_VARIABLE;
res_pool = kunit_kzalloc(test, sizeof(*res_pool), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, res_pool);
+ KUNIT_ASSERT_NOT_NULL(test, res_pool);
irqs = kunit_kzalloc(test, sizeof(*irqs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, irqs);
+ KUNIT_ASSERT_NOT_NULL(test, irqs);
/*
* Per-source .set fails so amdgpu_dm_irq_set() reports the source busy.
*/
- info = kunit_kzalloc(test, sizeof(*info) * DAL_IRQ_SOURCES_NUMBER,
- GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, info);
+ info = kunit_kcalloc(test, DAL_IRQ_SOURCES_NUMBER, sizeof(*info), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, info);
for (i = 0; i < DAL_IRQ_SOURCES_NUMBER; i++)
info[i].funcs = &dm_test_vupdate_irq_src_busy_funcs;
@@@ -1286,7 -1284,7 +1284,7 @@@ static struct drm_crtc *dm_test_crtc_se
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
adev->ip_versions[DCE_HWIP][0] = ip_version;
@@@ -1375,7 -1373,7 +1373,7 @@@ static void dm_test_crtc_update_active_
struct dm_crtc_state *dm_state;
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->stream = NULL;
dm_state->active_planes = 5;
@@@ -1413,11 -1411,11 +1411,11 @@@ static void dm_test_count_crtc_active_p
INIT_LIST_HEAD(&dev->mode_config.plane_list);
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = dev;
crtc_state = kunit_kzalloc(test, sizeof(*crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, crtc_state);
crtc_state->state = state;
crtc_state->plane_mask = 0;
@@@ -1452,15 -1450,15 +1450,15 @@@ static void dm_test_count_crtc_active_p
INIT_LIST_HEAD(&dev->mode_config.plane_list);
plane_no_state = kunit_kzalloc(test, sizeof(*plane_no_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane_no_state);
+ KUNIT_ASSERT_NOT_NULL(test, plane_no_state);
plane_cursor = kunit_kzalloc(test, sizeof(*plane_cursor), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane_cursor);
+ KUNIT_ASSERT_NOT_NULL(test, plane_cursor);
plane_with_fb = kunit_kzalloc(test, sizeof(*plane_with_fb), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane_with_fb);
+ KUNIT_ASSERT_NOT_NULL(test, plane_with_fb);
plane_no_fb = kunit_kzalloc(test, sizeof(*plane_no_fb), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane_no_fb);
+ KUNIT_ASSERT_NOT_NULL(test, plane_no_fb);
plane_excluded = kunit_kzalloc(test, sizeof(*plane_excluded), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane_excluded);
+ KUNIT_ASSERT_NOT_NULL(test, plane_excluded);
dm_test_add_plane(dev, plane_no_state, 0, DRM_PLANE_TYPE_PRIMARY);
dm_test_add_plane(dev, plane_cursor, 1, DRM_PLANE_TYPE_CURSOR);
@@@ -1469,19 -1467,19 +1467,19 @@@
dm_test_add_plane(dev, plane_excluded, 4, DRM_PLANE_TYPE_PRIMARY);
fb = kunit_kzalloc(test, sizeof(*fb), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, fb);
+ KUNIT_ASSERT_NOT_NULL(test, fb);
ps_fb = kunit_kzalloc(test, sizeof(*ps_fb), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ps_fb);
+ KUNIT_ASSERT_NOT_NULL(test, ps_fb);
ps_fb->fb = fb;
ps_no_fb = kunit_kzalloc(test, sizeof(*ps_no_fb), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ps_no_fb);
+ KUNIT_ASSERT_NOT_NULL(test, ps_no_fb);
ps_no_fb->fb = NULL;
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = dev;
- state->planes = kunit_kzalloc(test, sizeof(*state->planes) * 5, GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->planes);
+ state->planes = kunit_kcalloc(test, 5, sizeof(*state->planes), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, state->planes);
state->planes[0].new_state = NULL;
state->planes[1].new_state = ps_fb;
state->planes[2].new_state = ps_fb;
@@@ -1489,7 -1487,7 +1487,7 @@@
state->planes[4].new_state = ps_fb;
crtc_state = kunit_kzalloc(test, sizeof(*crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, crtc_state);
crtc_state->state = state;
/* Exclude plane index 4 from the CRTC. */
crtc_state->plane_mask = BIT(0) | BIT(1) | BIT(2) | BIT(3);
@@@ -1514,9 -1512,9 +1512,9 @@@ static void dm_test_crtc_duplicate_stat
struct dm_crtc_state *dm_dup;
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
cur = kunit_kzalloc(test, sizeof(*cur), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, cur);
+ KUNIT_ASSERT_NOT_NULL(test, cur);
cur->abm_level = 3;
cur->active_planes = 2;
@@@ -1560,9 -1558,9 +1558,9 @@@ static void dm_test_crtc_duplicate_stat
struct dc_link *link;
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
cur = kunit_kzalloc(test, sizeof(*cur), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, cur);
+ KUNIT_ASSERT_NOT_NULL(test, cur);
link = dm_kunit_alloc_link(test);
stream = dm_kunit_alloc_stream(test, link);
@@@ -1595,7 -1593,7 +1593,7 @@@ static void dm_test_crtc_duplicate_stat
struct drm_crtc *crtc;
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->state = NULL;
KUNIT_EXPECT_NULL(test, amdgpu_dm_crtc_duplicate_state(crtc));
@@@ -1628,8 -1626,8 +1626,8 @@@ static void dm_test_crtc_destroy_cleans
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, plane);
/* amdgpu_dm_crtc_destroy() kfree()s the CRTC, so use a plain alloc. */
- acrtc = kzalloc_obj(*acrtc, GFP_KERNEL);
+ acrtc = kzalloc_obj(*acrtc);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
ret = drm_crtc_init_with_planes(&adev->ddev, &acrtc->base, plane,
NULL, &dm_test_crtc_funcs, NULL);
@@@ -1657,7 -1655,7 +1655,7 @@@ static void dm_test_crtc_create_state_a
struct drm_crtc *crtc;
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
crtc->state = NULL;
@@@ -1686,7 -1684,7 +1684,7 @@@ static void dm_test_crtc_reset_state_re
struct dc_link *link;
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
link = dm_kunit_alloc_link(test);
@@@ -1695,8 -1693,8 +1693,13 @@@
kref_get(&stream->refcount);
/* reset_state kfree()s the old state, so use a plain (unmanaged) alloc. */
++<<<<<<< HEAD
+ old = kzalloc_obj(*old);
+ KUNIT_ASSERT_NOT_ERR_OR_NULL(test, old);
++=======
+ old = kzalloc_obj(*old, GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, old);
++>>>>>>> amdgpu/drm-next
old->stream = stream;
crtc->state = &old->base;
@@@ -1725,7 -1723,7 +1728,7 @@@ static void dm_test_crtc_destroy_state_
/* destroy_state kfree()s the state, so use a plain (unmanaged) alloc. */
dm_state = kzalloc_obj(*dm_state);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
amdgpu_dm_crtc_destroy_state(NULL, &dm_state->base);
}
@@@ -1755,7 -1753,7 +1758,7 @@@ static void dm_test_crtc_destroy_state_
/* destroy_state kfree()s the state, so use a plain (unmanaged) alloc. */
dm_state = kzalloc_obj(*dm_state);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
dm_state->stream = stream;
amdgpu_dm_crtc_destroy_state(NULL, &dm_state->base);
@@@ -1783,7 -1781,7 +1786,7 @@@ static void dm_test_crtc_handle_vblank_
KUNIT_ASSERT_EQ(test, drm_vblank_init(&adev->ddev, 1), 0);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->event = NULL;
@@@ -1811,9 -1809,9 +1814,9 @@@ static void dm_test_crtc_handle_vblank_
KUNIT_ASSERT_EQ(test, drm_vblank_init(&adev->ddev, 1), 0);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
event = kunit_kzalloc(test, sizeof(*event), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, event);
+ KUNIT_ASSERT_NOT_NULL(test, event);
acrtc->base.dev = &adev->ddev;
acrtc->base.funcs = &dm_test_crtc_funcs;
@@@ -1850,11 -1848,11 +1853,11 @@@ static void dm_test_crtc_handle_vblank_
KUNIT_ASSERT_EQ(test, drm_vblank_init(&adev->ddev, 1), 0);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
/* drm_crtc_send_vblank_event() consumes (kfree()s) the event. */
event = kzalloc_obj(*event);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, event);
+ KUNIT_ASSERT_NOT_NULL(test, event);
acrtc->base.dev = &adev->ddev;
acrtc->base.funcs = &dm_test_crtc_funcs;
@@@ -1907,7 -1905,7 +1910,7 @@@ dm_test_vblank_control_worker_setup(str
adev->dm.active_vblank_irq_count = count;
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->base.state = NULL;
@@@ -1918,7 -1916,7 +1921,7 @@@
/* Worker kfree()s the work item, so it must be a plain allocation. */
work = kzalloc_obj(*work);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, work);
+ KUNIT_ASSERT_NOT_NULL(test, work);
work->dm = &adev->dm;
work->acrtc = acrtc;
work->stream = stream;
@@@ -2012,7 -2010,7 +2015,7 @@@ static void dm_test_crtc_disable_vblank
adev->irq.installed = false;
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->crtc_id = 0;
@@@ -2047,7 -2045,7 +2050,7 @@@ static void dm_test_crtc_disable_vblank
adev->irq.installed = true;
reset_domain = kunit_kzalloc(test, sizeof(*reset_domain), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reset_domain);
+ KUNIT_ASSERT_NOT_NULL(test, reset_domain);
adev->reset_domain = reset_domain;
/* Seed with 2 so amdgpu_irq_put() drops to a non-zero refcount. */
@@@ -2055,7 -2053,7 +2058,7 @@@
dm_test_crtc_arm_irq_src(test, &adev->pageflip_irq, 2);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->crtc_id = 0;
/* OTG unassigned -> amdgpu_dm_crtc_set_vupdate_irq() returns 0 early. */
@@@ -2098,7 -2096,7 +2101,7 @@@ static void dm_test_crtc_disable_vblank
adev->irq.installed = true;
reset_domain = kunit_kzalloc(test, sizeof(*reset_domain), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, reset_domain);
+ KUNIT_ASSERT_NOT_NULL(test, reset_domain);
adev->reset_domain = reset_domain;
/* Seed with 2 so amdgpu_irq_put() drops to a non-zero refcount. */
@@@ -2106,7 -2104,7 +2109,7 @@@
dm_test_crtc_arm_irq_src(test, &adev->pageflip_irq, 2);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
acrtc->base.dev = &adev->ddev;
acrtc->crtc_id = 0;
acrtc->otg_inst = -1;
@@@ -2118,7 -2116,7 +2121,7 @@@
/* CRTC state with no stream -> the stream-retain branch is skipped. */
dm_state = kunit_kzalloc(test, sizeof(*dm_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_state);
acrtc->base.state = &dm_state->base;
/* Real workqueue so the queue_work() branch runs the control worker. */
@@@ -2152,7 -2150,7 +2155,7 @@@ static void dm_test_crtc_late_register_
int ret;
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->debugfs_entry = debugfs_create_dir("dm_test_crtc", NULL);
@@@ -2304,18 -2302,18 +2307,18 @@@ static void dm_test_crtc_atomic_check_n
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
dm_crtc_state = kunit_kzalloc(test, sizeof(*dm_crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_crtc_state);
dm_crtc_state->base.crtc = crtc;
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = &adev->ddev;
state->crtcs = kunit_kzalloc(test, sizeof(*state->crtcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->crtcs);
+ KUNIT_ASSERT_NOT_NULL(test, state->crtcs);
state->crtcs[0].new_state = &dm_crtc_state->base;
dm_crtc_state->base.state = state;
@@@ -2364,24 -2362,24 +2367,24 @@@ static void dm_test_crtc_atomic_check_e
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
primary = kunit_kzalloc(test, sizeof(*primary), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, primary);
+ KUNIT_ASSERT_NOT_NULL(test, primary);
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
crtc->primary = primary;
dm_crtc_state = kunit_kzalloc(test, sizeof(*dm_crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_crtc_state);
dm_crtc_state->base.crtc = crtc;
dm_crtc_state->base.enable = true;
dm_crtc_state->base.plane_mask = 0;
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = &adev->ddev;
state->crtcs = kunit_kzalloc(test, sizeof(*state->crtcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->crtcs);
+ KUNIT_ASSERT_NOT_NULL(test, state->crtcs);
state->crtcs[0].new_state = &dm_crtc_state->base;
dm_crtc_state->base.state = state;
@@@ -2409,20 -2407,20 +2412,20 @@@ static void dm_test_crtc_atomic_check_a
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
dm_crtc_state = kunit_kzalloc(test, sizeof(*dm_crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_crtc_state);
dm_crtc_state->base.crtc = crtc;
dm_crtc_state->base.async_flip = true;
dm_crtc_state->update_type = UPDATE_TYPE_FULL;
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = &adev->ddev;
state->crtcs = kunit_kzalloc(test, sizeof(*state->crtcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->crtcs);
+ KUNIT_ASSERT_NOT_NULL(test, state->crtcs);
state->crtcs[0].new_state = &dm_crtc_state->base;
dm_crtc_state->base.state = state;
@@@ -2453,33 -2451,33 +2456,33 @@@ static void dm_test_crtc_atomic_check_v
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
primary = kunit_kzalloc(test, sizeof(*primary), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, primary);
+ KUNIT_ASSERT_NOT_NULL(test, primary);
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
crtc->primary = primary;
dm_crtc_state = kunit_kzalloc(test, sizeof(*dm_crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_crtc_state);
dm_crtc_state->base.crtc = crtc;
dm_crtc_state->freesync_config.state = VRR_STATE_ACTIVE_VARIABLE;
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = &adev->ddev;
state->crtcs = kunit_kzalloc(test, sizeof(*state->crtcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->crtcs);
+ KUNIT_ASSERT_NOT_NULL(test, state->crtcs);
state->crtcs[0].new_state = &dm_crtc_state->base;
dm_crtc_state->base.state = state;
/* acquire ctx must be set; existing plane state avoids taking a lock. */
state->acquire_ctx = kunit_kzalloc(test, sizeof(*state->acquire_ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->acquire_ctx);
+ KUNIT_ASSERT_NOT_NULL(test, state->acquire_ctx);
state->planes = kunit_kzalloc(test, sizeof(*state->planes), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->planes);
+ KUNIT_ASSERT_NOT_NULL(test, state->planes);
primary_plane_state = kunit_kzalloc(test, sizeof(*primary_plane_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, primary_plane_state);
+ KUNIT_ASSERT_NOT_NULL(test, primary_plane_state);
state->planes[0].new_state = primary_plane_state;
ret = amdgpu_dm_crtc_helper_atomic_check(crtc, state);
@@@ -2514,18 -2512,18 +2517,18 @@@ static void dm_test_crtc_atomic_check_v
dc = dm_kunit_alloc_dc_with_ctx(test);
res_pool = kunit_kzalloc(test, sizeof(*res_pool), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, res_pool);
+ KUNIT_ASSERT_NOT_NULL(test, res_pool);
tg = kunit_kzalloc(test, sizeof(*tg), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, tg);
+ KUNIT_ASSERT_NOT_NULL(test, tg);
tg_funcs = kunit_kzalloc(test, sizeof(*tg_funcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, tg_funcs);
+ KUNIT_ASSERT_NOT_NULL(test, tg_funcs);
tg_funcs->validate_timing = dm_test_atomic_check_validate_timing_ok;
tg->funcs = tg_funcs;
res_pool->timing_generators[0] = tg;
dc->res_pool = res_pool;
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link_srv->validate_mode_timing = dm_test_atomic_check_validate_mode_timing_ok;
dc->link_srv = link_srv;
adev->dm.dc = dc;
@@@ -2535,19 -2533,19 +2538,19 @@@
stream = dm_kunit_alloc_stream(test, link);
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
dm_crtc_state = kunit_kzalloc(test, sizeof(*dm_crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_crtc_state);
dm_crtc_state->base.crtc = crtc;
dm_crtc_state->stream = stream;
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = &adev->ddev;
state->crtcs = kunit_kzalloc(test, sizeof(*state->crtcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->crtcs);
+ KUNIT_ASSERT_NOT_NULL(test, state->crtcs);
state->crtcs[0].new_state = &dm_crtc_state->base;
dm_crtc_state->base.state = state;
@@@ -2582,11 -2580,11 +2585,11 @@@ static void dm_test_crtc_atomic_check_i
dc = dm_kunit_alloc_dc_with_ctx(test);
res_pool = kunit_kzalloc(test, sizeof(*res_pool), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, res_pool);
+ KUNIT_ASSERT_NOT_NULL(test, res_pool);
tg = kunit_kzalloc(test, sizeof(*tg), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, tg);
+ KUNIT_ASSERT_NOT_NULL(test, tg);
tg_funcs = kunit_kzalloc(test, sizeof(*tg_funcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, tg_funcs);
+ KUNIT_ASSERT_NOT_NULL(test, tg_funcs);
tg_funcs->validate_timing = dm_test_atomic_check_validate_timing_fail;
tg->funcs = tg_funcs;
res_pool->timing_generators[0] = tg;
@@@ -2597,19 -2595,19 +2600,19 @@@
stream = dm_kunit_alloc_stream(test, link);
crtc = kunit_kzalloc(test, sizeof(*crtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, crtc);
+ KUNIT_ASSERT_NOT_NULL(test, crtc);
crtc->dev = &adev->ddev;
dm_crtc_state = kunit_kzalloc(test, sizeof(*dm_crtc_state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm_crtc_state);
+ KUNIT_ASSERT_NOT_NULL(test, dm_crtc_state);
dm_crtc_state->base.crtc = crtc;
dm_crtc_state->stream = stream;
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
state->dev = &adev->ddev;
state->crtcs = kunit_kzalloc(test, sizeof(*state->crtcs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state->crtcs);
+ KUNIT_ASSERT_NOT_NULL(test, state->crtcs);
state->crtcs[0].new_state = &dm_crtc_state->base;
dm_crtc_state->base.state = state;
diff --combined drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test.c
index cc6318518ead0,8c112bda46c89..0000000000000
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_irq_test.c
@@@ -428,17 -428,16 +428,16 @@@ static struct dc *dm_test_alloc_dc_with
dc = dm_kunit_alloc_dc_with_ctx(test);
res_pool = kunit_kzalloc(test, sizeof(*res_pool), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, res_pool);
+ KUNIT_ASSERT_NOT_NULL(test, res_pool);
irqs = kunit_kzalloc(test, sizeof(*irqs), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, irqs);
+ KUNIT_ASSERT_NOT_NULL(test, irqs);
/*
* Populate the per-source info table so amdgpu_dm_irq_set()/_ack()
* succeed without touching hardware registers.
*/
- info = kunit_kzalloc(test, sizeof(*info) * DAL_IRQ_SOURCES_NUMBER,
- GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, info);
+ info = kunit_kcalloc(test, DAL_IRQ_SOURCES_NUMBER, sizeof(*info), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, info);
for (i = 0; i < DAL_IRQ_SOURCES_NUMBER; i++)
info[i].funcs = &dm_test_irq_src_funcs;
@@@ -504,7 -503,7 +503,7 @@@ static struct amdgpu_crtc *dm_test_add_
struct amdgpu_crtc *acrtc;
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
INIT_LIST_HEAD(&acrtc->base.head);
acrtc->base.dev = &adev->ddev;
@@@ -535,7 -534,7 +534,7 @@@ static void dm_test_destroy_hpd_rx_wq(v
}
static const struct drm_connector_funcs dm_test_connector_funcs = {
- .reset = drm_atomic_helper_connector_reset,
+ .atomic_create_state = drm_atomic_helper_connector_create_state,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
.fill_modes = drm_helper_probe_single_connector_modes,
@@@ -577,7 -576,7 +576,7 @@@ static struct hdcp_workqueue *dm_test_a
struct hdcp_workqueue *hdcp_work;
hdcp_work = kunit_kzalloc(test, sizeof(*hdcp_work), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, hdcp_work);
+ KUNIT_ASSERT_NOT_NULL(test, hdcp_work);
mutex_init(&hdcp_work->mutex);
INIT_WORK(&hdcp_work->cpirq_work, dm_test_hdcp_dummy_work);
@@@ -679,7 -678,7 +678,7 @@@ static void dm_test_are_sinks_equal_fir
struct dc_sink *sink2;
sink2 = kunit_kzalloc(test, sizeof(*sink2), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink2);
+ KUNIT_ASSERT_NOT_NULL(test, sink2);
KUNIT_EXPECT_FALSE(test, are_sinks_equal(NULL, sink2));
}
@@@ -693,7 -692,7 +692,7 @@@ static void dm_test_are_sinks_equal_sec
struct dc_sink *sink1;
sink1 = kunit_kzalloc(test, sizeof(*sink1), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink1);
+ KUNIT_ASSERT_NOT_NULL(test, sink1);
KUNIT_EXPECT_FALSE(test, are_sinks_equal(sink1, NULL));
}
@@@ -707,9 -706,9 +706,9 @@@ static void dm_test_are_sinks_equal_dif
struct dc_sink *sink1, *sink2;
sink1 = kunit_kzalloc(test, sizeof(*sink1), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink1);
+ KUNIT_ASSERT_NOT_NULL(test, sink1);
sink2 = kunit_kzalloc(test, sizeof(*sink2), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink2);
+ KUNIT_ASSERT_NOT_NULL(test, sink2);
sink1->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
sink2->sink_signal = SIGNAL_TYPE_DISPLAY_PORT;
@@@ -726,9 -725,9 +725,9 @@@ static void dm_test_are_sinks_equal_dif
struct dc_sink *sink1, *sink2;
sink1 = kunit_kzalloc(test, sizeof(*sink1), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink1);
+ KUNIT_ASSERT_NOT_NULL(test, sink1);
sink2 = kunit_kzalloc(test, sizeof(*sink2), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink2);
+ KUNIT_ASSERT_NOT_NULL(test, sink2);
sink1->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
sink2->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
@@@ -747,9 -746,9 +746,9 @@@ static void dm_test_are_sinks_equal_dif
struct dc_sink *sink1, *sink2;
sink1 = kunit_kzalloc(test, sizeof(*sink1), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink1);
+ KUNIT_ASSERT_NOT_NULL(test, sink1);
sink2 = kunit_kzalloc(test, sizeof(*sink2), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink2);
+ KUNIT_ASSERT_NOT_NULL(test, sink2);
sink1->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
sink2->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
@@@ -770,9 -769,9 +769,9 @@@ static void dm_test_are_sinks_equal_zer
struct dc_sink *sink1, *sink2;
sink1 = kunit_kzalloc(test, sizeof(*sink1), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink1);
+ KUNIT_ASSERT_NOT_NULL(test, sink1);
sink2 = kunit_kzalloc(test, sizeof(*sink2), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink2);
+ KUNIT_ASSERT_NOT_NULL(test, sink2);
sink1->sink_signal = SIGNAL_TYPE_DISPLAY_PORT;
sink2->sink_signal = SIGNAL_TYPE_DISPLAY_PORT;
@@@ -791,9 -790,9 +790,9 @@@ static void dm_test_are_sinks_equal_ful
struct dc_sink *sink1, *sink2;
sink1 = kunit_kzalloc(test, sizeof(*sink1), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink1);
+ KUNIT_ASSERT_NOT_NULL(test, sink1);
sink2 = kunit_kzalloc(test, sizeof(*sink2), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink2);
+ KUNIT_ASSERT_NOT_NULL(test, sink2);
sink1->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
sink2->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
@@@ -814,9 -813,9 +813,9 @@@ static void dm_test_are_sinks_equal_ful
struct dc_sink *sink1, *sink2;
sink1 = kunit_kzalloc(test, sizeof(*sink1), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink1);
+ KUNIT_ASSERT_NOT_NULL(test, sink1);
sink2 = kunit_kzalloc(test, sizeof(*sink2), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, sink2);
+ KUNIT_ASSERT_NOT_NULL(test, sink2);
sink1->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
sink2->sink_signal = SIGNAL_TYPE_HDMI_TYPE_A;
@@@ -928,7 -927,7 +927,7 @@@ static void dm_test_irq_init_initialize
int src;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_EXPECT_EQ(test, amdgpu_dm_irq_init(adev), 0);
@@@ -952,7 -951,7 +951,7 @@@ static void dm_test_irq_register_reject
struct dc_interrupt_params int_params = { 0 };
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
int_params.int_context = INTERRUPT_LOW_IRQ_CONTEXT;
int_params.irq_source = DC_IRQ_SOURCE_HPD1;
@@@ -974,7 -973,7 +973,7 @@@ static void dm_test_irq_register_reject
struct dc_interrupt_params int_params = { 0 };
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
int_params.int_context = INTERRUPT_CONTEXT_NUMBER;
int_params.irq_source = DC_IRQ_SOURCE_HPD1;
@@@ -994,7 -993,7 +993,7 @@@ static void dm_test_irq_register_reject
struct dc_interrupt_params int_params = { 0 };
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
int_params.int_context = INTERRUPT_LOW_IRQ_CONTEXT;
int_params.irq_source = DC_IRQ_SOURCE_INVALID;
@@@ -1015,7 -1014,7 +1014,7 @@@ static void dm_test_irq_register_separa
void *handler;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
int_params.irq_source = DC_IRQ_SOURCE_HPD5;
@@@ -1066,7 -1065,7 +1065,7 @@@ static void dm_test_irq_unregister_reje
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
amdgpu_dm_irq_unregister_interrupt(adev, DC_IRQ_SOURCE_INVALID,
@@@ -1087,7 -1086,7 +1086,7 @@@ static void dm_test_irq_unregister_reje
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
amdgpu_dm_irq_unregister_interrupt(adev, DC_IRQ_SOURCE_HPD1,
@@@ -1110,7 -1109,7 +1109,7 @@@ static void dm_test_irq_unregister_hand
void *handler;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
int_params.int_context = INTERRUPT_LOW_IRQ_CONTEXT;
@@@ -1146,7 -1145,7 +1145,7 @@@ static void dm_test_irq_fini_removes_re
void *handler;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
int_params.int_context = INTERRUPT_LOW_IRQ_CONTEXT;
@@@ -1179,7 -1178,7 +1178,7 @@@ static void dm_test_irq_fini_on_empty_t
int src;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
amdgpu_dm_irq_fini(adev);
@@@ -1208,9 -1207,9 +1207,9 @@@ static void dm_test_get_crtc_by_otg_ins
drm = &adev->ddev;
acrtc_a = kunit_kzalloc(test, sizeof(*acrtc_a), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc_a);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc_a);
acrtc_b = kunit_kzalloc(test, sizeof(*acrtc_b), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc_b);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc_b);
INIT_LIST_HEAD(&acrtc_a->base.head);
INIT_LIST_HEAD(&acrtc_b->base.head);
@@@ -1239,7 -1238,7 +1238,7 @@@ static void dm_test_get_crtc_by_otg_ins
drm = &adev->ddev;
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
INIT_LIST_HEAD(&acrtc->base.head);
acrtc->otg_inst = 2;
@@@ -1279,7 -1278,7 +1278,7 @@@ static void dm_test_get_crtc_by_otg_ins
adev = dm_kunit_alloc_adev(test);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
adev->mode_info.crtcs[0] = acrtc;
KUNIT_EXPECT_PTR_EQ(test, amdgpu_dm_get_crtc_by_otg_inst(adev, -1), acrtc);
@@@ -1296,7 -1295,7 +1295,7 @@@ static void dm_test_set_irq_funcs(struc
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
adev->mode_info.num_crtc = 6;
adev->mode_info.num_hpd = 4;
@@@ -1534,12 -1533,12 +1533,12 @@@ static void dm_test_hpd_rx_irq_create_w
adev = dm_kunit_alloc_adev(test);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
dc->caps.max_links = 4;
adev->dm.dc = dc;
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
ctx->wq = amdgpu_dm_hpd_rx_irq_create_workqueue(adev);
KUNIT_ASSERT_NOT_NULL(test, ctx->wq);
@@@ -1561,7 -1560,7 +1560,7 @@@ static void dm_test_hpd_rx_irq_work_sus
struct amdgpu_display_manager *dm;
dm = kunit_kzalloc(test, sizeof(*dm), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dm);
+ KUNIT_ASSERT_NOT_NULL(test, dm);
/* A NULL hpd_rx_offload_wq must be a safe no-op (DC untouched). */
amdgpu_dm_hpd_rx_irq_work_suspend(dm);
@@@ -1580,12 -1579,12 +1579,12 @@@ static void dm_test_hpd_rx_irq_work_sus
adev = dm_kunit_alloc_adev(test);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
dc->caps.max_links = 2;
adev->dm.dc = dc;
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
ctx->wq = amdgpu_dm_hpd_rx_irq_create_workqueue(adev);
KUNIT_ASSERT_NOT_NULL(test, ctx->wq);
@@@ -1608,7 -1607,7 +1607,7 @@@ static void dm_test_set_crtc_irq_state_
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
/* mode_info.crtcs[0] is NULL -> returns 0 without dereferencing DC. */
KUNIT_EXPECT_EQ(test,
@@@ -1624,7 -1623,7 +1623,7 @@@ static void dm_test_set_pflip_irq_state
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_EXPECT_EQ(test,
amdgpu_dm_set_pflip_irq_state(adev, NULL, 0, AMDGPU_IRQ_STATE_DISABLE), 0);
@@@ -1639,7 -1638,7 +1638,7 @@@ static void dm_test_set_vline0_irq_stat
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_EXPECT_EQ(test,
amdgpu_dm_set_vline0_irq_state(adev, NULL, 0, AMDGPU_IRQ_STATE_ENABLE), 0);
@@@ -1654,7 -1653,7 +1653,7 @@@ static void dm_test_set_vupdate_irq_sta
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_EXPECT_EQ(test,
amdgpu_dm_set_vupdate_irq_state(adev, NULL, 0, AMDGPU_IRQ_STATE_ENABLE), 0);
@@@ -1672,9 -1671,9 +1671,9 @@@ static void dm_test_set_crtc_irq_state_
struct amdgpu_crtc *acrtc;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
/* otg_inst == -1 short-circuits before computing the irq source. */
acrtc->otg_inst = -1;
@@@ -1694,9 -1693,9 +1693,9 @@@ static void dm_test_set_crtc_irq_state_
struct amdgpu_crtc *acrtc;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
/*
* otg_inst >= 0 computes the irq source and reaches the NULL-safe
@@@ -1719,9 -1718,9 +1718,9 @@@ static void dm_test_set_pflip_irq_state
struct amdgpu_crtc *acrtc;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
/* The disable state exercises the st == false path. */
acrtc->otg_inst = 1;
@@@ -1749,13 -1748,13 +1748,13 @@@ static void dm_test_set_crtc_irq_state_
adev = dm_kunit_alloc_adev(test);
acrtc = kunit_kzalloc(test, sizeof(*acrtc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, acrtc);
+ KUNIT_ASSERT_NOT_NULL(test, acrtc);
dc = dm_test_alloc_dc_with_irq_service(test, &dm_test_irq_service_funcs_dcn10);
/* DC_LOG_* dereferences ctx->logger->dev, so wire a real drm device. */
logger = kunit_kzalloc(test, sizeof(*logger), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, logger);
+ KUNIT_ASSERT_NOT_NULL(test, logger);
logger->dev = &adev->ddev;
dc->ctx->logger = logger;
@@@ -1783,7 -1782,7 +1782,7 @@@ static void dm_test_irq_immediate_work_
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
/* No registered high-context handlers: must be a safe no-op. */
@@@ -1802,7 -1801,7 +1801,7 @@@ static void dm_test_irq_immediate_work_
void *handler;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
int_params.int_context = INTERRUPT_HIGH_IRQ_CONTEXT;
@@@ -1833,7 -1832,7 +1832,7 @@@ static void dm_test_irq_schedule_work_e
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
/* Empty handler list: schedule_work returns immediately. */
@@@ -1852,7 -1851,7 +1851,7 @@@ static void dm_test_irq_schedule_work_q
void *handler;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
int_params.int_context = INTERRUPT_LOW_IRQ_CONTEXT;
@@@ -1893,7 -1892,7 +1892,7 @@@ static void dm_test_irq_schedule_work_r
void *handler;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
int_params.int_context = INTERRUPT_LOW_IRQ_CONTEXT;
@@@ -1931,7 -1930,7 +1930,7 @@@ static void dm_test_irq_schedule_work_n
void *handler;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
int_params.int_context = INTERRUPT_LOW_IRQ_CONTEXT;
@@@ -1960,7 -1959,7 +1959,7 @@@ static void dm_test_set_hpd_irq_state_n
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
/* amdgpu_dm_irq_set() is a no-op when dc is NULL, so both states
* return 0 without dereferencing the (absent) DC.
@@@ -1982,7 -1981,7 +1981,7 @@@ static void dm_test_set_dmub_outbox_irq
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_EXPECT_EQ(test, amdgpu_dm_set_dmub_outbox_irq_state(adev, NULL, 0,
AMDGPU_IRQ_STATE_ENABLE), 0);
@@@ -2001,7 -2000,7 +2000,7 @@@ static void dm_test_set_dmub_trace_irq_
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_EXPECT_EQ(test, amdgpu_dm_set_dmub_trace_irq_state(adev, NULL, 0,
AMDGPU_IRQ_STATE_ENABLE), 0);
@@@ -2020,7 -2019,7 +2019,7 @@@ static void dm_test_outbox_init_null_dc
struct amdgpu_device *adev;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
/* Single amdgpu_dm_irq_set() call must be skipped when dc is NULL. */
amdgpu_dm_outbox_init(adev);
@@@ -2035,14 -2034,27 +2034,27 @@@
static void dm_test_hpd_init_empty_connectors(struct kunit *test)
{
struct amdgpu_device *adev;
+ struct dc_link *link;
+ struct dc *dc;
adev = dm_kunit_alloc_adev(test);
/*
- * With an empty connector list the per-connector loop is skipped and
- * the initial clear loop relies on amdgpu_dm_irq_set() being a no-op
- * for a NULL dc, so init must complete without touching the DC.
+ * The initial clear loop walks adev->dm.dc->links, so a DC with a
+ * populated irq service is required. With an empty connector list the
+ * per-connector loop is skipped, so init must complete after only the
+ * clear loop runs.
*/
+ dc = dm_test_alloc_dc_with_irq_service(test, &dm_test_irq_service_funcs_dcn10);
+ adev->dm.dc = dc;
+
+ link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
+ KUNIT_ASSERT_NOT_NULL(test, link);
+ link->irq_source_hpd = DC_IRQ_SOURCE_HPD1;
+ link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX;
+ dc->links[0] = link;
+ dc->link_count = 1;
+
amdgpu_dm_hpd_init(adev);
}
@@@ -2070,19 -2082,23 +2082,23 @@@ static void dm_test_hpd_init_fini_with_
struct drm_connector *wbconn;
struct amdgpu_device *adev;
struct dc_link *link;
+ struct dc *dc;
adev = dm_kunit_alloc_adev(test);
+ /* The clear loop walks dc->links, so set up a DC with an irq service. */
+ dc = dm_test_alloc_dc_with_irq_service(test, &dm_test_irq_service_funcs_dcn10);
+ adev->dm.dc = dc;
+
/*
* num_hpd = 0 forces irq_type >= num_hpd so the loop takes the HW
- * fallback (amdgpu_dm_irq_set()) instead of amdgpu_irq_get(); with a
- * NULL dc that fallback is a safe no-op.
+ * fallback (amdgpu_dm_irq_set()) instead of amdgpu_irq_get().
*/
adev->mode_info.num_hpd = 0;
/* A writeback connector must be skipped by the per-connector loop. */
wbconn = kunit_kzalloc(test, sizeof(*wbconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, wbconn);
+ KUNIT_ASSERT_NOT_NULL(test, wbconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, wbconn, &dm_test_connector_funcs,
DRM_MODE_CONNECTOR_WRITEBACK), 0);
KUNIT_ASSERT_EQ(test,
@@@ -2090,7 -2106,7 +2106,7 @@@
/* A DisplayPort connector with a dc_link exercises the loop body. */
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -2098,12 -2114,14 +2114,14 @@@
kunit_add_action_or_reset(test, dm_test_connector_cleanup, &aconn->base), 0);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link->irq_source_hpd = DC_IRQ_SOURCE_HPD1;
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX;
aconn->dc_link = link;
+ dc->links[0] = link;
+ dc->link_count = 1;
- /* DC is absent (NULL), so the HW writes are NULL-safe no-ops. */
+ /* The irq service stubs accept the HW writes without register access. */
amdgpu_dm_hpd_init(adev);
amdgpu_dm_hpd_fini(adev);
}
@@@ -2117,12 -2135,17 +2135,17 @@@ static void dm_test_hpd_init_fini_analo
struct amdgpu_dm_connector *aconn;
struct amdgpu_device *adev;
struct dc_link *link;
+ struct dc *dc;
adev = dm_kunit_alloc_adev(test);
adev->mode_info.num_hpd = 0;
+ /* The clear loop walks dc->links, so set up a DC with an irq service. */
+ dc = dm_test_alloc_dc_with_irq_service(test, &dm_test_irq_service_funcs_dcn10);
+ adev->dm.dc = dc;
+
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_VGA), 0);
@@@ -2130,12 -2153,14 +2153,14 @@@
kunit_add_action_or_reset(test, dm_test_connector_cleanup, &aconn->base), 0);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link->irq_source_hpd = DC_IRQ_SOURCE_HPD1;
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX;
/* An analog connector id makes the loop request polling. */
link->link_id.id = CONNECTOR_ID_VGA;
aconn->dc_link = link;
+ dc->links[0] = link;
+ dc->link_count = 1;
/* use_polling becomes true, so init must enable KMS polling. */
amdgpu_dm_hpd_init(adev);
@@@ -2155,9 -2180,14 +2180,14 @@@ static void dm_test_hpd_init_fini_irq_r
struct amdgpu_dm_connector *aconn;
struct amdgpu_device *adev;
struct dc_link *link;
+ struct dc *dc;
adev = dm_kunit_alloc_adev(test);
+ /* The clear loop walks dc->links, so set up a DC with an irq service. */
+ dc = dm_test_alloc_dc_with_irq_service(test, &dm_test_irq_service_funcs_dcn10);
+ adev->dm.dc = dc;
+
/*
* num_hpd >= 1 makes irq_type (0) < num_hpd, so the loop takes the
* amdgpu_irq_get()/amdgpu_irq_put() branch instead of the
@@@ -2168,7 -2198,7 +2198,7 @@@
adev->mode_info.num_hpd = 1;
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -2176,10 -2206,12 +2206,12 @@@
kunit_add_action_or_reset(test, dm_test_connector_cleanup, &aconn->base), 0);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link->irq_source_hpd = DC_IRQ_SOURCE_HPD1;
link->irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID;
aconn->dc_link = link;
+ dc->links[0] = link;
+ dc->link_count = 1;
amdgpu_dm_hpd_init(adev);
amdgpu_dm_hpd_fini(adev);
@@@ -2200,8 -2232,11 +2232,11 @@@ static void dm_test_hpd_init_skips_conn
adev = dm_kunit_alloc_adev(test);
adev->mode_info.num_hpd = 0;
+ /* The clear loop walks dc->links, so set up a DC with an irq service. */
+ adev->dm.dc = dm_test_alloc_dc_with_irq_service(test, &dm_test_irq_service_funcs_dcn10);
+
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -2229,10 -2264,10 +2264,10 @@@ static void dm_test_hpd_rx_offload_work
adev = dm_kunit_alloc_adev(test);
offload_wq = kunit_kzalloc(test, sizeof(*offload_wq), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_wq);
+ KUNIT_ASSERT_NOT_NULL(test, offload_wq);
offload_work = kzalloc_obj(*offload_work);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_work);
+ KUNIT_ASSERT_NOT_NULL(test, offload_work);
offload_work->offload_wq = offload_wq;
offload_work->adev = adev;
INIT_WORK(&offload_work->work, dm_handle_hpd_rx_offload_work);
@@@ -2265,10 -2300,10 +2300,10 @@@ dm_test_setup_hpd_rx_offload_work(struc
mutex_init(&adev->dm.dc_lock);
adev->reset_domain = kunit_kzalloc(test, sizeof(*adev->reset_domain),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev->reset_domain);
+ KUNIT_ASSERT_NOT_NULL(test, adev->reset_domain);
offload_wq = kunit_kzalloc(test, sizeof(*offload_wq), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_wq);
+ KUNIT_ASSERT_NOT_NULL(test, offload_wq);
spin_lock_init(&offload_wq->offload_lock);
aconn = dm_kunit_alloc_connector(test, adev, NULL);
@@@ -2276,13 -2311,13 +2311,13 @@@
offload_wq->aconnector = aconn;
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link_srv->detect_connection_type = dm_test_detect_connection_single;
dc->link_srv = link_srv;
@@@ -2293,8 -2328,8 +2328,8 @@@
link->connector_signal = SIGNAL_TYPE_DISPLAY_PORT;
aconn->dc_link = link;
- offload_work = kzalloc_obj(*offload_work, GFP_KERNEL);
+ offload_work = kzalloc_obj(*offload_work);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_work);
+ KUNIT_ASSERT_NOT_NULL(test, offload_work);
offload_work->offload_wq = offload_wq;
offload_work->adev = adev;
INIT_WORK(&offload_work->work, dm_handle_hpd_rx_offload_work);
@@@ -2363,6 -2398,7 +2398,7 @@@ static void dm_test_hpd_rx_offload_work
*/
static void dm_test_hpd_rx_offload_work_msg_rdy(struct kunit *test)
{
+ struct hpd_rx_irq_offload_work_queue *offload_wq;
struct hpd_rx_irq_offload_work *offload_work;
struct amdgpu_dm_connector *aconn;
struct link_service *link_srv;
@@@ -2384,9 -2420,15 +2420,15 @@@
offload_work->offload_wq->is_handling_mst_msg_rdy_event = true;
offload_work->data.bytes.device_service_irq.bits.UP_REQ_MSG_RDY = 1;
+ /* NB: offload_work is freed by dm_handle_hpd_rx_offload_work so need to
+ * save a pointer to the wq to do the final KUNIT_EXPECT. This is safe
+ * because the wq is actually a kunit_alloc and is not freed along with
+ * the offload_work object.
+ */
+ offload_wq = offload_work->offload_wq;
dm_handle_hpd_rx_offload_work(&offload_work->work);
- KUNIT_EXPECT_FALSE(test, offload_work->offload_wq->is_handling_mst_msg_rdy_event);
+ KUNIT_EXPECT_FALSE(test, offload_wq->is_handling_mst_msg_rdy_event);
}
/**
@@@ -2501,13 -2543,13 +2543,13 @@@ static struct amdgpu_dm_connector *dm_t
amdgpu_dm_hdmi_hpd_debounce_work);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link_srv->detect_link = dm_test_detect_link_false;
dc->ctx = ctx;
@@@ -2559,9 -2601,9 +2601,9 @@@ static void dm_test_hdmi_hpd_debounce_r
dc = aconn->dc_link->ctx->dc;
logger = kunit_kzalloc(test, sizeof(*logger), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, logger);
+ KUNIT_ASSERT_NOT_NULL(test, logger);
dmub_srv = kunit_kzalloc(test, sizeof(*dmub_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dmub_srv);
+ KUNIT_ASSERT_NOT_NULL(test, dmub_srv);
/* DC_LOG_* dereferences ctx->logger->dev, so wire a real drm device. */
logger->dev = aconn->base.dev;
@@@ -2662,15 -2704,15 +2704,15 @@@ static void dm_test_handle_hpd_irq_disa
aconn = dm_kunit_alloc_connector(test, adev, NULL);
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
aconn->base.state = &state->base;
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
dc->ctx = ctx;
ctx->dc = dc;
@@@ -2711,17 -2753,17 +2753,17 @@@ static struct amdgpu_dm_connector *dm_t
amdgpu_dm_hdmi_hpd_debounce_work);
state = kunit_kzalloc(test, sizeof(*state), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, state);
+ KUNIT_ASSERT_NOT_NULL(test, state);
aconn->base.state = &state->base;
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link_srv->detect_connection_type = dm_test_detect_connection_none;
dc->ctx = ctx;
@@@ -2970,19 -3012,19 +3012,19 @@@ static void dm_test_handle_hpd_rx_irq_d
adev->dm.disable_hpd_irq = true;
offload_wq = kunit_kzalloc(test, sizeof(*offload_wq), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_wq);
+ KUNIT_ASSERT_NOT_NULL(test, offload_wq);
adev->dm.hpd_rx_offload_wq = offload_wq;
aconn = dm_kunit_alloc_connector(test, adev, NULL);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link_srv->dp_handle_hpd_rx_irq = dm_test_handle_hpd_rx_no_work;
dc->ctx = ctx;
@@@ -3009,7 -3051,7 +3051,7 @@@ static void dm_test_schedule_hpd_rx_off
adev = dm_kunit_alloc_adev(test);
offload_wq = kunit_kzalloc(test, sizeof(*offload_wq), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_wq);
+ KUNIT_ASSERT_NOT_NULL(test, offload_wq);
offload_wq->wq = create_singlethread_workqueue("dm_irq_test_hpd_rx");
KUNIT_ASSERT_NOT_NULL(test, offload_wq->wq);
@@@ -3047,7 -3089,7 +3089,7 @@@ static struct amdgpu_dm_connector *dm_t
mutex_init(&adev->dm.dc_lock);
offload_wq = kunit_kzalloc(test, sizeof(*offload_wq), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_wq);
+ KUNIT_ASSERT_NOT_NULL(test, offload_wq);
spin_lock_init(&offload_wq->offload_lock);
offload_wq->wq = create_singlethread_workqueue("dm_irq_test_hpd_rx");
KUNIT_ASSERT_NOT_NULL(test, offload_wq->wq);
@@@ -3060,13 -3102,13 +3102,13 @@@
aconn->mst_mgr.mst_state = true;
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
dc->ctx = ctx;
dc->link_srv = link_srv;
@@@ -3291,7 -3333,7 +3333,7 @@@ static void dm_test_dmub_hpd_callback_i
adev = dm_kunit_alloc_adev(test);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
notify.link_index = 1;
@@@ -3310,7 -3352,7 +3352,7 @@@ static void dm_test_dmub_hpd_callback_e
adev = dm_kunit_alloc_adev(test);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
adev->dm.ddev = &adev->ddev;
dc->link_count = 1;
@@@ -3335,7 -3377,7 +3377,7 @@@ static void dm_test_dmub_hpd_callback_s
adev = dm_kunit_alloc_adev(test);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
adev->in_suspend = true;
dc->link_count = 1;
@@@ -3367,25 -3409,25 +3409,25 @@@ static void dm_test_dmub_hpd_callback_u
adev = dm_kunit_alloc_adev(test);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
adev->dm.ddev = &adev->ddev;
dc->link_count = 1;
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
dc->links[0] = link;
/* A writeback connector must be skipped by the loop. */
wbconn = kunit_kzalloc(test, sizeof(*wbconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, wbconn);
+ KUNIT_ASSERT_NOT_NULL(test, wbconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, wbconn, &dm_test_connector_funcs,
DRM_MODE_CONNECTOR_WRITEBACK), 0);
KUNIT_ASSERT_EQ(test, kunit_add_action_or_reset(test, dm_test_connector_cleanup, wbconn), 0);
/* A DisplayPort connector whose dc_link matches drives the match branch. */
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -3422,13 -3464,13 +3464,13 @@@ static void dm_test_dmub_hpd_callback_h
mutex_init(&adev->dm.dc_lock);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link_srv->detect_connection_type = dm_test_detect_connection_none;
link_srv->detect_link = dm_test_detect_link_false;
@@@ -3444,7 -3486,7 +3486,7 @@@
dc->links[0] = link;
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -3486,18 -3528,18 +3528,18 @@@ static void dm_test_dmub_hpd_callback_h
mutex_init(&adev->dm.dc_lock);
offload_wq = kunit_kzalloc(test, sizeof(*offload_wq), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, offload_wq);
+ KUNIT_ASSERT_NOT_NULL(test, offload_wq);
spin_lock_init(&offload_wq->offload_lock);
adev->dm.hpd_rx_offload_wq = offload_wq;
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
+ KUNIT_ASSERT_NOT_NULL(test, ctx);
link_srv = kunit_kzalloc(test, sizeof(*link_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link_srv);
+ KUNIT_ASSERT_NOT_NULL(test, link_srv);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link_srv->dp_handle_hpd_rx_irq = dm_test_handle_hpd_rx_no_work;
dc->ctx = ctx;
@@@ -3514,7 -3556,7 +3556,7 @@@
dc->links[0] = link;
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -3543,7 -3585,7 +3585,7 @@@ static void dm_test_register_hpd_handle
adev = dm_kunit_alloc_adev(test);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
KUNIT_EXPECT_EQ(test, amdgpu_dm_register_hpd_handlers(adev), 0);
@@@ -3568,18 -3610,18 +3610,18 @@@ static void dm_test_register_hpd_handle
adev = dm_kunit_alloc_adev(test);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
wbconn = kunit_kzalloc(test, sizeof(*wbconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, wbconn);
+ KUNIT_ASSERT_NOT_NULL(test, wbconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, wbconn, &dm_test_connector_funcs,
DRM_MODE_CONNECTOR_WRITEBACK), 0);
KUNIT_ASSERT_EQ(test,
kunit_add_action_or_reset(test, dm_test_connector_cleanup, wbconn), 0);
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -3587,7 -3629,7 +3629,7 @@@
kunit_add_action_or_reset(test, dm_test_connector_cleanup, &aconn->base), 0);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link->irq_source_hpd = DC_IRQ_SOURCE_HPD1;
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1RX;
aconn->dc_link = link;
@@@ -3615,11 -3657,11 +3657,11 @@@ static void dm_test_register_hpd_handle
adev = dm_kunit_alloc_adev(test);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -3627,7 -3669,7 +3669,7 @@@
kunit_add_action_or_reset(test, dm_test_connector_cleanup, &aconn->base), 0);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link->irq_source_hpd = DC_IRQ_SOURCE_HPD1RX;
link->irq_source_hpd_rx = DC_IRQ_SOURCE_INVALID;
aconn->dc_link = link;
@@@ -3650,11 -3692,11 +3692,11 @@@ static void dm_test_register_hpd_handle
adev = dm_kunit_alloc_adev(test);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
dc = kunit_kzalloc(test, sizeof(*dc), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc);
+ KUNIT_ASSERT_NOT_NULL(test, dc);
adev->dm.dc = dc;
aconn = kunit_kzalloc(test, sizeof(*aconn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, aconn);
+ KUNIT_ASSERT_NOT_NULL(test, aconn);
KUNIT_ASSERT_EQ(test, drm_connector_init(&adev->ddev, &aconn->base,
&dm_test_connector_funcs,
DRM_MODE_CONNECTOR_DisplayPort), 0);
@@@ -3662,7 -3704,7 +3704,7 @@@
kunit_add_action_or_reset(test, dm_test_connector_cleanup, &aconn->base), 0);
link = kunit_kzalloc(test, sizeof(*link), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, link);
+ KUNIT_ASSERT_NOT_NULL(test, link);
link->irq_source_hpd = DC_IRQ_SOURCE_INVALID;
link->irq_source_hpd_rx = DC_IRQ_SOURCE_HPD1;
aconn->dc_link = link;
@@@ -3766,8 -3808,8 +3808,8 @@@ static void dm_test_pflip_high_irq_comp
acrtc->pflip_status = AMDGPU_FLIP_SUBMITTED;
/* drm_crtc_send_vblank_event() consumes (kfree()s) the event. */
- event = kzalloc_obj(*event, GFP_KERNEL);
+ event = kzalloc_obj(*event);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, event);
+ KUNIT_ASSERT_NOT_NULL(test, event);
acrtc->event = event;
/* Balance the handler's drm_crtc_vblank_put(). */
@@@ -3803,7 -3845,7 +3845,7 @@@ static struct amdgpu_crtc *dm_test_setu
dc = dm_kunit_alloc_dc_with_ctx(test);
dc->current_state = kunit_kzalloc(test, sizeof(*dc->current_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc->current_state);
+ KUNIT_ASSERT_NOT_NULL(test, dc->current_state);
adev->dm.dc = dc;
link = dm_kunit_alloc_link(test);
@@@ -3842,8 -3884,8 +3884,8 @@@ static void dm_test_pflip_high_irq_vrr_
adev = drm_to_adev(acrtc->base.dev);
/* drm_crtc_send_vblank_event() consumes (kfree()s) the event. */
- event = kzalloc_obj(*event, GFP_KERNEL);
+ event = kzalloc_obj(*event);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, event);
+ KUNIT_ASSERT_NOT_NULL(test, event);
acrtc->event = event;
/* Balance the handler's drm_crtc_vblank_put(). */
@@@ -3876,14 -3918,14 +3918,14 @@@ static void dm_test_pflip_high_irq_vrr_
struct amdgpu_crtc *acrtc;
tg = kunit_kzalloc(test, sizeof(*tg), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, tg);
+ KUNIT_ASSERT_NOT_NULL(test, tg);
tg->funcs = &dm_test_tg_funcs;
acrtc = dm_test_setup_vrr_pflip_crtc(test, tg);
adev = drm_to_adev(acrtc->base.dev);
- event = kzalloc_obj(*event, GFP_KERNEL);
+ event = kzalloc_obj(*event);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, event);
+ KUNIT_ASSERT_NOT_NULL(test, event);
acrtc->event = event;
params.adev = adev;
@@@ -3943,8 -3985,8 +3985,8 @@@ static void dm_test_vupdate_high_irq_dc
acrtc = dm_test_add_crtc(test, adev);
acrtc->pflip_status = AMDGPU_FLIP_SUBMITTED;
- event = kzalloc_obj(*event, GFP_KERNEL);
+ event = kzalloc_obj(*event);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, event);
+ KUNIT_ASSERT_NOT_NULL(test, event);
acrtc->event = event;
adev->ddev.vblank[0].time = ktime_get();
@@@ -4016,7 -4058,7 +4058,7 @@@ static struct amdgpu_crtc *dm_test_setu
dc = dm_kunit_alloc_dc_with_ctx(test);
dc->current_state = kunit_kzalloc(test, sizeof(*dc->current_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc->current_state);
+ KUNIT_ASSERT_NOT_NULL(test, dc->current_state);
adev->dm.dc = dc;
link = dm_kunit_alloc_link(test);
@@@ -4173,7 -4215,7 +4215,7 @@@ static void dm_test_crtc_high_irq_write
acrtc = dm_test_add_crtc(test, adev);
wb_conn = kunit_kzalloc(test, sizeof(*wb_conn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, wb_conn);
+ KUNIT_ASSERT_NOT_NULL(test, wb_conn);
acrtc->wb_conn = wb_conn;
acrtc->wb_pending = true;
@@@ -4209,7 -4251,7 +4251,7 @@@ static void dm_test_crtc_high_irq_write
acrtc = dm_test_add_crtc(test, adev);
wb_conn = kunit_kzalloc(test, sizeof(*wb_conn), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, wb_conn);
+ KUNIT_ASSERT_NOT_NULL(test, wb_conn);
spin_lock_init(&wb_conn->job_lock);
INIT_LIST_HEAD(&wb_conn->job_queue);
@@@ -4217,8 -4259,8 +4259,8 @@@
* The job carries no framebuffer or fence, so the deferred DRM cleanup
* work only kfree()s it; it needs nothing from this test.
*/
- job = kzalloc_obj(*job, GFP_KERNEL);
+ job = kzalloc_obj(*job);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, job);
+ KUNIT_ASSERT_NOT_NULL(test, job);
list_add_tail(&job->list_entry, &wb_conn->job_queue);
acrtc->wb_conn = wb_conn;
@@@ -4286,9 -4328,9 +4328,9 @@@ static void dm_test_handle_hpd_work_out
adev = dm_kunit_alloc_adev(test);
hpd_work = kzalloc_obj(*hpd_work);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, hpd_work);
+ KUNIT_ASSERT_NOT_NULL(test, hpd_work);
hpd_work->dmub_notify = kzalloc_obj(*hpd_work->dmub_notify);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, hpd_work->dmub_notify);
+ KUNIT_ASSERT_NOT_NULL(test, hpd_work->dmub_notify);
hpd_work->dmub_notify->type =
(enum dmub_notification_type)ARRAY_SIZE(adev->dm.dmub_callback);
hpd_work->adev = adev;
@@@ -4309,8 -4351,8 +4351,8 @@@ static void dm_test_handle_hpd_work_nul
struct amdgpu_device *adev;
adev = dm_kunit_alloc_adev(test);
- hpd_work = kzalloc_obj(*hpd_work, GFP_KERNEL);
+ hpd_work = kzalloc_obj(*hpd_work);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, hpd_work);
+ KUNIT_ASSERT_NOT_NULL(test, hpd_work);
hpd_work->adev = adev;
INIT_WORK(&hpd_work->handle_hpd_work, dm_handle_hpd_work);
@@@ -4336,9 -4378,9 +4378,9 @@@ static void dm_test_dmub_outbox1_low_ir
adev = dm_kunit_alloc_adev(test);
dc = dm_kunit_alloc_dc_with_ctx(test);
dc_dmub_srv = kunit_kzalloc(test, sizeof(*dc_dmub_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc_dmub_srv);
+ KUNIT_ASSERT_NOT_NULL(test, dc_dmub_srv);
dmub = kunit_kzalloc(test, sizeof(*dmub), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dmub);
+ KUNIT_ASSERT_NOT_NULL(test, dmub);
dmub->hw_funcs.get_outbox0_wptr = dm_test_dmub_get_outbox0_wptr;
dc_dmub_srv->dmub = dmub;
@@@ -4370,11 -4412,11 +4412,11 @@@ static void dm_test_dmub_outbox1_low_ir
adev = dm_kunit_alloc_adev(test);
dc = dm_kunit_alloc_dc_with_ctx(test);
dc_dmub_srv = kunit_kzalloc(test, sizeof(*dc_dmub_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc_dmub_srv);
+ KUNIT_ASSERT_NOT_NULL(test, dc_dmub_srv);
dmub = kunit_kzalloc(test, sizeof(*dmub), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dmub);
+ KUNIT_ASSERT_NOT_NULL(test, dmub);
rb = kunit_kzalloc(test, DM_TEST_OUTBOX0_RB_SIZE, GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, rb);
+ KUNIT_ASSERT_NOT_NULL(test, rb);
dmub->outbox0_rb.base_address = rb;
dmub->outbox0_rb.capacity = DM_TEST_OUTBOX0_RB_SIZE;
@@@ -4410,9 -4452,9 +4452,9 @@@ static struct amdgpu_device *dm_test_al
adev = dm_kunit_alloc_adev(test);
dc = dm_kunit_alloc_dc_with_ctx(test);
dc_dmub_srv = kunit_kzalloc(test, sizeof(*dc_dmub_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc_dmub_srv);
+ KUNIT_ASSERT_NOT_NULL(test, dc_dmub_srv);
dmub = kunit_kzalloc(test, sizeof(*dmub), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dmub);
+ KUNIT_ASSERT_NOT_NULL(test, dmub);
dmub->hw_init = true;
dmub->hw_funcs.get_outbox0_wptr = dm_test_dmub_get_outbox0_wptr;
@@@ -4890,7 -4932,7 +4932,7 @@@ static void dm_test_register_outbox_irq
adev), 0);
dc = dm_test_alloc_dc_with_irq_service(test, &dm_test_irq_service_funcs_dcn10);
dc_dmub_srv = kunit_kzalloc(test, sizeof(*dc_dmub_srv), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc_dmub_srv);
+ KUNIT_ASSERT_NOT_NULL(test, dc_dmub_srv);
dc->ctx->dmub_srv = dc_dmub_srv;
adev->dm.dc = dc;
amdgpu_dm_set_irq_funcs(adev);
@@@ -4933,7 -4975,7 +4975,7 @@@ static void dm_test_irq_handler_dispatc
struct dc *dc;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
dc = dm_test_alloc_dc_with_irq_service(test,
@@@ -4993,7 -5035,7 +5035,7 @@@ static void dm_test_irq_handler_invalid
int low_count = 0;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
KUNIT_ASSERT_EQ(test, amdgpu_dm_irq_init(adev), 0);
/* This stub maps every src_id to DC_IRQ_SOURCE_INVALID. */
@@@ -5040,17 -5082,17 +5082,17 @@@ static void dm_test_handle_vmin_vmax_up
struct dc *dc;
adev = kunit_kzalloc(test, sizeof(*adev), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adev);
+ KUNIT_ASSERT_NOT_NULL(test, adev);
mutex_init(&adev->dm.dc_lock);
dc = dm_kunit_alloc_dc_with_ctx(test);
dc->current_state = kunit_kzalloc(test, sizeof(*dc->current_state),
GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, dc->current_state);
+ KUNIT_ASSERT_NOT_NULL(test, dc->current_state);
adev->dm.dc = dc;
stream = kunit_kzalloc(test, sizeof(*stream), GFP_KERNEL);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, stream);
+ KUNIT_ASSERT_NOT_NULL(test, stream);
/*
* Start at two references: the worker's dc_stream_release() drops one,
* leaving the kunit-managed allocation intact (no kfree).
@@@ -5060,9 -5102,9 +5102,9 @@@
/* The worker kfree()s both, so they must come from the slab. */
work = kzalloc_obj(*work);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, work);
+ KUNIT_ASSERT_NOT_NULL(test, work);
adjust = kzalloc_obj(*adjust);
- KUNIT_ASSERT_NOT_ERR_OR_NULL(test, adjust);
+ KUNIT_ASSERT_NOT_NULL(test, adjust);
work->adev = adev;
work->stream = stream;
diff --combined drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 9d47d2ab1b49b,2a0cdc6e80596..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@@ -434,6 -434,8 +434,6 @@@ struct smu_table_context
void *user_overdrive_table;
uint32_t user_od_feature_mask;
- /* Set when an OD commit/restore changed the UCLK levels */
- bool od_uclk_changed;
struct smu_driver_table driver_tables[SMU_DRIVER_TABLE_COUNT];
};
@@@ -1948,6 -1950,7 +1948,7 @@@ int smu_get_ppt_limit(void *handle
enum pp_power_type pp_power_type);
bool smu_mode1_reset_is_support(struct smu_context *smu);
+ bool smu_od_uclk_changed(struct smu_context *smu);
bool smu_link_reset_is_support(struct smu_context *smu);
int smu_mode1_reset(struct smu_context *smu);
int smu_link_reset(struct smu_context *smu);
diff --combined drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index e80087e35e199,1a02ba70d3000..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@@ -1288,6 -1288,28 +1288,28 @@@ static int smu_v13_0_0_upload_overdrive
return ret;
}
+ /*
+ * PMFW rebuilds the UCLK DPM levels from UclkFmin/UclkFmax. Re-read them, so
+ * that pp_dpm_mclk and the soft limits match, and flag the change for DC.
+ */
+ static void smu_v13_0_0_od_refresh_uclk_table(struct smu_context *smu)
+ {
+ struct smu_13_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
+ int ret;
+
+ if (!smu_cmn_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT))
+ return;
+
+ ret = smu_v13_0_set_single_dpm_table(smu, SMU_UCLK,
+ &dpm_context->dpm_tables.uclk_table);
+ if (ret) {
+ dev_err(smu->adev->dev, "Failed to refresh UCLK dpm table!\n");
+ return;
+ }
+
+ smu->smu_table.od_uclk_changed = true;
+ }
+
static int smu_v13_0_0_emit_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf,
int *offset)
@@@ -1653,6 -1675,7 +1675,7 @@@ static int smu_v13_0_0_od_edit_dpm_tabl
OverDriveTable_t *od = &od_table->OverDriveTable;
OverDriveTable_t *boot = &boot_od_table->OverDriveTable;
struct amdgpu_device *adev = smu->adev;
+ u32 prev_od_feature_mask = table_context->user_od_feature_mask;
uint32_t offset_of_voltageoffset;
int32_t minimum, maximum;
u32 next_mask;
@@@ -2007,6 -2030,11 +2030,11 @@@
table_context->user_od_feature_mask = next_mask;
od_table->OverDriveTable.FeatureCtrlMask = 0;
+
+ /* UCLK was customized before (restore) or is now (commit) */
+ if ((prev_od_feature_mask | next_mask) & BIT(PP_OD_FEATURE_UCLK_BIT))
+ smu_v13_0_0_od_refresh_uclk_table(smu);
+
memcpy((u8 *)user_od_table + offset_of_voltageoffset,
(u8 *)od_table + offset_of_voltageoffset,
sizeof(OverDriveTableExternal_t) - offset_of_voltageoffset);
@@@ -2178,9 -2206,11 +2206,11 @@@ static ssize_t smu_v13_0_0_get_gpu_metr
gpu_metrics->average_socket_power = metrics->AverageSocketPower;
if ((mp1_ver == IP_VERSION(13, 0, 0) &&
- (smu->smc_fw_version <= 0x004e1e00 || smu->smc_fw_version >= 0x004e8600)) ||
+ (smu->smc_fw_version <= 0x004e1e00 ||
+ smu->smc_fw_version >= 0x004e8600)) ||
(mp1_ver == IP_VERSION(13, 0, 10) &&
- smu->smc_fw_version <= 0x00500800))
+ (smu->smc_fw_version <= 0x00500800 ||
+ smu->smc_fw_version >= 0x00505d00)))
gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
if (metrics->AverageGfxActivity <= SMU_13_0_0_BUSY_THRESHOLD)
@@@ -2360,6 -2390,8 +2390,8 @@@ static int smu_v13_0_0_restore_user_od_
!!(next_mask & ~BIT(PP_OD_FEATURE_PPT_BIT));
memcpy(od_table, user_od_table, sizeof(OverDriveTableExternal_t));
od_table->OverDriveTable.FeatureCtrlMask = 0;
+ if (next_mask & BIT(PP_OD_FEATURE_UCLK_BIT))
+ smu_v13_0_0_od_refresh_uclk_table(smu);
}
return res;
diff --combined drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.h
index dff601bc0f9a4,538fb103ed8f8..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.h
@@@ -35,6 -35,10 +35,10 @@@
#define SMU_15_0_8_CAP_NPM 1
#define SMU_15_0_8_CAP_NODE_UNLOAD 2
#define SMU_15_0_8_NODE_UNLOAD_MIN_FW_VERSION 0x027d0c00u /* 2.125.12.0 */
+ #define SMU_15_0_8_GPU_METRICS_REVISION 1
+ #define SMU_15_0_8_GPUBOARD_TEMP_METRICS_REVISION 1
+ #define SMU_15_0_8_BASEBOARD_TEMP_METRICS_REVISION 1
+ #define SMU_15_0_8_PARTITION_METRICS_REVISION 1
extern void smu_v15_0_8_set_ppt_funcs(struct smu_context *smu);
typedef struct {
@@@ -143,10 -147,10 +147,10 @@@
SMU_ARRAY(SMU_MATTR(XGMI_LINK_STATUS), SMU_MUNIT(NONE), \
SMU_MTYPE(U16), xgmi_link_status, \
SMU_15_0_8_NUM_XGMI_LINKS); \
- SMU_SCALAR(SMU_MATTR(XGMI_READ_DATA_ACC), SMU_MUNIT(DATA_1), \
- SMU_MTYPE(U64), xgmi_read_data_acc); \
- SMU_SCALAR(SMU_MATTR(XGMI_WRITE_DATA_ACC), SMU_MUNIT(DATA_1), \
- SMU_MTYPE(U64), xgmi_write_data_acc); \
+ SMU_SCALAR(SMU_MATTR(XGMI_READ_BANDWIDTH_ACC), SMU_MUNIT(BW_1), \
+ SMU_MTYPE(U64), xgmi_read_bandwidth_acc); \
+ SMU_SCALAR(SMU_MATTR(XGMI_WRITE_BANDWIDTH_ACC), SMU_MUNIT(BW_1), \
+ SMU_MTYPE(U64), xgmi_write_bandwidth_acc); \
SMU_SCALAR(SMU_MATTR(FIRMWARE_TIMESTAMP), SMU_MUNIT(TIME_2), \
SMU_MTYPE(U64), firmware_timestamp); \
SMU_ARRAY(SMU_MATTR(CURRENT_GFXCLK), SMU_MUNIT(CLOCK_1), \
@@@ -181,7 -185,9 +185,9 @@@
SMU_15_0_8_MAX_XCC); \
SMU_ARRAY(SMU_MATTR(GFX_BELOW_HOST_LIMIT_TOTAL_ACC), SMU_MUNIT(NONE), \
SMU_MTYPE(U64), gfx_below_host_limit_total_acc, \
- SMU_15_0_8_MAX_XCC);
+ SMU_15_0_8_MAX_XCC); \
+ SMU_SCALAR(SMU_MATTR(REVISION), SMU_MUNIT(NONE), \
+ SMU_MTYPE(U16), revision);
DECLARE_SMU_METRICS_CLASS(smu_v15_0_8_gpu_metrics, SMU_15_0_8_METRICS_FIELDS);
@@@ -251,7 -257,9 +257,9 @@@
SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDIO_065_UCIEAM_C), SMU_MUNIT(TEMP_1), \
SMU_MTYPE(S16), vr_temp_vddio_065_ucieam_c); \
SMU_SCALAR(SMU_MATTR(VR_TEMP_VDDAN_075), SMU_MUNIT(TEMP_1), \
- SMU_MTYPE(S16), vr_temp_vddan_075);
+ SMU_MTYPE(S16), vr_temp_vddan_075); \
+ SMU_SCALAR(SMU_MATTR(REVISION), SMU_MUNIT(NONE), \
+ SMU_MTYPE(U16), revision);
DECLARE_SMU_METRICS_CLASS(smu_v15_0_8_gpuboard_temp_metrics,
SMU_15_0_8_GPUBOARD_TEMP_METRICS_FIELDS);
@@@ -309,7 -317,9 +317,9 @@@
SMU_SCALAR(SMU_MATTR(SYSTEM_TEMP_IBC_HSC), SMU_MUNIT(TEMP_1), \
SMU_MTYPE(S16), system_temp_ibc_hsc); \
SMU_SCALAR(SMU_MATTR(SYSTEM_TEMP_IBC), SMU_MUNIT(TEMP_1), \
- SMU_MTYPE(S16), system_temp_ibc);
+ SMU_MTYPE(S16), system_temp_ibc); \
+ SMU_SCALAR(SMU_MATTR(REVISION), SMU_MUNIT(NONE), \
+ SMU_MTYPE(U16), revision);
DECLARE_SMU_METRICS_CLASS(smu_v15_0_8_baseboard_temp_metrics,
SMU_15_0_8_BASEBOARD_TEMP_METRICS_FIELDS);
@@@ -343,7 -353,9 +353,9 @@@
SMU_SCALAR(SMU_MATTR(ACCUMULATION_COUNTER), SMU_MUNIT(NONE), \
SMU_MTYPE(U64), accumulation_counter); \
SMU_SCALAR(SMU_MATTR(FIRMWARE_TIMESTAMP), SMU_MUNIT(TIME_2), \
- SMU_MTYPE(U64), firmware_timestamp);
+ SMU_MTYPE(U64), firmware_timestamp); \
+ SMU_SCALAR(SMU_MATTR(REVISION), SMU_MUNIT(NONE), \
+ SMU_MTYPE(U16), revision);
DECLARE_SMU_METRICS_CLASS(smu_v15_0_8_partition_metrics,
SMU_15_0_8_PARTITION_METRICS_FIELDS);
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 12+ messages in thread* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-10-29 14:17 Mark Brown
2026-10-29 14:24 ` Alex Deucher
0 siblings, 1 reply; 12+ messages in thread
From: Mark Brown @ 2026-10-29 14:17 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
[-- Attachment #1: Type: text/plain, Size: 3017 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
between commits:
a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
44d0d3031e479 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
af52c8fd45fbd ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
9b0890e72d19b ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
from the origin tree and commits:
f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index dda435f19ca66,62f16d17e22bc..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@@ -2277,8 -2277,11 +2277,11 @@@ static ssize_t smu_v14_0_2_get_gpu_metr
metrics->Vcn1ActivityPercentage);
gpu_metrics->average_socket_power = metrics->AverageSocketPower;
- if (mp1_ver == IP_VERSION(14, 0, 3) && smu->smc_fw_version >= 0x00685000)
- gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
+ if ((mp1_ver == IP_VERSION(14, 0, 2) &&
+ smu->smc_fw_version >= 0x00664800) ||
+ (mp1_ver == IP_VERSION(14, 0, 3) &&
+ smu->smc_fw_version >= 0x00685000))
+ gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
if (metrics->AverageGfxActivity <= SMU_14_0_2_BUSY_THRESHOLD)
gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
@@@ -2600,14 -2603,9 +2603,10 @@@ static int smu_v14_0_2_od_restore_table
od_table->OverDriveTable.FanZeroRpmEnable =
boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
break;
- case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
- od_table->OverDriveTable.FanZeroRpmStopTemp =
- boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
- break;
case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
od_table->OverDriveTable.FanZeroRpmStopTemp =
boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
+ od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
break;
case PP_OD_EDIT_ACOUSTIC_LIMIT:
od_table->OverDriveTable.AcousticLimitRpmThreshold =
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^ permalink raw reply [flat|nested] 12+ messages in thread* Re: linux-next: manual merge of the amdgpu tree with the origin tree
2026-10-29 14:17 Mark Brown
@ 2026-10-29 14:24 ` Alex Deucher
2026-10-29 16:45 ` Mark Brown
0 siblings, 1 reply; 12+ messages in thread
From: Alex Deucher @ 2026-10-29 14:24 UTC (permalink / raw)
To: Mark Brown
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
On Thu, Oct 29, 2026 at 10:18 AM Mark Brown <broonie@kernel.org> wrote:
>
> Hi all,
>
> Today's linux-next merge of the amdgpu tree got a conflict in:
>
> drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
>
> between commits:
>
> a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 44d0d3031e479 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
> af52c8fd45fbd ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 9b0890e72d19b ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
>
> from the origin tree and commits:
>
> f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
> d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
> 8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
>
> from the amdgpu tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
>
> diff --combined drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> index dda435f19ca66,62f16d17e22bc..0000000000000
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> @@@ -2277,8 -2277,11 +2277,11 @@@ static ssize_t smu_v14_0_2_get_gpu_metr
> metrics->Vcn1ActivityPercentage);
>
> gpu_metrics->average_socket_power = metrics->AverageSocketPower;
> - if (mp1_ver == IP_VERSION(14, 0, 3) && smu->smc_fw_version >= 0x00685000)
> - gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
> + if ((mp1_ver == IP_VERSION(14, 0, 2) &&
> + smu->smc_fw_version >= 0x00664800) ||
> + (mp1_ver == IP_VERSION(14, 0, 3) &&
> + smu->smc_fw_version >= 0x00685000))
> + gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
>
> if (metrics->AverageGfxActivity <= SMU_14_0_2_BUSY_THRESHOLD)
> gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
> @@@ -2600,14 -2603,9 +2603,10 @@@ static int smu_v14_0_2_od_restore_table
> od_table->OverDriveTable.FanZeroRpmEnable =
> boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
> break;
> - case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
> - od_table->OverDriveTable.FanZeroRpmStopTemp =
> - boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
> - break;
> case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
> od_table->OverDriveTable.FanZeroRpmStopTemp =
> boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
> + od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
I believe this should be dropped. The FeatureCtrlMask updates are
handled in smu_v14_0_2_od_edit_dpm_table() now.
Thanks,
Alex
> break;
> case PP_OD_EDIT_ACOUSTIC_LIMIT:
> od_table->OverDriveTable.AcousticLimitRpmThreshold =
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: linux-next: manual merge of the amdgpu tree with the origin tree
2026-10-29 14:24 ` Alex Deucher
@ 2026-10-29 16:45 ` Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-10-29 16:45 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
[-- Attachment #1: Type: text/plain, Size: 747 bytes --]
On Thu, Oct 29, 2026 at 10:24:43AM -0400, Alex Deucher wrote:
> On Thu, Oct 29, 2026 at 10:18 AM Mark Brown <broonie@kernel.org> wrote:
> > case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
> > od_table->OverDriveTable.FanZeroRpmStopTemp =
> > boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
> > + od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
>
> I believe this should be dropped. The FeatureCtrlMask updates are
> handled in smu_v14_0_2_od_edit_dpm_table() now.
I guess it'll get dropped from your tree in that case? With all this
cherry picking noise I tend to assume that the amdgpu tree has the
indended state...
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-10-28 13:28 Mark Brown
2026-10-28 13:44 ` Mark Brown
0 siblings, 1 reply; 12+ messages in thread
From: Mark Brown @ 2026-10-28 13:28 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
[-- Attachment #1: Type: text/plain, Size: 18361 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
between commit:
a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
from the origin tree and commits:
f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index 6621e50de9651,62f16d17e22bc..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@@ -91,6 -91,10 +91,10 @@@ static const struct smu_feature_bits sm
#define PP_OD_FEATURE_FAN_ZERO_RPM_ENABLE 11
#define PP_OD_FEATURE_FAN_ZERO_RPM_STOP_TEMP 12
+ #define SMU_14_0_2_OD_FAN_FEATURE_MASK \
+ (BIT(PP_OD_FEATURE_FAN_CURVE_BIT) | \
+ BIT(PP_OD_FEATURE_FAN_LEGACY_BIT))
+
static struct cmn2asic_msg_mapping smu_v14_0_2_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(TestMessage, PPSMC_MSG_TestMessage, 1),
MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion, 1),
@@@ -963,6 -967,84 +967,84 @@@ out
return feature_enabled;
}
+ static u32
+ smu_v14_0_2_filter_od_feature_mask(struct smu_context *smu, u32 feature_mask)
+ {
+ PPTable_t *pptable = smu->smu_table.driver_pptable;
+ u32 supported_mask =
+ pptable->SkuTable.OverDriveLimitsBasicMax.FeatureCtrlMask;
+
+ return feature_mask & supported_mask;
+ }
+
+ static u32
+ smu_v14_0_2_get_od_feature_mask(struct smu_context *smu, u32 pending_mask)
+ {
+ u32 supported_mask = smu_v14_0_2_filter_od_feature_mask(smu, ~0U);
+ u32 fan_mask = supported_mask & SMU_14_0_2_OD_FAN_FEATURE_MASK;
+ u32 mask = smu->smu_table.user_od_feature_mask;
+
+ if (pending_mask & fan_mask)
+ mask &= ~fan_mask;
+ mask |= pending_mask;
+
+ return smu_v14_0_2_filter_od_feature_mask(smu, mask);
+ }
+
+ static bool smu_v14_0_2_fan_is_default(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot)
+ {
+ return !memcmp(od->FanLinearPwmPoints, boot->FanLinearPwmPoints,
+ sizeof(od->FanLinearPwmPoints)) &&
+ !memcmp(od->FanLinearTempPoints, boot->FanLinearTempPoints,
+ sizeof(od->FanLinearTempPoints)) &&
+ od->AcousticTargetRpmThreshold == boot->AcousticTargetRpmThreshold &&
+ od->AcousticLimitRpmThreshold == boot->AcousticLimitRpmThreshold &&
+ od->FanTargetTemperature == boot->FanTargetTemperature &&
+ od->FanMode == boot->FanMode;
+ }
+
+ static bool smu_v14_0_2_legacy_fan_is_default(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot)
+ {
+ return od->FanMinimumPwm == boot->FanMinimumPwm &&
+ od->FanMode == boot->FanMode;
+ }
+
+ static bool smu_v14_0_2_zero_fan_is_default(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot)
+ {
+ return od->FanZeroRpmEnable == boot->FanZeroRpmEnable &&
+ od->FanZeroRpmStopTemp == boot->FanZeroRpmStopTemp;
+ }
+
+ static u32 smu_v14_0_2_normalize_feature_mask(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot,
+ u32 feature_mask)
+ {
+ if (od->GfxclkFoffset == boot->GfxclkFoffset)
+ feature_mask &= ~BIT(PP_OD_FEATURE_GFXCLK_BIT);
+ if (od->UclkFmin == boot->UclkFmin &&
+ od->UclkFmax == boot->UclkFmax)
+ feature_mask &= ~BIT(PP_OD_FEATURE_UCLK_BIT);
+ if (!memcmp(od->VoltageOffsetPerZoneBoundary,
+ boot->VoltageOffsetPerZoneBoundary,
+ sizeof(od->VoltageOffsetPerZoneBoundary)))
+ feature_mask &= ~BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT);
+ if ((feature_mask & BIT(PP_OD_FEATURE_FAN_CURVE_BIT)) &&
+ smu_v14_0_2_fan_is_default(od, boot))
+ feature_mask &= ~BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ if ((feature_mask & BIT(PP_OD_FEATURE_FAN_LEGACY_BIT)) &&
+ smu_v14_0_2_legacy_fan_is_default(od, boot))
+ feature_mask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
+ if (smu_v14_0_2_zero_fan_is_default(od, boot))
+ feature_mask &= ~BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
+ if (!od->Ppt)
+ feature_mask &= ~BIT(PP_OD_FEATURE_PPT_BIT);
+
+ return feature_mask;
+ }
+
static void smu_v14_0_2_get_od_setting_limits(struct smu_context *smu,
int od_feature_bit,
int32_t *min,
@@@ -2195,8 -2277,11 +2277,11 @@@ static ssize_t smu_v14_0_2_get_gpu_metr
metrics->Vcn1ActivityPercentage);
gpu_metrics->average_socket_power = metrics->AverageSocketPower;
- if (mp1_ver == IP_VERSION(14, 0, 3) && smu->smc_fw_version >= 0x00685000)
- gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
+ if ((mp1_ver == IP_VERSION(14, 0, 2) &&
+ smu->smc_fw_version >= 0x00664800) ||
+ (mp1_ver == IP_VERSION(14, 0, 3) &&
+ smu->smc_fw_version >= 0x00685000))
+ gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
if (metrics->AverageGfxActivity <= SMU_14_0_2_BUSY_THRESHOLD)
gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
@@@ -2317,6 -2402,38 +2402,38 @@@ static int smu_v14_0_2_upload_overdrive
return ret;
}
+ static int
+ smu_v14_0_2_upload_ppt_overdrive_table(struct smu_context *smu, s16 ppt)
+ {
+ struct smu_table_context *table_context = &smu->smu_table;
+ OverDriveTableExternal_t *od_table = table_context->overdrive_table;
+ OverDriveTableExternal_t *user_od_table = table_context->user_overdrive_table;
+ OverDriveTableExternal_t upload_table;
+ u32 next_mask = table_context->user_od_feature_mask;
+ int ret;
+
+ /* Do not commit OD settings staged after the last c operation. */
+ memcpy(&upload_table, user_od_table, sizeof(upload_table));
+ upload_table.OverDriveTable.Ppt = ppt;
+ if (ppt)
+ next_mask |= BIT(PP_OD_FEATURE_PPT_BIT);
+ else
+ next_mask &= ~BIT(PP_OD_FEATURE_PPT_BIT);
+ upload_table.OverDriveTable.FeatureCtrlMask =
+ smu_v14_0_2_filter_od_feature_mask(smu, next_mask);
+
+ ret = smu_v14_0_2_upload_overdrive_table(smu, &upload_table);
+ if (ret)
+ return ret;
+
+ table_context->user_od_feature_mask =
+ upload_table.OverDriveTable.FeatureCtrlMask;
+ od_table->OverDriveTable.Ppt = ppt;
+ user_od_table->OverDriveTable.Ppt = ppt;
+
+ return 0;
+ }
+
static void smu_v14_0_2_set_supported_od_feature_mask(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
@@@ -2375,6 -2492,7 +2492,7 @@@ static int smu_v14_0_2_set_default_od_s
memcpy(od_table,
boot_od_table,
sizeof(OverDriveTableExternal_t));
+ od_table->OverDriveTable.FeatureCtrlMask = 0;
/*
* For S3/S4/Runpm resume, we need to setup those overdrive tables again,
@@@ -2384,7 -2502,9 +2502,9 @@@
memcpy(user_od_table,
boot_od_table,
sizeof(OverDriveTableExternal_t));
+ user_od_table->OverDriveTable.FeatureCtrlMask = 0;
smu->user_dpm_profile.user_od = false;
+ smu->smu_table.user_od_feature_mask = 0;
} else if (smu->user_dpm_profile.user_od) {
memcpy(&user_od_table_bak,
user_od_table,
@@@ -2419,6 -2539,14 +2539,14 @@@
user_od_table_bak.OverDriveTable.FanZeroRpmEnable;
user_od_table->OverDriveTable.FanZeroRpmStopTemp =
user_od_table_bak.OverDriveTable.FanZeroRpmStopTemp;
+ user_od_table->OverDriveTable.FanMode =
+ user_od_table_bak.OverDriveTable.FanMode;
+ user_od_table->OverDriveTable.FeatureCtrlMask = 0;
+ }
+ if (smu->adev->in_suspend) {
+ user_od_table->OverDriveTable.Ppt = 0;
+ smu->smu_table.user_od_feature_mask &=
+ ~BIT(PP_OD_FEATURE_PPT_BIT);
}
smu_v14_0_2_set_supported_od_feature_mask(smu);
@@@ -2431,17 -2559,22 +2559,22 @@@ static int smu_v14_0_2_restore_user_od_
struct smu_table_context *table_context = &smu->smu_table;
OverDriveTableExternal_t *od_table = table_context->overdrive_table;
OverDriveTableExternal_t *user_od_table = table_context->user_overdrive_table;
+ OverDriveTableExternal_t upload_table;
+ u32 next_mask;
int res;
- user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) |
- BIT(PP_OD_FEATURE_UCLK_BIT) |
- BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT) |
- BIT(PP_OD_FEATURE_FAN_CURVE_BIT) |
- BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
- res = smu_v14_0_2_upload_overdrive_table(smu, user_od_table);
- user_od_table->OverDriveTable.FeatureCtrlMask = 0;
- if (res == 0)
+ next_mask = smu_v14_0_2_filter_od_feature_mask(smu,
+ table_context->user_od_feature_mask);
+ memcpy(&upload_table, user_od_table, sizeof(upload_table));
+ upload_table.OverDriveTable.FeatureCtrlMask = next_mask;
+ res = smu_v14_0_2_upload_overdrive_table(smu, &upload_table);
+ if (res == 0) {
+ table_context->user_od_feature_mask = next_mask;
+ smu->user_dpm_profile.user_od =
+ !!(next_mask & ~BIT(PP_OD_FEATURE_PPT_BIT));
memcpy(od_table, user_od_table, sizeof(OverDriveTableExternal_t));
+ od_table->OverDriveTable.FeatureCtrlMask = 0;
+ }
return res;
}
@@@ -2465,43 -2598,30 +2598,35 @@@ static int smu_v14_0_2_od_restore_table
boot_overdrive_table->OverDriveTable.FanLinearPwmPoints[i];
}
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
- od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_FAN_ZERO_RPM_ENABLE:
od_table->OverDriveTable.FanZeroRpmEnable =
boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
+ break;
+ case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
+ od_table->OverDriveTable.FanZeroRpmStopTemp =
+ boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
break;
+ case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
+ od_table->OverDriveTable.FanZeroRpmStopTemp =
+ boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
+ od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
+ break;
case PP_OD_EDIT_ACOUSTIC_LIMIT:
od_table->OverDriveTable.AcousticLimitRpmThreshold =
boot_overdrive_table->OverDriveTable.AcousticLimitRpmThreshold;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
case PP_OD_EDIT_ACOUSTIC_TARGET:
od_table->OverDriveTable.AcousticTargetRpmThreshold =
boot_overdrive_table->OverDriveTable.AcousticTargetRpmThreshold;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
case PP_OD_EDIT_FAN_TARGET_TEMPERATURE:
od_table->OverDriveTable.FanTargetTemperature =
boot_overdrive_table->OverDriveTable.FanTargetTemperature;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
case PP_OD_EDIT_FAN_MINIMUM_PWM:
od_table->OverDriveTable.FanMinimumPwm =
boot_overdrive_table->OverDriveTable.FanMinimumPwm;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
- od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
default:
dev_info(adev->dev, "Invalid table index: %ld\n", input);
@@@ -2519,10 -2639,17 +2644,17 @@@ static int smu_v14_0_2_od_edit_dpm_tabl
struct smu_table_context *table_context = &smu->smu_table;
OverDriveTableExternal_t *od_table =
(OverDriveTableExternal_t *)table_context->overdrive_table;
+ OverDriveTableExternal_t *user_od_table =
+ (OverDriveTableExternal_t *)table_context->user_overdrive_table;
+ OverDriveTableExternal_t *boot_od_table =
+ (OverDriveTableExternal_t *)table_context->boot_overdrive_table;
+ OverDriveTableExternal_t upload_table;
+ OverDriveTable_t *od = &od_table->OverDriveTable;
+ OverDriveTable_t *boot = &boot_od_table->OverDriveTable;
struct amdgpu_device *adev = smu->adev;
uint32_t offset_of_voltageoffset;
int32_t minimum, maximum;
- uint32_t feature_ctrlmask;
+ u32 next_mask;
int i, ret = 0;
switch (type) {
@@@ -2694,6 -2821,7 +2826,7 @@@
od_table->OverDriveTable.AcousticLimitRpmThreshold = input[0];
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_ACOUSTIC_TARGET:
@@@ -2716,6 -2844,7 +2849,7 @@@
od_table->OverDriveTable.AcousticTargetRpmThreshold = input[0];
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_FAN_TARGET_TEMPERATURE:
@@@ -2738,6 -2867,7 +2872,7 @@@
od_table->OverDriveTable.FanTargetTemperature = input[0];
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_FAN_MINIMUM_PWM:
@@@ -2811,44 -2941,42 +2946,42 @@@
if (ret)
return ret;
} else {
- feature_ctrlmask = od_table->OverDriveTable.FeatureCtrlMask;
memcpy(od_table,
table_context->boot_overdrive_table,
sizeof(OverDriveTableExternal_t));
- od_table->OverDriveTable.FeatureCtrlMask = feature_ctrlmask;
+ od_table->OverDriveTable.FeatureCtrlMask = 0;
}
fallthrough;
case PP_OD_COMMIT_DPM_TABLE:
- /*
- * The member below instructs PMFW the settings focused in
- * this single operation.
- * `uint32_t FeatureCtrlMask;`
- * It does not contain actual informations about user's custom
- * settings. Thus we do not cache it.
- */
offset_of_voltageoffset = offsetof(OverDriveTable_t, VoltageOffsetPerZoneBoundary);
- if (memcmp((u8 *)od_table + offset_of_voltageoffset,
- table_context->user_overdrive_table + offset_of_voltageoffset,
- sizeof(OverDriveTableExternal_t) - offset_of_voltageoffset)) {
- smu_v14_0_2_dump_od_table(smu, od_table);
+ next_mask = smu_v14_0_2_get_od_feature_mask(smu,
+ od->FeatureCtrlMask);
+ next_mask = smu_v14_0_2_normalize_feature_mask(od, boot,
+ next_mask);
- ret = smu_v14_0_2_upload_overdrive_table(smu, od_table);
+ if (memcmp((u8 *)od_table + offset_of_voltageoffset,
+ (u8 *)user_od_table + offset_of_voltageoffset,
+ sizeof(OverDriveTableExternal_t) - offset_of_voltageoffset) ||
+ next_mask != table_context->user_od_feature_mask) {
+ memcpy(&upload_table, od_table, sizeof(upload_table));
+ upload_table.OverDriveTable.FeatureCtrlMask = next_mask;
+ smu_v14_0_2_dump_od_table(smu, &upload_table);
+
+ ret = smu_v14_0_2_upload_overdrive_table(smu, &upload_table);
if (ret) {
dev_err(adev->dev, "Failed to upload overdrive table!\n");
return ret;
}
+ table_context->user_od_feature_mask = next_mask;
od_table->OverDriveTable.FeatureCtrlMask = 0;
- memcpy(table_context->user_overdrive_table + offset_of_voltageoffset,
+ memcpy((u8 *)user_od_table + offset_of_voltageoffset,
(u8 *)od_table + offset_of_voltageoffset,
sizeof(OverDriveTableExternal_t) - offset_of_voltageoffset);
+ user_od_table->OverDriveTable.FeatureCtrlMask = 0;
- if (!memcmp(table_context->user_overdrive_table,
- table_context->boot_overdrive_table,
- sizeof(OverDriveTableExternal_t)))
- smu->user_dpm_profile.user_od = false;
- else
- smu->user_dpm_profile.user_od = true;
+ smu->user_dpm_profile.user_od =
+ !!(next_mask & ~BIT(PP_OD_FEATURE_PPT_BIT));
}
break;
@@@ -2866,10 -2994,8 +2999,8 @@@ static int smu_v14_0_2_set_ppt_limit(st
PPTable_t *pptable = smu->smu_table.driver_pptable;
uint32_t msg_limit = pptable->SkuTable.MsgLimits.Power
[PPT_THROTTLER_PPT0][POWER_SOURCE_AC];
- struct smu_table_context *table_context = &smu->smu_table;
- OverDriveTableExternal_t *od_table =
- (OverDriveTableExternal_t *)table_context->overdrive_table;
OverDriveTableExternal_t current_od_table;
+ s16 ppt;
int ret = 0;
if (limit_type != SMU_PPT_LIMIT_PPT0)
@@@ -2881,10 -3007,7 +3012,7 @@@
return ret;
if (current_od_table.OverDriveTable.Ppt) {
- od_table->OverDriveTable.Ppt = 0;
- od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
-
- ret = smu_v14_0_2_upload_overdrive_table(smu, od_table);
+ ret = smu_v14_0_2_upload_ppt_overdrive_table(smu, 0);
if (ret) {
dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
return ret;
@@@ -2896,10 -3019,8 +3024,8 @@@
if (ret)
return ret;
- od_table->OverDriveTable.Ppt = (limit * 100) / msg_limit - 100;
- od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
-
- ret = smu_v14_0_2_upload_overdrive_table(smu, od_table);
+ ppt = (limit * 100) / msg_limit - 100;
+ ret = smu_v14_0_2_upload_ppt_overdrive_table(smu, ppt);
if (ret) {
dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
return ret;
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 12+ messages in thread* Re: linux-next: manual merge of the amdgpu tree with the origin tree
2026-10-28 13:28 Mark Brown
@ 2026-10-28 13:44 ` Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-10-28 13:44 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
[-- Attachment #1: Type: text/plain, Size: 2048 bytes --]
On Wed, Oct 28, 2026 at 01:28:42PM +0000, Mark Brown wrote:
> Hi all,
>
> Today's linux-next merge of the amdgpu tree got a conflict in:
>
> drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
>
> between commit:
>
> a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
>
> from the origin tree and commits:
>
> f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
> d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
> 8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
>
> from the amdgpu tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
Also needs this additional fixup to cope with the cherry picking:
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index cdd308ced4f9a..24a3d61d8ea66 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -2603,10 +2603,6 @@ static int smu_v14_0_2_od_restore_table_single(struct smu_context *smu, long inp
od_table->OverDriveTable.FanZeroRpmEnable =
boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
break;
- case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
- od_table->OverDriveTable.FanZeroRpmStopTemp =
- boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
- break;
case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
od_table->OverDriveTable.FanZeroRpmStopTemp =
boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
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^ permalink raw reply [flat|nested] 12+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-09-07 22:51 Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-09-07 22:51 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kees Cook, Kees Cook, Linux Kernel Mailing List,
Linux Next Mailing List, YiPeng Chai
[-- Attachment #1: Type: text/plain, Size: 10300 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/ras/core/cmd.c
between commit:
3a2c4d55e32ad ("treewide: refresh kmalloc_obj() conversions")
from the origin tree and commits:
cb6996164ccb4 ("drm/amd/ras: fix ras cmd returning incorrect cper count")
49452ca7a7f5a ("drm/amd/ras: Add dedicated interface to obtain cper info")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/ras/core/cmd.c
index 446b935c1fc91,9f874800f38df..0000000000000
--- a/drivers/gpu/drm/amd/ras/core/cmd.c
+++ b/drivers/gpu/drm/amd/ras/core/cmd.c
@@@ -43,7 -43,8 +43,8 @@@ static int ras_get_block_ecc_info(struc
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
memset(&err_data, 0, sizeof(err_data));
- ret = ras_aca_get_block_ecc_count(ras_core, input_data->block_id, &err_data);
+ ret = ras_core_query_block_ecc_data(ras_core,
+ input_data->block_id, &err_data, false);
if (ret)
return RAS_CMD__ERROR_GENERIC;
@@@ -143,13 -144,8 +144,8 @@@ static int ras_cmd_clear_bad_page_info(
if (cmd->input_size != sizeof(struct ras_cmd_dev_handle))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
- if (ras_fw_eeprom_supported(ras_core)) {
- if (ras_fw_eeprom_reset_table(ras_core))
- return RAS_CMD__ERROR_GENERIC;
- } else {
- if (ras_eeprom_reset_table(ras_core))
- return RAS_CMD__ERROR_GENERIC;
- }
+ if (ras_eeprom_mgr_reset_table(ras_core))
+ return RAS_CMD__ERROR_GENERIC;
if (ras_umc_clean_badpage_data(ras_core))
return RAS_CMD__ERROR_GENERIC;
@@@ -178,16 -174,18 +174,18 @@@ static int ras_cmd_get_cper_snapshot(st
struct ras_cmd_cper_snapshot_rsp *output_data =
(struct ras_cmd_cper_snapshot_rsp *)cmd->output_buff_raw;
struct ras_log_batch_overview overview;
+ u64 latest_cper_id;
if ((cmd->input_size != sizeof(struct ras_cmd_cper_snapshot_req)) ||
(cmd->output_buf_size < sizeof(*output_data)))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
ras_log_ring_get_batch_overview(ras_core, &overview);
+ latest_cper_id = overview.logged_batch_count ? overview.last_batch_id - 1 : 0;
output_data->total_cper_num = overview.logged_batch_count;
output_data->start_cper_id = overview.first_batch_id;
- output_data->latest_cper_id = overview.last_batch_id;
+ output_data->latest_cper_id = latest_cper_id;
output_data->version = 0;
@@@ -202,13 -200,13 +200,13 @@@ static int ras_cmd_get_cper_records(str
(struct ras_cmd_cper_record_req *)cmd->input_buff_raw;
struct ras_cmd_cper_record_rsp *rsp =
(struct ras_cmd_cper_record_rsp *)cmd->output_buff_raw;
- struct ras_log_info *trace = NULL;
- uint32_t trace_count = MAX_RECORD_PER_BATCH;
+ struct ras_log_info *batch_logs = NULL;
+ uint32_t nr_batch_logs = MAX_RECORD_PER_BATCH;
struct ras_log_batch_overview overview;
uint32_t offset = 0, real_data_len = 0;
- uint64_t batch_id;
- uint8_t *buffer = NULL;
- int ret = 0, i, count;
+ u64 batch_id, start_batch_id;
+ uint8_t *buf_ptr = (uint8_t *)(uintptr_t)req->buf_ptr;
+ int ret = 0, i, count, read_batch_count = 0;
if ((cmd->input_size != sizeof(struct ras_cmd_cper_record_req)) ||
(cmd->output_buf_size < sizeof(*rsp)))
@@@ -218,42 -216,50 +216,50 @@@
req->buf_size > RAS_CMD_MAX_CPER_BUF_SZ)
return RAS_CMD__ERROR_INVALID_INPUT_DATA;
- buffer = kzalloc(req->buf_size, GFP_KERNEL);
- if (!buffer)
- return RAS_CMD__ERROR_GENERIC;
-
- trace = kzalloc_objs(*trace, trace_count);
- if (!trace) {
+ batch_logs = kcalloc(nr_batch_logs, sizeof(*batch_logs), GFP_KERNEL);
+ if (!batch_logs) {
ret = RAS_CMD__ERROR_GENERIC;
goto out;
}
ras_log_ring_get_batch_overview(ras_core, &overview);
+
+ start_batch_id = req->cper_start_id;
+
for (i = 0; i < req->cper_num; i++) {
- batch_id = req->cper_start_id + i;
+ batch_id = start_batch_id + i;
if (batch_id >= overview.last_batch_id)
break;
- count = ras_log_ring_get_batch_records(ras_core, batch_id, trace,
- trace_count);
+ count = ras_log_ring_get_batch_records(ras_core, batch_id, batch_logs,
+ nr_batch_logs);
if (count > 0) {
- ret = ras_cper_generate_cper(ras_core, trace, count,
- &buffer[offset], req->buf_size - offset, &real_data_len);
+ if (offset >= req->buf_size) {
+ ret = -ENOMEM;
+ break;
+ }
+
+ ret = ras_cper_generate_batch_cper(ras_core, batch_logs, count,
+ &buf_ptr[offset], req->buf_size - offset, &real_data_len);
if (ret)
break;
offset += real_data_len;
}
+
+ /* The caller resumes at cper_start_id + real_cper_num, so an id
+ * that held nothing still has to be counted here.
+ */
+ read_batch_count++;
}
- if ((ret && (ret != -ENOMEM)) ||
- copy_to_user(u64_to_user_ptr(req->buf_ptr), buffer, offset)) {
+ if ((ret && (ret != -ENOMEM))) {
ret = RAS_CMD__ERROR_GENERIC;
goto out;
}
rsp->real_data_size = offset;
- rsp->real_cper_num = i;
+ rsp->real_cper_num = read_batch_count;
rsp->remain_num = (ret == -ENOMEM) ? (req->cper_num - i) : 0;
rsp->version = 0;
@@@ -261,8 -267,7 +267,7 @@@
ret = RAS_CMD__SUCCESS;
out:
- kfree(trace);
- kfree(buffer);
+ kfree(batch_logs);
return ret;
}
@@@ -316,7 -321,7 +321,7 @@@ static int ras_cmd_get_batch_trace_reco
(input_data->start_batch_id >= overview.last_batch_id))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
- trace_arry = kcalloc(trace_count, sizeof(*trace_arry), GFP_KERNEL);
+ trace_arry = kzalloc_objs(*trace_arry, trace_count);
if (!trace_arry)
return RAS_CMD__ERROR_GENERIC;
@@@ -337,8 -342,8 +342,8 @@@
record->seqno = trace_arry[j].seqno;
record->timestamp = trace_arry[j].timestamp;
record->event = trace_arry[j].event;
- memcpy(&record->aca_reg,
- &trace_arry[j].aca_reg, sizeof(trace_arry[j].aca_reg));
+ memcpy(&record->body, &trace_arry[j].body,
+ sizeof(record->body));
}
} else {
count = 0;
@@@ -362,48 -367,6 +367,6 @@@
return RAS_CMD__SUCCESS;
}
- static enum ras_ta_block __get_ras_ta_block(enum ras_block_id block)
- {
- switch (block) {
- case RAS_BLOCK_ID__UMC:
- return RAS_TA_BLOCK__UMC;
- case RAS_BLOCK_ID__SDMA:
- return RAS_TA_BLOCK__SDMA;
- case RAS_BLOCK_ID__GFX:
- return RAS_TA_BLOCK__GFX;
- case RAS_BLOCK_ID__MMHUB:
- return RAS_TA_BLOCK__MMHUB;
- case RAS_BLOCK_ID__ATHUB:
- return RAS_TA_BLOCK__ATHUB;
- case RAS_BLOCK_ID__PCIE_BIF:
- return RAS_TA_BLOCK__PCIE_BIF;
- case RAS_BLOCK_ID__HDP:
- return RAS_TA_BLOCK__HDP;
- case RAS_BLOCK_ID__XGMI_WAFL:
- return RAS_TA_BLOCK__XGMI_WAFL;
- case RAS_BLOCK_ID__DF:
- return RAS_TA_BLOCK__DF;
- case RAS_BLOCK_ID__SMN:
- return RAS_TA_BLOCK__SMN;
- case RAS_BLOCK_ID__SEM:
- return RAS_TA_BLOCK__SEM;
- case RAS_BLOCK_ID__MP0:
- return RAS_TA_BLOCK__MP0;
- case RAS_BLOCK_ID__MP1:
- return RAS_TA_BLOCK__MP1;
- case RAS_BLOCK_ID__FUSE:
- return RAS_TA_BLOCK__FUSE;
- case RAS_BLOCK_ID__MCA:
- return RAS_TA_BLOCK__MCA;
- case RAS_BLOCK_ID__VCN:
- return RAS_TA_BLOCK__VCN;
- case RAS_BLOCK_ID__JPEG:
- return RAS_TA_BLOCK__JPEG;
- default:
- return RAS_TA_BLOCK__UMC;
- }
- }
-
static enum ras_ta_error_type __get_ras_ta_err_type(enum ras_ecc_err_type error)
{
switch (error) {
@@@ -431,7 -394,6 +394,6 @@@ static int ras_cmd_inject_error(struct
(struct ras_cmd_inject_error_rsp *)cmd->output_buff_raw;
int ret = 0;
struct ras_ta_trigger_error_input block_info = {
- .block_id = __get_ras_ta_block(req->block_id),
.sub_block_index = req->subblock_id,
.inject_error_type = __get_ras_ta_err_type(req->error_type),
.address = req->address,
@@@ -442,6 -404,12 +404,12 @@@
(cmd->output_buf_size < sizeof(*output_data)))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
+ ret = ras_psp_get_block_ta_id(ras_core, req->block_id, &block_info.block_id);
+ if (ret == -RAS_CORE_NOT_SUPPORTED)
+ return RAS_CMD__ERROR_UNSUPPORT;
+ else if (ret)
+ return ret;
+
ret = ras_psp_trigger_error(ras_core, &block_info, req->instance_mask);
if (!ret) {
output_data->version = 0;
@@@ -455,6 -423,34 +423,34 @@@
return ret;
}
+ static int ras_cmd_get_ras_cap(struct ras_core_context *ras_core,
+ struct ras_cmd_ctx *cmd, void *data)
+ {
+ struct ras_cmd_get_ras_cap_rsp *output_data =
+ (struct ras_cmd_get_ras_cap_rsp *)cmd->output_buff_raw;
+
+ output_data->version = 0;
+ output_data->poison = ras_core_poison_supported(ras_core);
+ output_data->flex_mca = ras_psp_flex_mca_enabled(ras_core);
+ output_data->ras_block_mask = ras_core_get_ras_caps(ras_core);
+
+ output_data->ecc_type = 0;
+ if (output_data->poison)
+ output_data->ecc_type |= BIT_ULL(RAS_ECC_TYPE_POISON);
+
+ if (output_data->ras_block_mask & BIT_ULL(RAS_BLOCK_ID__UMC))
+ output_data->ecc_type |= BIT_ULL(RAS_ECC_TYPE_MEM);
+
+ if (output_data->ras_block_mask &
+ (BIT_ULL(RAS_BLOCK_ID__GFX) | BIT_ULL(RAS_BLOCK_ID__SDMA)))
+ output_data->ecc_type |= BIT_ULL(RAS_ECC_TYPE_SRAM);
+
+
+ cmd->output_size = sizeof(struct ras_cmd_get_ras_cap_rsp);
+
+ return 0;
+ }
+
static struct ras_cmd_func_map ras_cmd_maps[] = {
{RAS_CMD__INJECT_ERROR, ras_cmd_inject_error},
{RAS_CMD__GET_BLOCK_ECC_STATUS, ras_get_block_ecc_info},
@@@ -465,6 -461,7 +461,7 @@@
{RAS_CMD__GET_CPER_RECORD, ras_cmd_get_cper_records},
{RAS_CMD__GET_BATCH_TRACE_SNAPSHOT, ras_cmd_get_batch_trace_snapshot},
{RAS_CMD__GET_BATCH_TRACE_RECORD, ras_cmd_get_batch_trace_records},
+ {RAS_CMD__GET_RAS_CAP, ras_cmd_get_ras_cap},
};
int rascore_handle_cmd(struct ras_core_context *ras_core,
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^ permalink raw reply [flat|nested] 12+ messages in thread* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-07-29 13:28 Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-07-29 13:28 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Leo Li, Linux Kernel Mailing List,
Linux Next Mailing List, Mario Limonciello
[-- Attachment #1: Type: text/plain, Size: 1727 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
between commit:
82730dba0cf9d ("drm/amd/display: Fix flip-done timeouts on mode1 reset")
from the origin tree and commit:
7e1b4bdb0e05a ("drm/amd/display: Fix flip-done timeouts on mode1 reset")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index ff308ee40909e,079d4ccc88da6..0000000000000
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@@ -34,7 -34,7 +34,7 @@@
#include "amdgpu_dm_plane.h"
#include "amdgpu_dm_trace.h"
#include "amdgpu_dm_debugfs.h"
- #include "amdgpu_dm_kunit_helpers.h"
+ #include "dm_helpers.h"
#include "modules/inc/mod_power.h"
#define HPD_DETECTION_PERIOD_uS 2000000
@@@ -287,8 -287,6 +287,6 @@@ static inline int amdgpu_dm_crtc_set_vb
* is enabled. On DCE, vupdate is only needed in VRR mode.
*/
if (amdgpu_ip_version(adev, DCE_HWIP, 0) != 0) {
- rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, enable);
- } else if (dc_supports_vrr(dm->dc->ctx->dce_version)) {
if (enable) {
rc = amdgpu_irq_get(adev, &adev->vupdate_irq, irq_type);
drm_dbg_vbl(crtc->dev, "Get vupdate_irq ret=%d\n", rc);
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^ permalink raw reply [flat|nested] 12+ messages in thread* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-03-03 13:09 Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-03-03 13:09 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Linux Kernel Mailing List, Linux Next Mailing List,
Srinivasan Shanmugam, Sunil Khatri, Tvrtko Ursulin
[-- Attachment #1: Type: text/plain, Size: 12073 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
between commits:
ea78f8c68f4f6 ("drm/amdgpu: add upper bound check on user inputs in signal ioctl")
64ac7c09fc449 ("drm/amdgpu: add upper bound check on user inputs in wait ioctl")
from the origin tree and commits:
be267e15f99bc ("drm/amdgpu: add upper bound check on user inputs in signal ioctl")
fcec012c66424 ("drm/amdgpu: add upper bound check on user inputs in wait ioctl")
750cbc4fbd490 ("drm/amdgpu: Drop redundant syncobj handle limit checks in userq ioctls")
2de9353e193fd ("drm/amdgpu/userq: Use drm_gem_objects_lookup in amdgpu_userq_wait_ioctl")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
index 7e9cf1868cc9f,d31cadf47b3b5..0000000000000
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
@@@ -461,33 -461,31 +461,31 @@@ int amdgpu_userq_signal_ioctl(struct dr
struct drm_file *filp)
{
struct amdgpu_device *adev = drm_to_adev(dev);
+ struct drm_amdgpu_userq_signal *args = data;
+ const unsigned int num_write_bo_handles = args->num_bo_write_handles;
+ const unsigned int num_read_bo_handles = args->num_bo_read_handles;
struct amdgpu_fpriv *fpriv = filp->driver_priv;
struct amdgpu_userq_mgr *userq_mgr = &fpriv->userq_mgr;
- struct drm_amdgpu_userq_signal *args = data;
- struct drm_gem_object **gobj_write = NULL;
- struct drm_gem_object **gobj_read = NULL;
- struct amdgpu_usermode_queue *queue;
- struct amdgpu_userq_fence *userq_fence;
- struct drm_syncobj **syncobj = NULL;
- u32 *bo_handles_write, num_write_bo_handles;
+ struct drm_gem_object **gobj_write, **gobj_read;
u32 *syncobj_handles, num_syncobj_handles;
- u32 *bo_handles_read, num_read_bo_handles;
- int r, i, entry, rentry, wentry;
+ struct amdgpu_userq_fence *userq_fence;
+ struct amdgpu_usermode_queue *queue;
+ struct drm_syncobj **syncobj = NULL;
struct dma_fence *fence;
struct drm_exec exec;
+ int r, i, entry;
u64 wptr;
if (!amdgpu_userq_enabled(dev))
return -ENOTSUPP;
- if (args->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
- args->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
+ if (args->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
args->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
return -EINVAL;
num_syncobj_handles = args->num_syncobj_handles;
- syncobj_handles = memdup_user(u64_to_user_ptr(args->syncobj_handles),
- size_mul(sizeof(u32), num_syncobj_handles));
+ syncobj_handles = memdup_array_user(u64_to_user_ptr(args->syncobj_handles),
+ num_syncobj_handles, sizeof(u32));
if (IS_ERR(syncobj_handles))
return PTR_ERR(syncobj_handles);
@@@ -506,51 -504,19 +504,19 @@@
}
}
- num_read_bo_handles = args->num_bo_read_handles;
- bo_handles_read = memdup_user(u64_to_user_ptr(args->bo_read_handles),
- sizeof(u32) * num_read_bo_handles);
- if (IS_ERR(bo_handles_read)) {
- r = PTR_ERR(bo_handles_read);
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(args->bo_read_handles),
+ num_read_bo_handles,
+ &gobj_read);
+ if (r)
goto free_syncobj;
- }
- /* Array of pointers to the GEM read objects */
- gobj_read = kmalloc_array(num_read_bo_handles, sizeof(*gobj_read), GFP_KERNEL);
- if (!gobj_read) {
- r = -ENOMEM;
- goto free_bo_handles_read;
- }
-
- for (rentry = 0; rentry < num_read_bo_handles; rentry++) {
- gobj_read[rentry] = drm_gem_object_lookup(filp, bo_handles_read[rentry]);
- if (!gobj_read[rentry]) {
- r = -ENOENT;
- goto put_gobj_read;
- }
- }
-
- num_write_bo_handles = args->num_bo_write_handles;
- bo_handles_write = memdup_user(u64_to_user_ptr(args->bo_write_handles),
- sizeof(u32) * num_write_bo_handles);
- if (IS_ERR(bo_handles_write)) {
- r = PTR_ERR(bo_handles_write);
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(args->bo_write_handles),
+ num_write_bo_handles,
+ &gobj_write);
+ if (r)
goto put_gobj_read;
- }
-
- /* Array of pointers to the GEM write objects */
- gobj_write = kmalloc_array(num_write_bo_handles, sizeof(*gobj_write), GFP_KERNEL);
- if (!gobj_write) {
- r = -ENOMEM;
- goto free_bo_handles_write;
- }
-
- for (wentry = 0; wentry < num_write_bo_handles; wentry++) {
- gobj_write[wentry] = drm_gem_object_lookup(filp, bo_handles_write[wentry]);
- if (!gobj_write[wentry]) {
- r = -ENOENT;
- goto put_gobj_write;
- }
- }
/* Retrieve the user queue */
queue = xa_load(&userq_mgr->userq_xa, args->queue_id);
@@@ -629,17 -595,13 +595,13 @@@
exec_fini:
drm_exec_fini(&exec);
put_gobj_write:
- while (wentry-- > 0)
- drm_gem_object_put(gobj_write[wentry]);
+ for (i = 0; i < num_write_bo_handles; i++)
+ drm_gem_object_put(gobj_write[i]);
kfree(gobj_write);
- free_bo_handles_write:
- kfree(bo_handles_write);
put_gobj_read:
- while (rentry-- > 0)
- drm_gem_object_put(gobj_read[rentry]);
+ for (i = 0; i < num_read_bo_handles; i++)
+ drm_gem_object_put(gobj_read[i]);
kfree(gobj_read);
- free_bo_handles_read:
- kfree(bo_handles_read);
free_syncobj:
while (entry-- > 0)
if (syncobj[entry])
@@@ -654,92 -616,64 +616,64 @@@ free_syncobj_handles
int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
{
- u32 *syncobj_handles, *timeline_points, *timeline_handles, *bo_handles_read, *bo_handles_write;
- u32 num_syncobj, num_read_bo_handles, num_write_bo_handles;
- struct drm_amdgpu_userq_fence_info *fence_info = NULL;
struct drm_amdgpu_userq_wait *wait_info = data;
+ const unsigned int num_write_bo_handles = wait_info->num_bo_write_handles;
+ const unsigned int num_read_bo_handles = wait_info->num_bo_read_handles;
+ struct drm_amdgpu_userq_fence_info *fence_info = NULL;
struct amdgpu_fpriv *fpriv = filp->driver_priv;
struct amdgpu_userq_mgr *userq_mgr = &fpriv->userq_mgr;
+ struct drm_gem_object **gobj_write, **gobj_read;
+ u32 *timeline_points, *timeline_handles;
struct amdgpu_usermode_queue *waitq;
- struct drm_gem_object **gobj_write;
- struct drm_gem_object **gobj_read;
+ u32 *syncobj_handles, num_syncobj;
struct dma_fence **fences = NULL;
u16 num_points, num_fences = 0;
- int r, i, rentry, wentry, cnt;
struct drm_exec exec;
+ int r, i, cnt;
if (!amdgpu_userq_enabled(dev))
return -ENOTSUPP;
- if (wait_info->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
- wait_info->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
+ if (wait_info->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
wait_info->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
return -EINVAL;
- num_read_bo_handles = wait_info->num_bo_read_handles;
- bo_handles_read = memdup_user(u64_to_user_ptr(wait_info->bo_read_handles),
- size_mul(sizeof(u32), num_read_bo_handles));
- if (IS_ERR(bo_handles_read))
- return PTR_ERR(bo_handles_read);
-
- num_write_bo_handles = wait_info->num_bo_write_handles;
- bo_handles_write = memdup_user(u64_to_user_ptr(wait_info->bo_write_handles),
- size_mul(sizeof(u32), num_write_bo_handles));
- if (IS_ERR(bo_handles_write)) {
- r = PTR_ERR(bo_handles_write);
- goto free_bo_handles_read;
- }
-
num_syncobj = wait_info->num_syncobj_handles;
- syncobj_handles = memdup_user(u64_to_user_ptr(wait_info->syncobj_handles),
- size_mul(sizeof(u32), num_syncobj));
- if (IS_ERR(syncobj_handles)) {
- r = PTR_ERR(syncobj_handles);
- goto free_bo_handles_write;
- }
+ syncobj_handles = memdup_array_user(u64_to_user_ptr(wait_info->syncobj_handles),
+ num_syncobj, sizeof(u32));
+ if (IS_ERR(syncobj_handles))
+ return PTR_ERR(syncobj_handles);
+
num_points = wait_info->num_syncobj_timeline_handles;
- timeline_handles = memdup_user(u64_to_user_ptr(wait_info->syncobj_timeline_handles),
- sizeof(u32) * num_points);
+ timeline_handles = memdup_array_user(u64_to_user_ptr(wait_info->syncobj_timeline_handles),
+ num_points, sizeof(u32));
if (IS_ERR(timeline_handles)) {
r = PTR_ERR(timeline_handles);
goto free_syncobj_handles;
}
- timeline_points = memdup_user(u64_to_user_ptr(wait_info->syncobj_timeline_points),
- sizeof(u32) * num_points);
+ timeline_points = memdup_array_user(u64_to_user_ptr(wait_info->syncobj_timeline_points),
+ num_points, sizeof(u32));
+
if (IS_ERR(timeline_points)) {
r = PTR_ERR(timeline_points);
goto free_timeline_handles;
}
- gobj_read = kmalloc_array(num_read_bo_handles, sizeof(*gobj_read), GFP_KERNEL);
- if (!gobj_read) {
- r = -ENOMEM;
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(wait_info->bo_read_handles),
+ num_read_bo_handles,
+ &gobj_read);
+ if (r)
goto free_timeline_points;
- }
- for (rentry = 0; rentry < num_read_bo_handles; rentry++) {
- gobj_read[rentry] = drm_gem_object_lookup(filp, bo_handles_read[rentry]);
- if (!gobj_read[rentry]) {
- r = -ENOENT;
- goto put_gobj_read;
- }
- }
-
- gobj_write = kmalloc_array(num_write_bo_handles, sizeof(*gobj_write), GFP_KERNEL);
- if (!gobj_write) {
- r = -ENOMEM;
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(wait_info->bo_write_handles),
+ num_write_bo_handles,
+ &gobj_write);
+ if (r)
goto put_gobj_read;
- }
-
- for (wentry = 0; wentry < num_write_bo_handles; wentry++) {
- gobj_write[wentry] = drm_gem_object_lookup(filp, bo_handles_write[wentry]);
- if (!gobj_write[wentry]) {
- r = -ENOENT;
- goto put_gobj_write;
- }
- }
drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT,
(num_read_bo_handles + num_write_bo_handles));
@@@ -983,43 -917,25 +917,25 @@@
r = -EFAULT;
goto free_fences;
}
-
- kfree(fences);
- kfree(fence_info);
}
- drm_exec_fini(&exec);
- for (i = 0; i < num_read_bo_handles; i++)
- drm_gem_object_put(gobj_read[i]);
- kfree(gobj_read);
-
- for (i = 0; i < num_write_bo_handles; i++)
- drm_gem_object_put(gobj_write[i]);
- kfree(gobj_write);
-
- kfree(timeline_points);
- kfree(timeline_handles);
- kfree(syncobj_handles);
- kfree(bo_handles_write);
- kfree(bo_handles_read);
-
- return 0;
-
free_fences:
- while (num_fences-- > 0)
- dma_fence_put(fences[num_fences]);
- kfree(fences);
+ if (fences) {
+ while (num_fences-- > 0)
+ dma_fence_put(fences[num_fences]);
+ kfree(fences);
+ }
free_fence_info:
kfree(fence_info);
exec_fini:
drm_exec_fini(&exec);
put_gobj_write:
- while (wentry-- > 0)
- drm_gem_object_put(gobj_write[wentry]);
+ for (i = 0; i < num_write_bo_handles; i++)
+ drm_gem_object_put(gobj_write[i]);
kfree(gobj_write);
put_gobj_read:
- while (rentry-- > 0)
- drm_gem_object_put(gobj_read[rentry]);
+ for (i = 0; i < num_read_bo_handles; i++)
+ drm_gem_object_put(gobj_read[i]);
kfree(gobj_read);
free_timeline_points:
kfree(timeline_points);
@@@ -1027,10 -943,6 +943,6 @@@ free_timeline_handles
kfree(timeline_handles);
free_syncobj_handles:
kfree(syncobj_handles);
- free_bo_handles_write:
- kfree(bo_handles_write);
- free_bo_handles_read:
- kfree(bo_handles_read);
return r;
}
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^ permalink raw reply [flat|nested] 12+ messages in thread* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-02-17 13:47 Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2026-02-17 13:47 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Alex Hung, Linux Kernel Mailing List,
Linux Next Mailing List, Melissa Wen, Ray Wu
[-- Attachment #1: Type: text/plain, Size: 2968 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
between commit:
d25b32aa829a3 ("drm/amd/display: extend delta clamping logic to CM3 LUT helper")
from the origin tree and commits:
0274a54897f35 ("drm/amd/display: extend delta clamping logic to CM3 LUT helper")
92ff6a83cefeb ("drm/amd/display: Check return of shaper curve to HW format")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
index 518794fad9e1f,a0aaa727e9fa3..0000000000000
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
@@@ -52,6 -52,7 +52,7 @@@
#include "link_service.h"
#include "../dcn20/dcn20_hwseq.h"
#include "dc_state_priv.h"
+ #include "dio/dcn10/dcn10_dio.h"
#define DC_LOGGER_INIT(logger)
@@@ -485,7 -486,7 +486,7 @@@ bool dcn32_set_mcm_luts
struct dpp *dpp_base = pipe_ctx->plane_res.dpp;
int mpcc_id = pipe_ctx->plane_res.hubp->inst;
struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc;
- bool result = true;
+ bool rval, result;
const struct pwl_params *lut_params = NULL;
// 1D LUT
@@@ -508,10 -509,10 +509,10 @@@
lut_params = &plane_state->in_shaper_func.pwl;
else if (plane_state->in_shaper_func.type == TF_TYPE_DISTRIBUTED_POINTS) {
// TODO: dpp_base replace
- cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
+ rval = cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
&plane_state->in_shaper_func,
&dpp_base->shaper_params, true);
- lut_params = &dpp_base->shaper_params;
+ lut_params = rval ? &dpp_base->shaper_params : NULL;
}
mpc->funcs->program_shaper(mpc, lut_params, mpcc_id);
@@@ -957,13 -958,13 +958,13 @@@ void dcn32_init_hw(struct dc *dc
}
/* power AFMT HDMI memory TODO: may move to dis/en output save power*/
- REG_WRITE(DIO_MEM_PWR_CTRL, 0);
+ if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)
+ dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);
if (!dc->debug.disable_clock_gate) {
/* enable all DCN clock gating */
- REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0);
-
- REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0);
+ if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)
+ dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);
REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);
}
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^ permalink raw reply [flat|nested] 12+ messages in thread* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2024-06-17 18:37 Mark Brown
0 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2024-06-17 18:37 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Christian König, Linux Kernel Mailing List,
Linux Next Mailing List, Steven Rostedt
[-- Attachment #1: Type: text/plain, Size: 962 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
between commit:
2c92ca849fcc6 ("tracing/treewide: Remove second parameter of __assign_str()")
from the origin tree and commit:
030631e97b209 ("drm/amdgpu: revert "take runtime pm reference when we attach a buffer" v2")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
index 7aafeb763e5dd,2fd1bfb35916f..0000000000000
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2026-11-10 19:34 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-07-02 16:01 linux-next: manual merge of the amdgpu tree with the origin tree Mark Brown
-- strict thread matches above, loose matches on Subject: below --
2026-11-10 19:34 Mark Brown
2026-10-29 14:17 Mark Brown
2026-10-29 14:24 ` Alex Deucher
2026-10-29 16:45 ` Mark Brown
2026-10-28 13:28 Mark Brown
2026-10-28 13:44 ` Mark Brown
2026-09-07 22:51 Mark Brown
2026-07-29 13:28 Mark Brown
2026-03-03 13:09 Mark Brown
2026-02-17 13:47 Mark Brown
2024-06-17 18:37 Mark Brown
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