* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-10-29 14:17 Mark Brown
2026-10-29 14:24 ` Alex Deucher
0 siblings, 1 reply; 11+ messages in thread
From: Mark Brown @ 2026-10-29 14:17 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
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Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
between commits:
a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
44d0d3031e479 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
af52c8fd45fbd ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
9b0890e72d19b ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
from the origin tree and commits:
f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index dda435f19ca66,62f16d17e22bc..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@@ -2277,8 -2277,11 +2277,11 @@@ static ssize_t smu_v14_0_2_get_gpu_metr
metrics->Vcn1ActivityPercentage);
gpu_metrics->average_socket_power = metrics->AverageSocketPower;
- if (mp1_ver == IP_VERSION(14, 0, 3) && smu->smc_fw_version >= 0x00685000)
- gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
+ if ((mp1_ver == IP_VERSION(14, 0, 2) &&
+ smu->smc_fw_version >= 0x00664800) ||
+ (mp1_ver == IP_VERSION(14, 0, 3) &&
+ smu->smc_fw_version >= 0x00685000))
+ gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
if (metrics->AverageGfxActivity <= SMU_14_0_2_BUSY_THRESHOLD)
gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
@@@ -2600,14 -2603,9 +2603,10 @@@ static int smu_v14_0_2_od_restore_table
od_table->OverDriveTable.FanZeroRpmEnable =
boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
break;
- case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
- od_table->OverDriveTable.FanZeroRpmStopTemp =
- boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
- break;
case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
od_table->OverDriveTable.FanZeroRpmStopTemp =
boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
+ od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
break;
case PP_OD_EDIT_ACOUSTIC_LIMIT:
od_table->OverDriveTable.AcousticLimitRpmThreshold =
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: linux-next: manual merge of the amdgpu tree with the origin tree
2026-10-29 14:17 linux-next: manual merge of the amdgpu tree with the origin tree Mark Brown
@ 2026-10-29 14:24 ` Alex Deucher
2026-10-29 16:45 ` Mark Brown
0 siblings, 1 reply; 11+ messages in thread
From: Alex Deucher @ 2026-10-29 14:24 UTC (permalink / raw)
To: Mark Brown
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
On Thu, Oct 29, 2026 at 10:18 AM Mark Brown <broonie@kernel.org> wrote:
>
> Hi all,
>
> Today's linux-next merge of the amdgpu tree got a conflict in:
>
> drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
>
> between commits:
>
> a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 44d0d3031e479 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
> af52c8fd45fbd ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 9b0890e72d19b ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
>
> from the origin tree and commits:
>
> f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
> d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
> 8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
>
> from the amdgpu tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
>
> diff --combined drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> index dda435f19ca66,62f16d17e22bc..0000000000000
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
> @@@ -2277,8 -2277,11 +2277,11 @@@ static ssize_t smu_v14_0_2_get_gpu_metr
> metrics->Vcn1ActivityPercentage);
>
> gpu_metrics->average_socket_power = metrics->AverageSocketPower;
> - if (mp1_ver == IP_VERSION(14, 0, 3) && smu->smc_fw_version >= 0x00685000)
> - gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
> + if ((mp1_ver == IP_VERSION(14, 0, 2) &&
> + smu->smc_fw_version >= 0x00664800) ||
> + (mp1_ver == IP_VERSION(14, 0, 3) &&
> + smu->smc_fw_version >= 0x00685000))
> + gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
>
> if (metrics->AverageGfxActivity <= SMU_14_0_2_BUSY_THRESHOLD)
> gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
> @@@ -2600,14 -2603,9 +2603,10 @@@ static int smu_v14_0_2_od_restore_table
> od_table->OverDriveTable.FanZeroRpmEnable =
> boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
> break;
> - case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
> - od_table->OverDriveTable.FanZeroRpmStopTemp =
> - boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
> - break;
> case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
> od_table->OverDriveTable.FanZeroRpmStopTemp =
> boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
> + od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
I believe this should be dropped. The FeatureCtrlMask updates are
handled in smu_v14_0_2_od_edit_dpm_table() now.
Thanks,
Alex
> break;
> case PP_OD_EDIT_ACOUSTIC_LIMIT:
> od_table->OverDriveTable.AcousticLimitRpmThreshold =
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: linux-next: manual merge of the amdgpu tree with the origin tree
2026-10-29 14:24 ` Alex Deucher
@ 2026-10-29 16:45 ` Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2026-10-29 16:45 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
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On Thu, Oct 29, 2026 at 10:24:43AM -0400, Alex Deucher wrote:
> On Thu, Oct 29, 2026 at 10:18 AM Mark Brown <broonie@kernel.org> wrote:
> > case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
> > od_table->OverDriveTable.FanZeroRpmStopTemp =
> > boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
> > + od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
>
> I believe this should be dropped. The FeatureCtrlMask updates are
> handled in smu_v14_0_2_od_edit_dpm_table() now.
I guess it'll get dropped from your tree in that case? With all this
cherry picking noise I tend to assume that the amdgpu tree has the
indended state...
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^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: linux-next: manual merge of the amdgpu tree with the origin tree
2026-10-28 13:28 Mark Brown
@ 2026-10-28 13:44 ` Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2026-10-28 13:44 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
[-- Attachment #1: Type: text/plain, Size: 2048 bytes --]
On Wed, Oct 28, 2026 at 01:28:42PM +0000, Mark Brown wrote:
> Hi all,
>
> Today's linux-next merge of the amdgpu tree got a conflict in:
>
> drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
>
> between commit:
>
> a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
>
> from the origin tree and commits:
>
> f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
> 1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
> d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
> 8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
>
> from the amdgpu tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
Also needs this additional fixup to cope with the cherry picking:
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index cdd308ced4f9a..24a3d61d8ea66 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -2603,10 +2603,6 @@ static int smu_v14_0_2_od_restore_table_single(struct smu_context *smu, long inp
od_table->OverDriveTable.FanZeroRpmEnable =
boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
break;
- case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
- od_table->OverDriveTable.FanZeroRpmStopTemp =
- boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
- break;
case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
od_table->OverDriveTable.FanZeroRpmStopTemp =
boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
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^ permalink raw reply [flat|nested] 11+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-10-28 13:28 Mark Brown
2026-10-28 13:44 ` Mark Brown
0 siblings, 1 reply; 11+ messages in thread
From: Mark Brown @ 2026-10-28 13:28 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kenneth Feng, Kevin Wang,
Linux Kernel Mailing List, Linux Next Mailing List
[-- Attachment #1: Type: text/plain, Size: 18361 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
between commit:
a2eae9f4fa1b0 ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
from the origin tree and commits:
f990c94a2633d ("drm/amd/pm: add zero fan stop temperature support on smu 14.0.2")
1b63bb397db20 ("drm/amd/pm:restate all customized OD features on every table upload for smu 13.0.0/smu 14.0.2")
d2c1e98658b6c ("drm/amd/pm: report smu energy accumulator updates")
8d4ce79aff1cd ("drm/amd/pm: preserve committed OD features for SMU 14.0.2")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
index 6621e50de9651,62f16d17e22bc..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@@ -91,6 -91,10 +91,10 @@@ static const struct smu_feature_bits sm
#define PP_OD_FEATURE_FAN_ZERO_RPM_ENABLE 11
#define PP_OD_FEATURE_FAN_ZERO_RPM_STOP_TEMP 12
+ #define SMU_14_0_2_OD_FAN_FEATURE_MASK \
+ (BIT(PP_OD_FEATURE_FAN_CURVE_BIT) | \
+ BIT(PP_OD_FEATURE_FAN_LEGACY_BIT))
+
static struct cmn2asic_msg_mapping smu_v14_0_2_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(TestMessage, PPSMC_MSG_TestMessage, 1),
MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion, 1),
@@@ -963,6 -967,84 +967,84 @@@ out
return feature_enabled;
}
+ static u32
+ smu_v14_0_2_filter_od_feature_mask(struct smu_context *smu, u32 feature_mask)
+ {
+ PPTable_t *pptable = smu->smu_table.driver_pptable;
+ u32 supported_mask =
+ pptable->SkuTable.OverDriveLimitsBasicMax.FeatureCtrlMask;
+
+ return feature_mask & supported_mask;
+ }
+
+ static u32
+ smu_v14_0_2_get_od_feature_mask(struct smu_context *smu, u32 pending_mask)
+ {
+ u32 supported_mask = smu_v14_0_2_filter_od_feature_mask(smu, ~0U);
+ u32 fan_mask = supported_mask & SMU_14_0_2_OD_FAN_FEATURE_MASK;
+ u32 mask = smu->smu_table.user_od_feature_mask;
+
+ if (pending_mask & fan_mask)
+ mask &= ~fan_mask;
+ mask |= pending_mask;
+
+ return smu_v14_0_2_filter_od_feature_mask(smu, mask);
+ }
+
+ static bool smu_v14_0_2_fan_is_default(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot)
+ {
+ return !memcmp(od->FanLinearPwmPoints, boot->FanLinearPwmPoints,
+ sizeof(od->FanLinearPwmPoints)) &&
+ !memcmp(od->FanLinearTempPoints, boot->FanLinearTempPoints,
+ sizeof(od->FanLinearTempPoints)) &&
+ od->AcousticTargetRpmThreshold == boot->AcousticTargetRpmThreshold &&
+ od->AcousticLimitRpmThreshold == boot->AcousticLimitRpmThreshold &&
+ od->FanTargetTemperature == boot->FanTargetTemperature &&
+ od->FanMode == boot->FanMode;
+ }
+
+ static bool smu_v14_0_2_legacy_fan_is_default(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot)
+ {
+ return od->FanMinimumPwm == boot->FanMinimumPwm &&
+ od->FanMode == boot->FanMode;
+ }
+
+ static bool smu_v14_0_2_zero_fan_is_default(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot)
+ {
+ return od->FanZeroRpmEnable == boot->FanZeroRpmEnable &&
+ od->FanZeroRpmStopTemp == boot->FanZeroRpmStopTemp;
+ }
+
+ static u32 smu_v14_0_2_normalize_feature_mask(const OverDriveTable_t *od,
+ const OverDriveTable_t *boot,
+ u32 feature_mask)
+ {
+ if (od->GfxclkFoffset == boot->GfxclkFoffset)
+ feature_mask &= ~BIT(PP_OD_FEATURE_GFXCLK_BIT);
+ if (od->UclkFmin == boot->UclkFmin &&
+ od->UclkFmax == boot->UclkFmax)
+ feature_mask &= ~BIT(PP_OD_FEATURE_UCLK_BIT);
+ if (!memcmp(od->VoltageOffsetPerZoneBoundary,
+ boot->VoltageOffsetPerZoneBoundary,
+ sizeof(od->VoltageOffsetPerZoneBoundary)))
+ feature_mask &= ~BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT);
+ if ((feature_mask & BIT(PP_OD_FEATURE_FAN_CURVE_BIT)) &&
+ smu_v14_0_2_fan_is_default(od, boot))
+ feature_mask &= ~BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ if ((feature_mask & BIT(PP_OD_FEATURE_FAN_LEGACY_BIT)) &&
+ smu_v14_0_2_legacy_fan_is_default(od, boot))
+ feature_mask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
+ if (smu_v14_0_2_zero_fan_is_default(od, boot))
+ feature_mask &= ~BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
+ if (!od->Ppt)
+ feature_mask &= ~BIT(PP_OD_FEATURE_PPT_BIT);
+
+ return feature_mask;
+ }
+
static void smu_v14_0_2_get_od_setting_limits(struct smu_context *smu,
int od_feature_bit,
int32_t *min,
@@@ -2195,8 -2277,11 +2277,11 @@@ static ssize_t smu_v14_0_2_get_gpu_metr
metrics->Vcn1ActivityPercentage);
gpu_metrics->average_socket_power = metrics->AverageSocketPower;
- if (mp1_ver == IP_VERSION(14, 0, 3) && smu->smc_fw_version >= 0x00685000)
- gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
+ if ((mp1_ver == IP_VERSION(14, 0, 2) &&
+ smu->smc_fw_version >= 0x00664800) ||
+ (mp1_ver == IP_VERSION(14, 0, 3) &&
+ smu->smc_fw_version >= 0x00685000))
+ gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
if (metrics->AverageGfxActivity <= SMU_14_0_2_BUSY_THRESHOLD)
gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
@@@ -2317,6 -2402,38 +2402,38 @@@ static int smu_v14_0_2_upload_overdrive
return ret;
}
+ static int
+ smu_v14_0_2_upload_ppt_overdrive_table(struct smu_context *smu, s16 ppt)
+ {
+ struct smu_table_context *table_context = &smu->smu_table;
+ OverDriveTableExternal_t *od_table = table_context->overdrive_table;
+ OverDriveTableExternal_t *user_od_table = table_context->user_overdrive_table;
+ OverDriveTableExternal_t upload_table;
+ u32 next_mask = table_context->user_od_feature_mask;
+ int ret;
+
+ /* Do not commit OD settings staged after the last c operation. */
+ memcpy(&upload_table, user_od_table, sizeof(upload_table));
+ upload_table.OverDriveTable.Ppt = ppt;
+ if (ppt)
+ next_mask |= BIT(PP_OD_FEATURE_PPT_BIT);
+ else
+ next_mask &= ~BIT(PP_OD_FEATURE_PPT_BIT);
+ upload_table.OverDriveTable.FeatureCtrlMask =
+ smu_v14_0_2_filter_od_feature_mask(smu, next_mask);
+
+ ret = smu_v14_0_2_upload_overdrive_table(smu, &upload_table);
+ if (ret)
+ return ret;
+
+ table_context->user_od_feature_mask =
+ upload_table.OverDriveTable.FeatureCtrlMask;
+ od_table->OverDriveTable.Ppt = ppt;
+ user_od_table->OverDriveTable.Ppt = ppt;
+
+ return 0;
+ }
+
static void smu_v14_0_2_set_supported_od_feature_mask(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
@@@ -2375,6 -2492,7 +2492,7 @@@ static int smu_v14_0_2_set_default_od_s
memcpy(od_table,
boot_od_table,
sizeof(OverDriveTableExternal_t));
+ od_table->OverDriveTable.FeatureCtrlMask = 0;
/*
* For S3/S4/Runpm resume, we need to setup those overdrive tables again,
@@@ -2384,7 -2502,9 +2502,9 @@@
memcpy(user_od_table,
boot_od_table,
sizeof(OverDriveTableExternal_t));
+ user_od_table->OverDriveTable.FeatureCtrlMask = 0;
smu->user_dpm_profile.user_od = false;
+ smu->smu_table.user_od_feature_mask = 0;
} else if (smu->user_dpm_profile.user_od) {
memcpy(&user_od_table_bak,
user_od_table,
@@@ -2419,6 -2539,14 +2539,14 @@@
user_od_table_bak.OverDriveTable.FanZeroRpmEnable;
user_od_table->OverDriveTable.FanZeroRpmStopTemp =
user_od_table_bak.OverDriveTable.FanZeroRpmStopTemp;
+ user_od_table->OverDriveTable.FanMode =
+ user_od_table_bak.OverDriveTable.FanMode;
+ user_od_table->OverDriveTable.FeatureCtrlMask = 0;
+ }
+ if (smu->adev->in_suspend) {
+ user_od_table->OverDriveTable.Ppt = 0;
+ smu->smu_table.user_od_feature_mask &=
+ ~BIT(PP_OD_FEATURE_PPT_BIT);
}
smu_v14_0_2_set_supported_od_feature_mask(smu);
@@@ -2431,17 -2559,22 +2559,22 @@@ static int smu_v14_0_2_restore_user_od_
struct smu_table_context *table_context = &smu->smu_table;
OverDriveTableExternal_t *od_table = table_context->overdrive_table;
OverDriveTableExternal_t *user_od_table = table_context->user_overdrive_table;
+ OverDriveTableExternal_t upload_table;
+ u32 next_mask;
int res;
- user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) |
- BIT(PP_OD_FEATURE_UCLK_BIT) |
- BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT) |
- BIT(PP_OD_FEATURE_FAN_CURVE_BIT) |
- BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
- res = smu_v14_0_2_upload_overdrive_table(smu, user_od_table);
- user_od_table->OverDriveTable.FeatureCtrlMask = 0;
- if (res == 0)
+ next_mask = smu_v14_0_2_filter_od_feature_mask(smu,
+ table_context->user_od_feature_mask);
+ memcpy(&upload_table, user_od_table, sizeof(upload_table));
+ upload_table.OverDriveTable.FeatureCtrlMask = next_mask;
+ res = smu_v14_0_2_upload_overdrive_table(smu, &upload_table);
+ if (res == 0) {
+ table_context->user_od_feature_mask = next_mask;
+ smu->user_dpm_profile.user_od =
+ !!(next_mask & ~BIT(PP_OD_FEATURE_PPT_BIT));
memcpy(od_table, user_od_table, sizeof(OverDriveTableExternal_t));
+ od_table->OverDriveTable.FeatureCtrlMask = 0;
+ }
return res;
}
@@@ -2465,43 -2598,30 +2598,35 @@@ static int smu_v14_0_2_od_restore_table
boot_overdrive_table->OverDriveTable.FanLinearPwmPoints[i];
}
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
- od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_FAN_ZERO_RPM_ENABLE:
od_table->OverDriveTable.FanZeroRpmEnable =
boot_overdrive_table->OverDriveTable.FanZeroRpmEnable;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
+ break;
+ case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
+ od_table->OverDriveTable.FanZeroRpmStopTemp =
+ boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
break;
+ case PP_OD_EDIT_FAN_ZERO_RPM_STOP_TEMP:
+ od_table->OverDriveTable.FanZeroRpmStopTemp =
+ boot_overdrive_table->OverDriveTable.FanZeroRpmStopTemp;
+ od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
+ break;
case PP_OD_EDIT_ACOUSTIC_LIMIT:
od_table->OverDriveTable.AcousticLimitRpmThreshold =
boot_overdrive_table->OverDriveTable.AcousticLimitRpmThreshold;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
case PP_OD_EDIT_ACOUSTIC_TARGET:
od_table->OverDriveTable.AcousticTargetRpmThreshold =
boot_overdrive_table->OverDriveTable.AcousticTargetRpmThreshold;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
case PP_OD_EDIT_FAN_TARGET_TEMPERATURE:
od_table->OverDriveTable.FanTargetTemperature =
boot_overdrive_table->OverDriveTable.FanTargetTemperature;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
case PP_OD_EDIT_FAN_MINIMUM_PWM:
od_table->OverDriveTable.FanMinimumPwm =
boot_overdrive_table->OverDriveTable.FanMinimumPwm;
- od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
- od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
- od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
break;
default:
dev_info(adev->dev, "Invalid table index: %ld\n", input);
@@@ -2519,10 -2639,17 +2644,17 @@@ static int smu_v14_0_2_od_edit_dpm_tabl
struct smu_table_context *table_context = &smu->smu_table;
OverDriveTableExternal_t *od_table =
(OverDriveTableExternal_t *)table_context->overdrive_table;
+ OverDriveTableExternal_t *user_od_table =
+ (OverDriveTableExternal_t *)table_context->user_overdrive_table;
+ OverDriveTableExternal_t *boot_od_table =
+ (OverDriveTableExternal_t *)table_context->boot_overdrive_table;
+ OverDriveTableExternal_t upload_table;
+ OverDriveTable_t *od = &od_table->OverDriveTable;
+ OverDriveTable_t *boot = &boot_od_table->OverDriveTable;
struct amdgpu_device *adev = smu->adev;
uint32_t offset_of_voltageoffset;
int32_t minimum, maximum;
- uint32_t feature_ctrlmask;
+ u32 next_mask;
int i, ret = 0;
switch (type) {
@@@ -2694,6 -2821,7 +2826,7 @@@
od_table->OverDriveTable.AcousticLimitRpmThreshold = input[0];
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_ACOUSTIC_TARGET:
@@@ -2716,6 -2844,7 +2849,7 @@@
od_table->OverDriveTable.AcousticTargetRpmThreshold = input[0];
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_FAN_TARGET_TEMPERATURE:
@@@ -2738,6 -2867,7 +2872,7 @@@
od_table->OverDriveTable.FanTargetTemperature = input[0];
od_table->OverDriveTable.FanMode = FAN_MODE_AUTO;
od_table->OverDriveTable.FeatureCtrlMask |= BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+ od_table->OverDriveTable.FeatureCtrlMask &= ~BIT(PP_OD_FEATURE_FAN_LEGACY_BIT);
break;
case PP_OD_EDIT_FAN_MINIMUM_PWM:
@@@ -2811,44 -2941,42 +2946,42 @@@
if (ret)
return ret;
} else {
- feature_ctrlmask = od_table->OverDriveTable.FeatureCtrlMask;
memcpy(od_table,
table_context->boot_overdrive_table,
sizeof(OverDriveTableExternal_t));
- od_table->OverDriveTable.FeatureCtrlMask = feature_ctrlmask;
+ od_table->OverDriveTable.FeatureCtrlMask = 0;
}
fallthrough;
case PP_OD_COMMIT_DPM_TABLE:
- /*
- * The member below instructs PMFW the settings focused in
- * this single operation.
- * `uint32_t FeatureCtrlMask;`
- * It does not contain actual informations about user's custom
- * settings. Thus we do not cache it.
- */
offset_of_voltageoffset = offsetof(OverDriveTable_t, VoltageOffsetPerZoneBoundary);
- if (memcmp((u8 *)od_table + offset_of_voltageoffset,
- table_context->user_overdrive_table + offset_of_voltageoffset,
- sizeof(OverDriveTableExternal_t) - offset_of_voltageoffset)) {
- smu_v14_0_2_dump_od_table(smu, od_table);
+ next_mask = smu_v14_0_2_get_od_feature_mask(smu,
+ od->FeatureCtrlMask);
+ next_mask = smu_v14_0_2_normalize_feature_mask(od, boot,
+ next_mask);
- ret = smu_v14_0_2_upload_overdrive_table(smu, od_table);
+ if (memcmp((u8 *)od_table + offset_of_voltageoffset,
+ (u8 *)user_od_table + offset_of_voltageoffset,
+ sizeof(OverDriveTableExternal_t) - offset_of_voltageoffset) ||
+ next_mask != table_context->user_od_feature_mask) {
+ memcpy(&upload_table, od_table, sizeof(upload_table));
+ upload_table.OverDriveTable.FeatureCtrlMask = next_mask;
+ smu_v14_0_2_dump_od_table(smu, &upload_table);
+
+ ret = smu_v14_0_2_upload_overdrive_table(smu, &upload_table);
if (ret) {
dev_err(adev->dev, "Failed to upload overdrive table!\n");
return ret;
}
+ table_context->user_od_feature_mask = next_mask;
od_table->OverDriveTable.FeatureCtrlMask = 0;
- memcpy(table_context->user_overdrive_table + offset_of_voltageoffset,
+ memcpy((u8 *)user_od_table + offset_of_voltageoffset,
(u8 *)od_table + offset_of_voltageoffset,
sizeof(OverDriveTableExternal_t) - offset_of_voltageoffset);
+ user_od_table->OverDriveTable.FeatureCtrlMask = 0;
- if (!memcmp(table_context->user_overdrive_table,
- table_context->boot_overdrive_table,
- sizeof(OverDriveTableExternal_t)))
- smu->user_dpm_profile.user_od = false;
- else
- smu->user_dpm_profile.user_od = true;
+ smu->user_dpm_profile.user_od =
+ !!(next_mask & ~BIT(PP_OD_FEATURE_PPT_BIT));
}
break;
@@@ -2866,10 -2994,8 +2999,8 @@@ static int smu_v14_0_2_set_ppt_limit(st
PPTable_t *pptable = smu->smu_table.driver_pptable;
uint32_t msg_limit = pptable->SkuTable.MsgLimits.Power
[PPT_THROTTLER_PPT0][POWER_SOURCE_AC];
- struct smu_table_context *table_context = &smu->smu_table;
- OverDriveTableExternal_t *od_table =
- (OverDriveTableExternal_t *)table_context->overdrive_table;
OverDriveTableExternal_t current_od_table;
+ s16 ppt;
int ret = 0;
if (limit_type != SMU_PPT_LIMIT_PPT0)
@@@ -2881,10 -3007,7 +3012,7 @@@
return ret;
if (current_od_table.OverDriveTable.Ppt) {
- od_table->OverDriveTable.Ppt = 0;
- od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
-
- ret = smu_v14_0_2_upload_overdrive_table(smu, od_table);
+ ret = smu_v14_0_2_upload_ppt_overdrive_table(smu, 0);
if (ret) {
dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
return ret;
@@@ -2896,10 -3019,8 +3024,8 @@@
if (ret)
return ret;
- od_table->OverDriveTable.Ppt = (limit * 100) / msg_limit - 100;
- od_table->OverDriveTable.FeatureCtrlMask |= 1U << PP_OD_FEATURE_PPT_BIT;
-
- ret = smu_v14_0_2_upload_overdrive_table(smu, od_table);
+ ppt = (limit * 100) / msg_limit - 100;
+ ret = smu_v14_0_2_upload_ppt_overdrive_table(smu, ppt);
if (ret) {
dev_err(smu->adev->dev, "Failed to upload overdrive table!\n");
return ret;
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-09-07 22:51 Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2026-09-07 22:51 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Kees Cook, Kees Cook, Linux Kernel Mailing List,
Linux Next Mailing List, YiPeng Chai
[-- Attachment #1: Type: text/plain, Size: 10300 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/ras/core/cmd.c
between commit:
3a2c4d55e32ad ("treewide: refresh kmalloc_obj() conversions")
from the origin tree and commits:
cb6996164ccb4 ("drm/amd/ras: fix ras cmd returning incorrect cper count")
49452ca7a7f5a ("drm/amd/ras: Add dedicated interface to obtain cper info")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/ras/core/cmd.c
index 446b935c1fc91,9f874800f38df..0000000000000
--- a/drivers/gpu/drm/amd/ras/core/cmd.c
+++ b/drivers/gpu/drm/amd/ras/core/cmd.c
@@@ -43,7 -43,8 +43,8 @@@ static int ras_get_block_ecc_info(struc
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
memset(&err_data, 0, sizeof(err_data));
- ret = ras_aca_get_block_ecc_count(ras_core, input_data->block_id, &err_data);
+ ret = ras_core_query_block_ecc_data(ras_core,
+ input_data->block_id, &err_data, false);
if (ret)
return RAS_CMD__ERROR_GENERIC;
@@@ -143,13 -144,8 +144,8 @@@ static int ras_cmd_clear_bad_page_info(
if (cmd->input_size != sizeof(struct ras_cmd_dev_handle))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
- if (ras_fw_eeprom_supported(ras_core)) {
- if (ras_fw_eeprom_reset_table(ras_core))
- return RAS_CMD__ERROR_GENERIC;
- } else {
- if (ras_eeprom_reset_table(ras_core))
- return RAS_CMD__ERROR_GENERIC;
- }
+ if (ras_eeprom_mgr_reset_table(ras_core))
+ return RAS_CMD__ERROR_GENERIC;
if (ras_umc_clean_badpage_data(ras_core))
return RAS_CMD__ERROR_GENERIC;
@@@ -178,16 -174,18 +174,18 @@@ static int ras_cmd_get_cper_snapshot(st
struct ras_cmd_cper_snapshot_rsp *output_data =
(struct ras_cmd_cper_snapshot_rsp *)cmd->output_buff_raw;
struct ras_log_batch_overview overview;
+ u64 latest_cper_id;
if ((cmd->input_size != sizeof(struct ras_cmd_cper_snapshot_req)) ||
(cmd->output_buf_size < sizeof(*output_data)))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
ras_log_ring_get_batch_overview(ras_core, &overview);
+ latest_cper_id = overview.logged_batch_count ? overview.last_batch_id - 1 : 0;
output_data->total_cper_num = overview.logged_batch_count;
output_data->start_cper_id = overview.first_batch_id;
- output_data->latest_cper_id = overview.last_batch_id;
+ output_data->latest_cper_id = latest_cper_id;
output_data->version = 0;
@@@ -202,13 -200,13 +200,13 @@@ static int ras_cmd_get_cper_records(str
(struct ras_cmd_cper_record_req *)cmd->input_buff_raw;
struct ras_cmd_cper_record_rsp *rsp =
(struct ras_cmd_cper_record_rsp *)cmd->output_buff_raw;
- struct ras_log_info *trace = NULL;
- uint32_t trace_count = MAX_RECORD_PER_BATCH;
+ struct ras_log_info *batch_logs = NULL;
+ uint32_t nr_batch_logs = MAX_RECORD_PER_BATCH;
struct ras_log_batch_overview overview;
uint32_t offset = 0, real_data_len = 0;
- uint64_t batch_id;
- uint8_t *buffer = NULL;
- int ret = 0, i, count;
+ u64 batch_id, start_batch_id;
+ uint8_t *buf_ptr = (uint8_t *)(uintptr_t)req->buf_ptr;
+ int ret = 0, i, count, read_batch_count = 0;
if ((cmd->input_size != sizeof(struct ras_cmd_cper_record_req)) ||
(cmd->output_buf_size < sizeof(*rsp)))
@@@ -218,42 -216,50 +216,50 @@@
req->buf_size > RAS_CMD_MAX_CPER_BUF_SZ)
return RAS_CMD__ERROR_INVALID_INPUT_DATA;
- buffer = kzalloc(req->buf_size, GFP_KERNEL);
- if (!buffer)
- return RAS_CMD__ERROR_GENERIC;
-
- trace = kzalloc_objs(*trace, trace_count);
- if (!trace) {
+ batch_logs = kcalloc(nr_batch_logs, sizeof(*batch_logs), GFP_KERNEL);
+ if (!batch_logs) {
ret = RAS_CMD__ERROR_GENERIC;
goto out;
}
ras_log_ring_get_batch_overview(ras_core, &overview);
+
+ start_batch_id = req->cper_start_id;
+
for (i = 0; i < req->cper_num; i++) {
- batch_id = req->cper_start_id + i;
+ batch_id = start_batch_id + i;
if (batch_id >= overview.last_batch_id)
break;
- count = ras_log_ring_get_batch_records(ras_core, batch_id, trace,
- trace_count);
+ count = ras_log_ring_get_batch_records(ras_core, batch_id, batch_logs,
+ nr_batch_logs);
if (count > 0) {
- ret = ras_cper_generate_cper(ras_core, trace, count,
- &buffer[offset], req->buf_size - offset, &real_data_len);
+ if (offset >= req->buf_size) {
+ ret = -ENOMEM;
+ break;
+ }
+
+ ret = ras_cper_generate_batch_cper(ras_core, batch_logs, count,
+ &buf_ptr[offset], req->buf_size - offset, &real_data_len);
if (ret)
break;
offset += real_data_len;
}
+
+ /* The caller resumes at cper_start_id + real_cper_num, so an id
+ * that held nothing still has to be counted here.
+ */
+ read_batch_count++;
}
- if ((ret && (ret != -ENOMEM)) ||
- copy_to_user(u64_to_user_ptr(req->buf_ptr), buffer, offset)) {
+ if ((ret && (ret != -ENOMEM))) {
ret = RAS_CMD__ERROR_GENERIC;
goto out;
}
rsp->real_data_size = offset;
- rsp->real_cper_num = i;
+ rsp->real_cper_num = read_batch_count;
rsp->remain_num = (ret == -ENOMEM) ? (req->cper_num - i) : 0;
rsp->version = 0;
@@@ -261,8 -267,7 +267,7 @@@
ret = RAS_CMD__SUCCESS;
out:
- kfree(trace);
- kfree(buffer);
+ kfree(batch_logs);
return ret;
}
@@@ -316,7 -321,7 +321,7 @@@ static int ras_cmd_get_batch_trace_reco
(input_data->start_batch_id >= overview.last_batch_id))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
- trace_arry = kcalloc(trace_count, sizeof(*trace_arry), GFP_KERNEL);
+ trace_arry = kzalloc_objs(*trace_arry, trace_count);
if (!trace_arry)
return RAS_CMD__ERROR_GENERIC;
@@@ -337,8 -342,8 +342,8 @@@
record->seqno = trace_arry[j].seqno;
record->timestamp = trace_arry[j].timestamp;
record->event = trace_arry[j].event;
- memcpy(&record->aca_reg,
- &trace_arry[j].aca_reg, sizeof(trace_arry[j].aca_reg));
+ memcpy(&record->body, &trace_arry[j].body,
+ sizeof(record->body));
}
} else {
count = 0;
@@@ -362,48 -367,6 +367,6 @@@
return RAS_CMD__SUCCESS;
}
- static enum ras_ta_block __get_ras_ta_block(enum ras_block_id block)
- {
- switch (block) {
- case RAS_BLOCK_ID__UMC:
- return RAS_TA_BLOCK__UMC;
- case RAS_BLOCK_ID__SDMA:
- return RAS_TA_BLOCK__SDMA;
- case RAS_BLOCK_ID__GFX:
- return RAS_TA_BLOCK__GFX;
- case RAS_BLOCK_ID__MMHUB:
- return RAS_TA_BLOCK__MMHUB;
- case RAS_BLOCK_ID__ATHUB:
- return RAS_TA_BLOCK__ATHUB;
- case RAS_BLOCK_ID__PCIE_BIF:
- return RAS_TA_BLOCK__PCIE_BIF;
- case RAS_BLOCK_ID__HDP:
- return RAS_TA_BLOCK__HDP;
- case RAS_BLOCK_ID__XGMI_WAFL:
- return RAS_TA_BLOCK__XGMI_WAFL;
- case RAS_BLOCK_ID__DF:
- return RAS_TA_BLOCK__DF;
- case RAS_BLOCK_ID__SMN:
- return RAS_TA_BLOCK__SMN;
- case RAS_BLOCK_ID__SEM:
- return RAS_TA_BLOCK__SEM;
- case RAS_BLOCK_ID__MP0:
- return RAS_TA_BLOCK__MP0;
- case RAS_BLOCK_ID__MP1:
- return RAS_TA_BLOCK__MP1;
- case RAS_BLOCK_ID__FUSE:
- return RAS_TA_BLOCK__FUSE;
- case RAS_BLOCK_ID__MCA:
- return RAS_TA_BLOCK__MCA;
- case RAS_BLOCK_ID__VCN:
- return RAS_TA_BLOCK__VCN;
- case RAS_BLOCK_ID__JPEG:
- return RAS_TA_BLOCK__JPEG;
- default:
- return RAS_TA_BLOCK__UMC;
- }
- }
-
static enum ras_ta_error_type __get_ras_ta_err_type(enum ras_ecc_err_type error)
{
switch (error) {
@@@ -431,7 -394,6 +394,6 @@@ static int ras_cmd_inject_error(struct
(struct ras_cmd_inject_error_rsp *)cmd->output_buff_raw;
int ret = 0;
struct ras_ta_trigger_error_input block_info = {
- .block_id = __get_ras_ta_block(req->block_id),
.sub_block_index = req->subblock_id,
.inject_error_type = __get_ras_ta_err_type(req->error_type),
.address = req->address,
@@@ -442,6 -404,12 +404,12 @@@
(cmd->output_buf_size < sizeof(*output_data)))
return RAS_CMD__ERROR_INVALID_INPUT_SIZE;
+ ret = ras_psp_get_block_ta_id(ras_core, req->block_id, &block_info.block_id);
+ if (ret == -RAS_CORE_NOT_SUPPORTED)
+ return RAS_CMD__ERROR_UNSUPPORT;
+ else if (ret)
+ return ret;
+
ret = ras_psp_trigger_error(ras_core, &block_info, req->instance_mask);
if (!ret) {
output_data->version = 0;
@@@ -455,6 -423,34 +423,34 @@@
return ret;
}
+ static int ras_cmd_get_ras_cap(struct ras_core_context *ras_core,
+ struct ras_cmd_ctx *cmd, void *data)
+ {
+ struct ras_cmd_get_ras_cap_rsp *output_data =
+ (struct ras_cmd_get_ras_cap_rsp *)cmd->output_buff_raw;
+
+ output_data->version = 0;
+ output_data->poison = ras_core_poison_supported(ras_core);
+ output_data->flex_mca = ras_psp_flex_mca_enabled(ras_core);
+ output_data->ras_block_mask = ras_core_get_ras_caps(ras_core);
+
+ output_data->ecc_type = 0;
+ if (output_data->poison)
+ output_data->ecc_type |= BIT_ULL(RAS_ECC_TYPE_POISON);
+
+ if (output_data->ras_block_mask & BIT_ULL(RAS_BLOCK_ID__UMC))
+ output_data->ecc_type |= BIT_ULL(RAS_ECC_TYPE_MEM);
+
+ if (output_data->ras_block_mask &
+ (BIT_ULL(RAS_BLOCK_ID__GFX) | BIT_ULL(RAS_BLOCK_ID__SDMA)))
+ output_data->ecc_type |= BIT_ULL(RAS_ECC_TYPE_SRAM);
+
+
+ cmd->output_size = sizeof(struct ras_cmd_get_ras_cap_rsp);
+
+ return 0;
+ }
+
static struct ras_cmd_func_map ras_cmd_maps[] = {
{RAS_CMD__INJECT_ERROR, ras_cmd_inject_error},
{RAS_CMD__GET_BLOCK_ECC_STATUS, ras_get_block_ecc_info},
@@@ -465,6 -461,7 +461,7 @@@
{RAS_CMD__GET_CPER_RECORD, ras_cmd_get_cper_records},
{RAS_CMD__GET_BATCH_TRACE_SNAPSHOT, ras_cmd_get_batch_trace_snapshot},
{RAS_CMD__GET_BATCH_TRACE_RECORD, ras_cmd_get_batch_trace_records},
+ {RAS_CMD__GET_RAS_CAP, ras_cmd_get_ras_cap},
};
int rascore_handle_cmd(struct ras_core_context *ras_core,
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-07-29 13:28 Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2026-07-29 13:28 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Leo Li, Linux Kernel Mailing List,
Linux Next Mailing List, Mario Limonciello
[-- Attachment #1: Type: text/plain, Size: 1727 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
between commit:
82730dba0cf9d ("drm/amd/display: Fix flip-done timeouts on mode1 reset")
from the origin tree and commit:
7e1b4bdb0e05a ("drm/amd/display: Fix flip-done timeouts on mode1 reset")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index ff308ee40909e,079d4ccc88da6..0000000000000
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@@ -34,7 -34,7 +34,7 @@@
#include "amdgpu_dm_plane.h"
#include "amdgpu_dm_trace.h"
#include "amdgpu_dm_debugfs.h"
- #include "amdgpu_dm_kunit_helpers.h"
+ #include "dm_helpers.h"
#include "modules/inc/mod_power.h"
#define HPD_DETECTION_PERIOD_uS 2000000
@@@ -287,8 -287,6 +287,6 @@@ static inline int amdgpu_dm_crtc_set_vb
* is enabled. On DCE, vupdate is only needed in VRR mode.
*/
if (amdgpu_ip_version(adev, DCE_HWIP, 0) != 0) {
- rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, enable);
- } else if (dc_supports_vrr(dm->dc->ctx->dce_version)) {
if (enable) {
rc = amdgpu_irq_get(adev, &adev->vupdate_irq, irq_type);
drm_dbg_vbl(crtc->dev, "Get vupdate_irq ret=%d\n", rc);
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 11+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-07-02 16:01 Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2026-07-02 16:01 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Andrew Martin, Linux Kernel Mailing List,
Linux Next Mailing List, William Palacek
[-- Attachment #1: Type: text/plain, Size: 1026 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
between commit:
1142738572ef3 ("drm/amdkfd: Fix SMI event PID reporting for containers")
from the origin tree and commits:
60271ec06e04b ("drm/amdkfd: Fix SMI event PID reporting for containers")
9ba9a1486312d ("drm/amdkfd: use scnprintf/vscnprintf in kfd_smi_event_add")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --cc drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
index e659cd50eb0bd,6a7b4d959541b..0000000000000
--- a/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c
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^ permalink raw reply [flat|nested] 11+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-03-03 13:09 Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2026-03-03 13:09 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Linux Kernel Mailing List, Linux Next Mailing List,
Srinivasan Shanmugam, Sunil Khatri, Tvrtko Ursulin
[-- Attachment #1: Type: text/plain, Size: 12073 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
between commits:
ea78f8c68f4f6 ("drm/amdgpu: add upper bound check on user inputs in signal ioctl")
64ac7c09fc449 ("drm/amdgpu: add upper bound check on user inputs in wait ioctl")
from the origin tree and commits:
be267e15f99bc ("drm/amdgpu: add upper bound check on user inputs in signal ioctl")
fcec012c66424 ("drm/amdgpu: add upper bound check on user inputs in wait ioctl")
750cbc4fbd490 ("drm/amdgpu: Drop redundant syncobj handle limit checks in userq ioctls")
2de9353e193fd ("drm/amdgpu/userq: Use drm_gem_objects_lookup in amdgpu_userq_wait_ioctl")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
index 7e9cf1868cc9f,d31cadf47b3b5..0000000000000
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c
@@@ -461,33 -461,31 +461,31 @@@ int amdgpu_userq_signal_ioctl(struct dr
struct drm_file *filp)
{
struct amdgpu_device *adev = drm_to_adev(dev);
+ struct drm_amdgpu_userq_signal *args = data;
+ const unsigned int num_write_bo_handles = args->num_bo_write_handles;
+ const unsigned int num_read_bo_handles = args->num_bo_read_handles;
struct amdgpu_fpriv *fpriv = filp->driver_priv;
struct amdgpu_userq_mgr *userq_mgr = &fpriv->userq_mgr;
- struct drm_amdgpu_userq_signal *args = data;
- struct drm_gem_object **gobj_write = NULL;
- struct drm_gem_object **gobj_read = NULL;
- struct amdgpu_usermode_queue *queue;
- struct amdgpu_userq_fence *userq_fence;
- struct drm_syncobj **syncobj = NULL;
- u32 *bo_handles_write, num_write_bo_handles;
+ struct drm_gem_object **gobj_write, **gobj_read;
u32 *syncobj_handles, num_syncobj_handles;
- u32 *bo_handles_read, num_read_bo_handles;
- int r, i, entry, rentry, wentry;
+ struct amdgpu_userq_fence *userq_fence;
+ struct amdgpu_usermode_queue *queue;
+ struct drm_syncobj **syncobj = NULL;
struct dma_fence *fence;
struct drm_exec exec;
+ int r, i, entry;
u64 wptr;
if (!amdgpu_userq_enabled(dev))
return -ENOTSUPP;
- if (args->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
- args->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
+ if (args->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
args->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
return -EINVAL;
num_syncobj_handles = args->num_syncobj_handles;
- syncobj_handles = memdup_user(u64_to_user_ptr(args->syncobj_handles),
- size_mul(sizeof(u32), num_syncobj_handles));
+ syncobj_handles = memdup_array_user(u64_to_user_ptr(args->syncobj_handles),
+ num_syncobj_handles, sizeof(u32));
if (IS_ERR(syncobj_handles))
return PTR_ERR(syncobj_handles);
@@@ -506,51 -504,19 +504,19 @@@
}
}
- num_read_bo_handles = args->num_bo_read_handles;
- bo_handles_read = memdup_user(u64_to_user_ptr(args->bo_read_handles),
- sizeof(u32) * num_read_bo_handles);
- if (IS_ERR(bo_handles_read)) {
- r = PTR_ERR(bo_handles_read);
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(args->bo_read_handles),
+ num_read_bo_handles,
+ &gobj_read);
+ if (r)
goto free_syncobj;
- }
- /* Array of pointers to the GEM read objects */
- gobj_read = kmalloc_array(num_read_bo_handles, sizeof(*gobj_read), GFP_KERNEL);
- if (!gobj_read) {
- r = -ENOMEM;
- goto free_bo_handles_read;
- }
-
- for (rentry = 0; rentry < num_read_bo_handles; rentry++) {
- gobj_read[rentry] = drm_gem_object_lookup(filp, bo_handles_read[rentry]);
- if (!gobj_read[rentry]) {
- r = -ENOENT;
- goto put_gobj_read;
- }
- }
-
- num_write_bo_handles = args->num_bo_write_handles;
- bo_handles_write = memdup_user(u64_to_user_ptr(args->bo_write_handles),
- sizeof(u32) * num_write_bo_handles);
- if (IS_ERR(bo_handles_write)) {
- r = PTR_ERR(bo_handles_write);
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(args->bo_write_handles),
+ num_write_bo_handles,
+ &gobj_write);
+ if (r)
goto put_gobj_read;
- }
-
- /* Array of pointers to the GEM write objects */
- gobj_write = kmalloc_array(num_write_bo_handles, sizeof(*gobj_write), GFP_KERNEL);
- if (!gobj_write) {
- r = -ENOMEM;
- goto free_bo_handles_write;
- }
-
- for (wentry = 0; wentry < num_write_bo_handles; wentry++) {
- gobj_write[wentry] = drm_gem_object_lookup(filp, bo_handles_write[wentry]);
- if (!gobj_write[wentry]) {
- r = -ENOENT;
- goto put_gobj_write;
- }
- }
/* Retrieve the user queue */
queue = xa_load(&userq_mgr->userq_xa, args->queue_id);
@@@ -629,17 -595,13 +595,13 @@@
exec_fini:
drm_exec_fini(&exec);
put_gobj_write:
- while (wentry-- > 0)
- drm_gem_object_put(gobj_write[wentry]);
+ for (i = 0; i < num_write_bo_handles; i++)
+ drm_gem_object_put(gobj_write[i]);
kfree(gobj_write);
- free_bo_handles_write:
- kfree(bo_handles_write);
put_gobj_read:
- while (rentry-- > 0)
- drm_gem_object_put(gobj_read[rentry]);
+ for (i = 0; i < num_read_bo_handles; i++)
+ drm_gem_object_put(gobj_read[i]);
kfree(gobj_read);
- free_bo_handles_read:
- kfree(bo_handles_read);
free_syncobj:
while (entry-- > 0)
if (syncobj[entry])
@@@ -654,92 -616,64 +616,64 @@@ free_syncobj_handles
int amdgpu_userq_wait_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp)
{
- u32 *syncobj_handles, *timeline_points, *timeline_handles, *bo_handles_read, *bo_handles_write;
- u32 num_syncobj, num_read_bo_handles, num_write_bo_handles;
- struct drm_amdgpu_userq_fence_info *fence_info = NULL;
struct drm_amdgpu_userq_wait *wait_info = data;
+ const unsigned int num_write_bo_handles = wait_info->num_bo_write_handles;
+ const unsigned int num_read_bo_handles = wait_info->num_bo_read_handles;
+ struct drm_amdgpu_userq_fence_info *fence_info = NULL;
struct amdgpu_fpriv *fpriv = filp->driver_priv;
struct amdgpu_userq_mgr *userq_mgr = &fpriv->userq_mgr;
+ struct drm_gem_object **gobj_write, **gobj_read;
+ u32 *timeline_points, *timeline_handles;
struct amdgpu_usermode_queue *waitq;
- struct drm_gem_object **gobj_write;
- struct drm_gem_object **gobj_read;
+ u32 *syncobj_handles, num_syncobj;
struct dma_fence **fences = NULL;
u16 num_points, num_fences = 0;
- int r, i, rentry, wentry, cnt;
struct drm_exec exec;
+ int r, i, cnt;
if (!amdgpu_userq_enabled(dev))
return -ENOTSUPP;
- if (wait_info->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
- wait_info->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
+ if (wait_info->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
wait_info->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
return -EINVAL;
- num_read_bo_handles = wait_info->num_bo_read_handles;
- bo_handles_read = memdup_user(u64_to_user_ptr(wait_info->bo_read_handles),
- size_mul(sizeof(u32), num_read_bo_handles));
- if (IS_ERR(bo_handles_read))
- return PTR_ERR(bo_handles_read);
-
- num_write_bo_handles = wait_info->num_bo_write_handles;
- bo_handles_write = memdup_user(u64_to_user_ptr(wait_info->bo_write_handles),
- size_mul(sizeof(u32), num_write_bo_handles));
- if (IS_ERR(bo_handles_write)) {
- r = PTR_ERR(bo_handles_write);
- goto free_bo_handles_read;
- }
-
num_syncobj = wait_info->num_syncobj_handles;
- syncobj_handles = memdup_user(u64_to_user_ptr(wait_info->syncobj_handles),
- size_mul(sizeof(u32), num_syncobj));
- if (IS_ERR(syncobj_handles)) {
- r = PTR_ERR(syncobj_handles);
- goto free_bo_handles_write;
- }
+ syncobj_handles = memdup_array_user(u64_to_user_ptr(wait_info->syncobj_handles),
+ num_syncobj, sizeof(u32));
+ if (IS_ERR(syncobj_handles))
+ return PTR_ERR(syncobj_handles);
+
num_points = wait_info->num_syncobj_timeline_handles;
- timeline_handles = memdup_user(u64_to_user_ptr(wait_info->syncobj_timeline_handles),
- sizeof(u32) * num_points);
+ timeline_handles = memdup_array_user(u64_to_user_ptr(wait_info->syncobj_timeline_handles),
+ num_points, sizeof(u32));
if (IS_ERR(timeline_handles)) {
r = PTR_ERR(timeline_handles);
goto free_syncobj_handles;
}
- timeline_points = memdup_user(u64_to_user_ptr(wait_info->syncobj_timeline_points),
- sizeof(u32) * num_points);
+ timeline_points = memdup_array_user(u64_to_user_ptr(wait_info->syncobj_timeline_points),
+ num_points, sizeof(u32));
+
if (IS_ERR(timeline_points)) {
r = PTR_ERR(timeline_points);
goto free_timeline_handles;
}
- gobj_read = kmalloc_array(num_read_bo_handles, sizeof(*gobj_read), GFP_KERNEL);
- if (!gobj_read) {
- r = -ENOMEM;
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(wait_info->bo_read_handles),
+ num_read_bo_handles,
+ &gobj_read);
+ if (r)
goto free_timeline_points;
- }
- for (rentry = 0; rentry < num_read_bo_handles; rentry++) {
- gobj_read[rentry] = drm_gem_object_lookup(filp, bo_handles_read[rentry]);
- if (!gobj_read[rentry]) {
- r = -ENOENT;
- goto put_gobj_read;
- }
- }
-
- gobj_write = kmalloc_array(num_write_bo_handles, sizeof(*gobj_write), GFP_KERNEL);
- if (!gobj_write) {
- r = -ENOMEM;
+ r = drm_gem_objects_lookup(filp,
+ u64_to_user_ptr(wait_info->bo_write_handles),
+ num_write_bo_handles,
+ &gobj_write);
+ if (r)
goto put_gobj_read;
- }
-
- for (wentry = 0; wentry < num_write_bo_handles; wentry++) {
- gobj_write[wentry] = drm_gem_object_lookup(filp, bo_handles_write[wentry]);
- if (!gobj_write[wentry]) {
- r = -ENOENT;
- goto put_gobj_write;
- }
- }
drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT,
(num_read_bo_handles + num_write_bo_handles));
@@@ -983,43 -917,25 +917,25 @@@
r = -EFAULT;
goto free_fences;
}
-
- kfree(fences);
- kfree(fence_info);
}
- drm_exec_fini(&exec);
- for (i = 0; i < num_read_bo_handles; i++)
- drm_gem_object_put(gobj_read[i]);
- kfree(gobj_read);
-
- for (i = 0; i < num_write_bo_handles; i++)
- drm_gem_object_put(gobj_write[i]);
- kfree(gobj_write);
-
- kfree(timeline_points);
- kfree(timeline_handles);
- kfree(syncobj_handles);
- kfree(bo_handles_write);
- kfree(bo_handles_read);
-
- return 0;
-
free_fences:
- while (num_fences-- > 0)
- dma_fence_put(fences[num_fences]);
- kfree(fences);
+ if (fences) {
+ while (num_fences-- > 0)
+ dma_fence_put(fences[num_fences]);
+ kfree(fences);
+ }
free_fence_info:
kfree(fence_info);
exec_fini:
drm_exec_fini(&exec);
put_gobj_write:
- while (wentry-- > 0)
- drm_gem_object_put(gobj_write[wentry]);
+ for (i = 0; i < num_write_bo_handles; i++)
+ drm_gem_object_put(gobj_write[i]);
kfree(gobj_write);
put_gobj_read:
- while (rentry-- > 0)
- drm_gem_object_put(gobj_read[rentry]);
+ for (i = 0; i < num_read_bo_handles; i++)
+ drm_gem_object_put(gobj_read[i]);
kfree(gobj_read);
free_timeline_points:
kfree(timeline_points);
@@@ -1027,10 -943,6 +943,6 @@@ free_timeline_handles
kfree(timeline_handles);
free_syncobj_handles:
kfree(syncobj_handles);
- free_bo_handles_write:
- kfree(bo_handles_write);
- free_bo_handles_read:
- kfree(bo_handles_read);
return r;
}
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^ permalink raw reply [flat|nested] 11+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2026-02-17 13:47 Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2026-02-17 13:47 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Alex Hung, Linux Kernel Mailing List,
Linux Next Mailing List, Melissa Wen, Ray Wu
[-- Attachment #1: Type: text/plain, Size: 2968 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
between commit:
d25b32aa829a3 ("drm/amd/display: extend delta clamping logic to CM3 LUT helper")
from the origin tree and commits:
0274a54897f35 ("drm/amd/display: extend delta clamping logic to CM3 LUT helper")
92ff6a83cefeb ("drm/amd/display: Check return of shaper curve to HW format")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --combined drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
index 518794fad9e1f,a0aaa727e9fa3..0000000000000
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
@@@ -52,6 -52,7 +52,7 @@@
#include "link_service.h"
#include "../dcn20/dcn20_hwseq.h"
#include "dc_state_priv.h"
+ #include "dio/dcn10/dcn10_dio.h"
#define DC_LOGGER_INIT(logger)
@@@ -485,7 -486,7 +486,7 @@@ bool dcn32_set_mcm_luts
struct dpp *dpp_base = pipe_ctx->plane_res.dpp;
int mpcc_id = pipe_ctx->plane_res.hubp->inst;
struct mpc *mpc = pipe_ctx->stream_res.opp->ctx->dc->res_pool->mpc;
- bool result = true;
+ bool rval, result;
const struct pwl_params *lut_params = NULL;
// 1D LUT
@@@ -508,10 -509,10 +509,10 @@@
lut_params = &plane_state->in_shaper_func.pwl;
else if (plane_state->in_shaper_func.type == TF_TYPE_DISTRIBUTED_POINTS) {
// TODO: dpp_base replace
- cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
+ rval = cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
&plane_state->in_shaper_func,
&dpp_base->shaper_params, true);
- lut_params = &dpp_base->shaper_params;
+ lut_params = rval ? &dpp_base->shaper_params : NULL;
}
mpc->funcs->program_shaper(mpc, lut_params, mpcc_id);
@@@ -957,13 -958,13 +958,13 @@@ void dcn32_init_hw(struct dc *dc
}
/* power AFMT HDMI memory TODO: may move to dis/en output save power*/
- REG_WRITE(DIO_MEM_PWR_CTRL, 0);
+ if (dc->res_pool->dio && dc->res_pool->dio->funcs->mem_pwr_ctrl)
+ dc->res_pool->dio->funcs->mem_pwr_ctrl(dc->res_pool->dio, false);
if (!dc->debug.disable_clock_gate) {
/* enable all DCN clock gating */
- REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0);
-
- REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0);
+ if (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating)
+ dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true);
REG_UPDATE(DCFCLK_CNTL, DCFCLK_GATE_DIS, 0);
}
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^ permalink raw reply [flat|nested] 11+ messages in thread
* linux-next: manual merge of the amdgpu tree with the origin tree
@ 2024-06-17 18:37 Mark Brown
0 siblings, 0 replies; 11+ messages in thread
From: Mark Brown @ 2024-06-17 18:37 UTC (permalink / raw)
To: Alex Deucher
Cc: Alex Deucher, Christian König, Linux Kernel Mailing List,
Linux Next Mailing List, Steven Rostedt
[-- Attachment #1: Type: text/plain, Size: 962 bytes --]
Hi all,
Today's linux-next merge of the amdgpu tree got a conflict in:
drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
between commit:
2c92ca849fcc6 ("tracing/treewide: Remove second parameter of __assign_str()")
from the origin tree and commit:
030631e97b209 ("drm/amdgpu: revert "take runtime pm reference when we attach a buffer" v2")
from the amdgpu tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
diff --cc drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
index 7aafeb763e5dd,2fd1bfb35916f..0000000000000
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-10-29 16:46 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed)
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2026-10-28 13:28 Mark Brown
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