From: Thomas Gleixner <tglx@linutronix.de>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: "H. Peter Anvin" <h.peter.anvin@intel.com>,
Ingo Molnar <mingo@elte.hu>, Tony Luck <tony.luck@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Stephane Eranian <eranian@google.com>,
Borislav Petkov <bp@suse.de>, Dave Hansen <dave.hansen@intel.com>,
Nilay Vaish <nilayvaish@gmail.com>, Shaohua Li <shli@fb.com>,
David Carrillo-Cisneros <davidcc@google.com>,
Ravi V Shankar <ravi.v.shankar@intel.com>,
Sai Prakhya <sai.praneeth.prakhya@intel.com>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH v5 11/18] x86/intel_rdt: Add basic resctrl filesystem support
Date: Wed, 26 Oct 2016 15:52:46 +0200 (CEST) [thread overview]
Message-ID: <alpine.DEB.2.20.1610261510020.4983@nanos> (raw)
In-Reply-To: <1477142405-32078-12-git-send-email-fenghua.yu@intel.com>
On Sat, 22 Oct 2016, Fenghua Yu wrote:
> +static void l3_qos_cfg_update(void *arg)
> +{
> + bool enable = *(bool *)arg;
> +
> + wrmsrl(IA32_L3_QOS_CFG, enable);
Bah. What's wrong with
bool *enable = arg;
wrmsrl(IA32_L3_QOS_CFG, *enable);
That does not have this cute type cast, right?
> +static int set_l3_qos_cfg(struct rdt_resource *r, bool enable)
> +{
> + struct rdt_domain *d;
> + cpumask_var_t cpu_mask;
> + int cpu;
That's the last time I ask for consistent variable ordering politely:
cpumask_var_t cpu_mask;
struct rdt_domain *d;
int cpu;
> +static struct dentry *rdt_mount(struct file_system_type *fs_type,
> + int flags, const char *unused_dev_name,
> + void *data)
> +{
> + struct dentry *dentry;
> + int ret;
> +
> + mutex_lock(&rdtgroup_mutex);
> + /*
> + * resctrl file system can only be mounted once.
> + */
> + if (static_branch_unlikely(&rdt_enable_key)) {
> + dentry = ERR_PTR(-EBUSY);
> + goto out;
> + }
> +
> + ret = parse_rdtgroupfs_options(data);
> + if (ret) {
> + dentry = ERR_PTR(ret);
> + goto out;
> + }
> +
> + dentry = kernfs_mount(fs_type, flags, rdt_root,
> + RDTGROUP_SUPER_MAGIC, NULL);
> + if (IS_ERR(dentry))
> + goto out;
> +
> + if (rdt_resources_all[RDT_RESOURCE_L3DATA].enabled &&
> + rdt_resources_all[RDT_RESOURCE_L3CODE].enabled) {
> + ret = set_l3_qos_cfg(&rdt_resources_all[RDT_RESOURCE_L3], true);
> + if (ret)
> + goto out;
So you skip the key enable, but the mount persists and the return value of
that function is not propagated.
> + }
> + static_branch_enable(&rdt_enable_key);
> +
> +out:
> + mutex_unlock(&rdtgroup_mutex);
> +
> + return dentry;
> +}
> +
> +static int reset_all_cbms(struct rdt_resource *r)
> +{
> + struct rdt_domain *d;
> + struct msr_param msr_param;
> + cpumask_var_t cpu_mask;
> + int i, cpu;
See above and everywhere ....
> + if (!zalloc_cpumask_var(&cpu_mask, GFP_KERNEL))
> + return -ENOMEM;
> +
> + msr_param.res = r;
> + msr_param.low = 0;
> + msr_param.high = r->num_closid;
> +
> + /*
> + * Reset each domain's all CBMs to max value and copy the domain's
What means 'reset CBMs to max value'? I know what it means as do you and a
few others. 3 month from now we all scratch our heads...
> +static void rdt_kill_sb(struct super_block *sb)
> +{
> + struct rdt_resource *r;
> +
> + mutex_lock(&rdtgroup_mutex);
> +
> + /*Put everything back to default values. */
> + for_each_enabled_rdt_resource(r)
> + reset_all_cbms(r);
> + r = &rdt_resources_all[RDT_RESOURCE_L3];
> + r->enabled = r->capable;
> + if (boot_cpu_has(X86_FEATURE_CDP_L3)) {
Why?
if (rdt_resources_all[RDT_RESOURCE_L3DATA].enabled) {
only executes that if the thing was enabled.
> + rdt_resources_all[RDT_RESOURCE_L3DATA].enabled = false;
> + rdt_resources_all[RDT_RESOURCE_L3CODE].enabled = false;
> + set_l3_qos_cfg(r, false);
> + }
> +
> + static_branch_disable(&rdt_enable_key);
> + kernfs_kill_sb(sb);
> + mutex_unlock(&rdtgroup_mutex);
> +}
Thanks,
tglx
next prev parent reply other threads:[~2016-10-26 15:04 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-22 13:19 [PATCH v5 00/18] Intel Cache Allocation Technology Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 01/18] Documentation, ABI: Add a document entry for cache id Fenghua Yu
2016-10-26 21:25 ` [tip:x86/cache] Documentation, ABI: Document the new sysfs files for cpu cache ids tip-bot for Tony Luck
2016-10-22 13:19 ` [PATCH v5 02/18] cacheinfo: Introduce cache id Fenghua Yu
2016-10-26 21:25 ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 03/18] x86/intel_cacheinfo: Enable cache id in cache info Fenghua Yu
2016-10-26 21:26 ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 04/18] x86/intel_rdt: Feature discovery Fenghua Yu
2016-10-26 14:15 ` Borislav Petkov
2016-10-26 14:28 ` Thomas Gleixner
2016-10-26 21:26 ` [tip:x86/cache] x86/cpufeature: Add RDT CPUID feature bits tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 05/18] Documentation, x86: Documentation for Intel resource allocation user interface Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 06/18] x86/intel_rdt: Add CONFIG, Makefile, and basic initialization Fenghua Yu
2016-10-26 20:43 ` Thomas Gleixner
2016-10-26 21:27 ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 07/18] x86/intel_rdt: Add Haswell feature discovery Fenghua Yu
2016-10-26 21:27 ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 08/18] x86/intel_rdt: Pick up L3/L2 RDT parameters from CPUID Fenghua Yu
2016-10-26 21:28 ` [tip:x86/cache] " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 09/18] x86/cqm: Move PQR_ASSOC management code into generic code used by both CQM and CAT Fenghua Yu
2016-10-26 21:29 ` [tip:x86/cache] x86/cqm: Share PQR_ASSOC related data between " tip-bot for Fenghua Yu
2016-10-22 13:19 ` [PATCH v5 10/18] x86/intel_rdt: Build structures for each resource based on cache topology Fenghua Yu
2016-10-26 13:02 ` Thomas Gleixner
2016-10-26 16:06 ` Luck, Tony
2016-10-26 17:31 ` Thomas Gleixner
2016-10-26 21:14 ` Fenghua Yu
2016-10-26 21:18 ` Thomas Gleixner
2016-10-22 13:19 ` [PATCH v5 11/18] x86/intel_rdt: Add basic resctrl filesystem support Fenghua Yu
2016-10-26 13:52 ` Thomas Gleixner [this message]
2016-10-22 13:19 ` [PATCH v5 12/18] x86/intel_rdt: Add "info" files to resctrl file system Fenghua Yu
2016-10-26 14:45 ` Thomas Gleixner
2016-10-26 15:48 ` Luck, Tony
2016-10-26 17:33 ` Thomas Gleixner
2016-10-27 18:17 ` Fenghua Yu
2016-10-27 18:25 ` Thomas Gleixner
2016-10-27 18:35 ` Fenghua Yu
2016-10-22 13:20 ` [PATCH v5 13/18] x86/intel_rdt: Add mkdir " Fenghua Yu
2016-10-26 15:01 ` Thomas Gleixner
2016-10-28 17:51 ` Fenghua Yu
2016-10-28 18:41 ` Thomas Gleixner
2016-10-22 13:20 ` [PATCH v5 14/18] x86/intel_rdt: Add cpus file Fenghua Yu
2016-10-26 17:57 ` Thomas Gleixner
2016-10-22 13:20 ` [PATCH v5 15/18] x86/intel_rdt: Add tasks files Fenghua Yu
2016-10-26 15:27 ` Thomas Gleixner
2016-10-22 13:20 ` [PATCH v5 16/18] x86/intel_rdt: Add schemata file Fenghua Yu
2016-10-22 13:20 ` [PATCH v5 17/18] x86/intel_rdt: Add scheduler hook Fenghua Yu
2016-10-22 13:20 ` [PATCH v5 18/18] MAINTAINERS: Add maintainer for Intel RDT resource allocation Fenghua Yu
2016-10-26 21:39 ` [PATCH v5 00/18] Intel Cache Allocation Technology Thomas Gleixner
2016-10-26 21:54 ` Fenghua Yu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=alpine.DEB.2.20.1610261510020.4983@nanos \
--to=tglx@linutronix.de \
--cc=bp@suse.de \
--cc=dave.hansen@intel.com \
--cc=davidcc@google.com \
--cc=eranian@google.com \
--cc=fenghua.yu@intel.com \
--cc=h.peter.anvin@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=nilayvaish@gmail.com \
--cc=peterz@infradead.org \
--cc=ravi.v.shankar@intel.com \
--cc=sai.praneeth.prakhya@intel.com \
--cc=shli@fb.com \
--cc=tony.luck@intel.com \
--cc=vikas.shivappa@linux.intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®