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From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: Rakib Mullick <rakib.mullick@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	x86@kernel.org, Ingo Molnar <mingo@elte.hu>
Subject: Re: [Question] x86,APIC: In apicdef.h dfr,svr,...... shouldn't be  const?
Date: Fri, 4 Sep 2009 00:21:39 +0100 (BST)	[thread overview]
Message-ID: <alpine.LFD.2.00.0909040019180.27310@eddie.linux-mips.org> (raw)
In-Reply-To: <b9df5fa10909031556i3d87ff72v3ce4ed8bcd4e5dd@mail.gmail.com>

On Fri, 4 Sep 2009, Rakib Mullick wrote:

> >  All the three have meaningful semantics on writes at least on some
> >  versions of the APIC (they either have writable fields or trigger side
> >  effects on writes).  It looks like your documentation is wrong (not
> >  unheard of with Intel).
> 
> Thanks, Maciej. If my documentation is wrong, then which documentation
> should I follow? Isn't there any well defined document?

 You may have to track down an older revision of the document or that for 
an older CPU.  These registers may have changed as the architecture 
evolved and while Linux supports all the APIC versions, Intel may have 
omitted details for earlier implementations either deliberately or 
accidentally.

  Maciej

      reply	other threads:[~2009-09-03 23:21 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-09-01  5:48 Rakib Mullick
2009-09-01  8:43 ` Cyrill Gorcunov
2009-09-01 19:41   ` Cyrill Gorcunov
2009-09-02  2:17 ` Maciej W. Rozycki
2009-09-03 22:56   ` Rakib Mullick
2009-09-03 23:21     ` Maciej W. Rozycki [this message]

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