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From: Chen Yu <chen.yu@linux.dev>
To: Reinette Chatre <reinette.chatre@intel.com>
Cc: Tony Luck <tony.luck@intel.com>, Borislav Petkov <bp@alien8.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Newman <peternewman@google.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Dave Martin <Dave.Martin@arm.com>,
	Ben Horgan <ben.horgan@arm.com>,
	James Morse <james.morse@arm.com>,
	Babu Moger <babu.moger@amd.com>,
	Drew Fustini <fustini@kernel.org>,
	Fenghua Yu <fenghuay@nvidia.com>, Chen Yu <yu.c.chen@intel.com>
Subject: Re: [RFC v2] arm,x86,fs/resctrl: Generic schema description Proof of Concept
Date: Wed, 19 Aug 2026 00:02:57 +0800	[thread overview]
Message-ID: <aoSCMZs-gwu2LTdc@three-body> (raw)
In-Reply-To: <5e07c57d-b971-4c7a-bdfe-3b9c6f299b8b@intel.com>

On Thu, Aug 13, 2026 at 08:19:38AM -0700, Reinette Chatre wrote:
> On 8/13/26 6:59 AM, Chen Yu wrote:
> > diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c
> > index cac4b3293cef..ab7d3fa3f337 100644
> > --- a/fs/resctrl/rdtgroup.c
> > +++ b/fs/resctrl/rdtgroup.c
> > @@ -124,7 +124,7 @@ void rdt_staged_configs_clear(void)
> >                         if (list_empty(&ctrl->emulated_by))
> >                                 continue;
> >                         list_for_each_entry(em_ctrl, &ctrl->emulated_by, entry) {
> > -                               list_for_each_entry_rcu(dom, &ctrl->domains, hdr.list, lockdep_is_cpus_held())
> > +                               list_for_each_entry_rcu(dom, &em_ctrl->domains, hdr.list, lockdep_is_cpus_held())
> >                                         memset(dom->staged_config, 0, sizeof(dom->staged_config));
> >                         }
> >                 }
> Thank you very much. Squashed and available in branch resctrl/controls_rfc_v2.2
>

:) Another minor one
otherwise a schemata write on Haswell would only update rdt_hw_ctrl_domain::ctrl_val[]
and never reach MSR_IA32_L3_CBM_BASE.

--- a/arch/x86/kernel/cpu/resctrl/core.c
+++ b/arch/x86/kernel/cpu/resctrl/core.c
@@ -175,6 +175,10 @@ static inline void cache_alloc_hsw_probe(void)
 	hw_ctrl->r_ctrl.bitmap.cbm_len = 20;
 	hw_ctrl->r_ctrl.bitmap.shareable_bits = 0xc0000;
 	hw_ctrl->r_ctrl.bitmap.min_cbm_bits = 2;
+
+	hw_ctrl->msr_base = MSR_IA32_L3_CBM_BASE;
+	hw_ctrl->hw_update = cat_wrmsr;
+
 	list_add(&hw_ctrl->r_ctrl.entry, &r->controls);
 
 	hw_res->num_closid = 4;

thanks,
Chenyu 

  reply	other threads:[~2026-08-17 16:03 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-04  5:26 Reinette Chatre
2026-08-05 16:59 ` Ben Horgan
2026-08-05 23:57   ` Reinette Chatre
2026-08-06 17:04     ` Luck, Tony
2026-08-06 17:11       ` Reinette Chatre
2026-08-07 14:14         ` Moger, Babu
2026-08-07 15:35           ` Reinette Chatre
2026-08-07 18:33             ` Moger, Babu
2026-08-07 22:53               ` Reinette Chatre
2026-08-10 18:52                 ` Babu Moger
2026-08-11  4:06                   ` Reinette Chatre
2026-08-11 14:59                     ` Babu Moger
2026-08-11 15:30                       ` Reinette Chatre
2026-08-11 16:09                         ` Babu Moger
2026-08-07 15:35           ` Chen, Yu C
2026-08-07 17:57             ` Moger, Babu
2026-08-10  2:05 ` Chen, Yu C
2026-08-10 15:53   ` Reinette Chatre
2026-08-10 17:23     ` Chen, Yu C
2026-08-10 18:09       ` Reinette Chatre
2026-08-11  3:49         ` Chen, Yu C
2026-08-13 13:59           ` Chen Yu
2026-08-13 15:19             ` Reinette Chatre
2026-08-18 16:02               ` Chen Yu [this message]
2026-08-10  2:55 ` Fenghua Yu
2026-08-10  3:02   ` Chen, Yu C
2026-08-10  3:25     ` Fenghua Yu
2026-08-10  5:24       ` Chen, Yu C
2026-08-10 15:53   ` Reinette Chatre
2026-08-17 15:09     ` Reinette Chatre

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