Re: [PATCH 2/2] xhci: drop 120ms U3 LFPS wake retry wait from runtime resume

[Lovekesh Solanki <lovekeshsolanki00@gmail.com>]

On Thu, Sep 17, 2026 at 11:16:03AM +0300, Mathias Nyman wrote:
> I don't think there is a need for a new PCI bus specific implementation.
> pm core then probably handles this already in a generic way.
> 
> PCI core probably calls pm core on a PME, which then starts the wakeup,
> pm core very likely keeps track of which device triggered the wakeup
> 
> The wakeup_source structure under power in the device structure (dev->power.wakeup)
> looks promising.
> Maybe we can find what we need from there. Hope its fields aren't cleared at the
> time xhci resume is called.
I looked into that wakeup_source struct and its path, unfortunately it
does not seem to carry this information.

There's no fields that record the cause of the wakeup event. and all PCI
wake paths fold into pci_wakeup_event(), the active flag in
wakeup_source only gets set for 100ms of pm_wakeup_event(&dev->dev, 100) in
pci_wakeup_event(). then pm_request_resume() runs but its async so it
may run after active field is cleared.

So even though PCI core does call PM core, PM core is not tracking the
cause.

I suppose my above proposal could be changed to a pm core flag that
may be a better option? Something like a dev->power.wake_resume,
bus could set it in pci_wakeup_event(), then we add a new resume callback 
something like pm_runtime_resumed_by_wakeup() and PM core could clear it
at the end of runtime PM transition.
But either way only the bus is able to detect PME.

Regards, 
Lovekesh