* [PATCH 1/2] dt-bindings: mfd: as3722: Convert to json-schema
2026-09-28 16:24 [PATCH 0/2] arm64: tegra: Fix DT validation issues for Tegra132 Thierry Reding
@ 2026-09-28 16:24 ` Thierry Reding
2026-09-28 21:41 ` Rob Herring
2026-09-28 16:24 ` [PATCH 2/2] dt-bindings: sound: tegra-ahub: " Thierry Reding
1 sibling, 1 reply; 9+ messages in thread
From: Thierry Reding @ 2026-09-28 16:24 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Liam Girdwood, Mark Brown, Laxman Dewangan, Thierry Reding,
Jonathan Hunter
Cc: mfd, devicetree, linux-kernel, Thierry Reding, linux-sound,
linux-tegra, Thierry Reding
From: Thierry Reding <treding@nvidia.com>
Convert the AMS AS3722 PMIC bindings from the free-form text format to
json-schema.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
.../devicetree/bindings/mfd/ams,as3722.yaml | 276 +++++++++++++++++++++
Documentation/devicetree/bindings/mfd/as3722.txt | 214 ----------------
.../bindings/regulator/as3722-regulator.txt | 91 -------
3 files changed, 276 insertions(+), 305 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/ams,as3722.yaml b/Documentation/devicetree/bindings/mfd/ams,as3722.yaml
new file mode 100644
index 000000000000..6a6444500396
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/ams,as3722.yaml
@@ -0,0 +1,276 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/ams,as3722.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AMS AS3722 Power Management IC
+
+maintainers:
+ - Laxman Dewangan <ldewangan@nvidia.com>
+ - Lee Jones <lee.jones@linaro.org>
+
+properties:
+ compatible:
+ const: ams,as3722
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ # standard properties
+ interrupt-controller:
+ description: The AS3722 has an internal interrupt controller which takes
+ the interrupt request from internal sub-blocks like RTC, regulators,
+ GPIOs as well as external input.
+
+ "#interrupt-cells":
+ description: The first cell is the IRQ number. IRQ numbers for different
+ interrupt source of AS3722 are defined at dt-bindings/mfd/as3722.h The
+ second cell is the flags, encoded as the trigger masks from binding
+ document interrupts.txt, using dt-bindings/irq.
+ const: 2
+
+ # from gpio.yaml
+ gpio-controller: true
+ "#gpio-cells": true
+
+ # optional properties
+ ams,enable-internal-int-pullup:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: Boolean property, to enable internal pullup on interrupt pin.
+ Omitting this will disable internal pullup on INT pin.
+
+ ams,enable-internal-i2c-pullup:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: Boolean property, to enable internal pullup on I2C SCL/SDA
+ pins. Omitting this will disable internal pullup on I2C SCL/SDA lines.
+
+ ams,enable-ac-ok-power-on:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: Boolean property, to enable exit out of power off mode with
+ AC_OK pin (pin enabled in power off mode).
+
+ ams,system-power-controller:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: The AS3722 supports the system power off by turning off all
+ its rails. The device node should contain this boolean property to
+ enable this functionality.
+
+ pinmux:
+ type: object
+ description: |
+ Device has 8 GPIO pins which can be configured as GPIO as well as the
+ special IO functions.
+
+ Please refer to pinctrl-bindings.txt in this directory for details of
+ the common pinctrl bindings used by client devices, including the
+ meaning of the phrase "pin configuration node".
+
+ patternProperties:
+ "^gpio[0-7_]+$":
+ description: |
+ Child nodes of the pinmux node represent some desired configuration
+ for a list of pins. This configuration can include the mux function
+ to select on those pin(s), and various pin configuration parameters,
+ such as pull-up, open drain.
+ type: object
+ properties:
+ pins:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ description: List of pins for this configuration group.
+ items:
+ enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7 ]
+
+ function:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: Function configuration for this configuration group.
+ enum: [ gpio, interrupt-out, gpio-in-interrupt,
+ vsup-vbat-low-undebounce-out, vsup-vbat-low-debounce-out,
+ voltage-in-standby, oc-pg-sd0, oc-pg-sd6, powergood-out,
+ pwm-in, pwm-out, clk32k-out, watchdog-in, soft-reset-in ]
+
+ bias-disable:
+ $ref: /schemas/types.yaml#/definitions/flag
+
+ bias-pull-up:
+ $ref: /schemas/types.yaml#/definitions/flag
+
+ bias-pull-down:
+ $ref: /schemas/types.yaml#/definitions/flag
+
+ bias-high-impedance:
+ $ref: /schemas/types.yaml#/definitions/flag
+
+ drive-open-drain:
+ $ref: /schemas/types.yaml#/definitions/flag
+
+ additionalProperties: false
+
+ required:
+ - pins
+
+ regulators:
+ type: object
+ description: Device has multiple DCDC and LDOs. The node "regulators" is
+ required if regulator functionality is needed.
+
+ properties:
+ vsup-sd2-supply:
+ description: input supply for SD2
+
+ vsup-sd3-supply:
+ description: input supply for SD3
+
+ vsup-sd4-supply:
+ description: input supply for SD4
+
+ vsup-sd5-supply:
+ description: input supply for SD5
+
+ vin-ldo0-supply:
+ description: input supply for LDO0
+
+ vin-ldo1-6-supply:
+ description: input supply for LDO1 and LDO6
+
+ vin-ldo2-5-7-supply:
+ description: input supply for LDO2, LDO5 and LDO7
+
+ vin-ldo3-4-supply:
+ description: input supply for LDO3 and LDO4
+
+ vin-ldo9-10-supply:
+ description: input supply for LDO9 and LDO10
+
+ vin-ldo11-supply:
+ description: input supply for LDO11
+
+ patternProperties:
+ "^(sd[0-6]|ldo[0-7]|ldo9|ldo10|ldo11)$":
+ type: object
+ description: These sub-nodes must be named after one of the regulators
+ found on the AS3277. Each sub-node should contain the constraints and
+ initialization information for that regulator.
+
+ properties:
+ ams,ext-control:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: External control of the rail. The value of this
+ property will tell which external input is controlling this rail.
+ Valid values are 0, 1, 2 ad 3. If this property does not exist,
+ the default value is 0. The external control pin macros are
+ defined in dt-bindings/mfd/as3722.h.
+ oneOf:
+ - description: there is no external control of this rail
+ const: 0
+ - description: rail is controlled by ENABLE1 input pin
+ const: 1
+ - description: rail is controlled by ENABLE2 input pin
+ const: 2
+ - description: rail is controlled by ENABLE3 input pin
+ const: 3
+ default: 0
+
+ ams,enable-tracking:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: Enable tracking with SD1, only supported by LDO3.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupt-controller
+ - "#interrupt-cells"
+
+allOf:
+ - $ref: /schemas/gpio/gpio.yaml
+
+examples:
+ - |
+ #include <dt-bindings/mfd/as3722.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic@48 {
+ compatible = "ams,as3722";
+ reg = <0x48>;
+
+ ams,system-power-controller;
+
+ interrupt-parent = <&intc>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&as3722_default>;
+
+ as3722_default: pinmux {
+ gpio0 {
+ pins = "gpio0";
+ function = "gpio";
+ bias-pull-down;
+ };
+
+ gpio1_2_4_7 {
+ pins = "gpio1", "gpio2", "gpio4", "gpio7";
+ function = "gpio";
+ bias-pull-up;
+ };
+
+ gpio5 {
+ pins = "gpio5";
+ function = "clk32k-out";
+ };
+ };
+
+ regulators {
+ vsup-sd2-supply = <&vdd_5v0_sys>;
+
+ sd0 {
+ regulator-name = "vdd_cpu";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ ams,ext-control = <2>;
+ };
+
+ sd1 {
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-always-on;
+ ams,ext-control = <1>;
+ };
+
+ sd2 {
+ regulator-name = "vddio_ddr";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ };
+
+ sd4 {
+ regulator-name = "avdd-hdmi-pex";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-always-on;
+ };
+
+ sd5 {
+ regulator-name = "vdd-1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/mfd/as3722.txt b/Documentation/devicetree/bindings/mfd/as3722.txt
deleted file mode 100644
index 2a665741d7fe..000000000000
--- a/Documentation/devicetree/bindings/mfd/as3722.txt
+++ /dev/null
@@ -1,214 +0,0 @@
-* ams AS3722 Power management IC.
-
-Required properties:
--------------------
-- compatible: Must be "ams,as3722".
-- reg: I2C device address.
-- interrupt-controller: AS3722 has internal interrupt controller which takes the
- interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
- as external input.
-- #interrupt-cells: Should be set to 2 for IRQ number and flags.
- The first cell is the IRQ number. IRQ numbers for different interrupt source
- of AS3722 are defined at dt-bindings/mfd/as3722.h
- The second cell is the flags, encoded as the trigger masks from binding document
- interrupts.txt, using dt-bindings/irq.
-
-Optional properties:
---------------------
-- ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on
- interrupt pin. Missing this will disable internal pullup on INT pin.
-- ams,enable-internal-i2c-pullup: Boolean property, to enable internal pullup on
- i2c scl/sda pins. Missing this will disable internal pullup on i2c
- scl/sda lines.
-- ams,enable-ac-ok-power-on: Boolean property, to enable exit out of power off
- mode with AC_OK pin (pin enabled in power off mode).
-
-Optional submodule and their properties:
-=======================================
-
-Pinmux and GPIO:
-===============
-Device has 8 GPIO pins which can be configured as GPIO as well as the special IO
-functions.
-
-Please refer to pinctrl-bindings.txt in this directory for details of the
-common pinctrl bindings used by client devices, including the meaning of the
-phrase "pin configuration node".
-
-Following are properties which is needed if GPIO and pinmux functionality
-is required:
- Required properties:
- -------------------
- - gpio-controller: Marks the device node as a GPIO controller.
- - #gpio-cells: Number of GPIO cells. Refer to binding document
- gpio/gpio.txt
-
- Optional properties:
- --------------------
- Following properties are require if pin control setting is required
- at boot.
- - pinctrl-names: A pinctrl state named "default" be defined, using the
- bindings in pinctrl/pinctrl-bindings.txt.
- - pinctrl[0...n]: Properties to contain the phandle that refer to
- different nodes of pin control settings. These nodes represents
- the pin control setting of state 0 to state n. Each of these
- nodes contains different subnodes to represents some desired
- configuration for a list of pins. This configuration can
- include the mux function to select on those pin(s), and
- various pin configuration parameters, such as pull-up,
- open drain.
-
- Each subnode have following properties:
- Required properties:
- - pins: List of pins. Valid values of pins properties are:
- gpio0, gpio1, gpio2, gpio3, gpio4, gpio5,
- gpio6, gpio7
-
- Optional properties:
- function, bias-disable, bias-pull-up, bias-pull-down,
- bias-high-impedance, drive-open-drain.
-
- Valid values for function properties are:
- gpio, interrupt-out, gpio-in-interrupt,
- vsup-vbat-low-undebounce-out,
- vsup-vbat-low-debounce-out,
- voltage-in-standby, oc-pg-sd0, oc-pg-sd6,
- powergood-out, pwm-in, pwm-out, clk32k-out,
- watchdog-in, soft-reset-in
-
-Regulators:
-===========
-Device has multiple DCDC and LDOs. The node "regulators" is require if regulator
-functionality is needed.
-
-Following are properties of regulator subnode.
-
- Optional properties:
- -------------------
- The input supply of regulators are the optional properties on the
- regulator node. The input supply of these regulators are provided
- through following properties:
- vsup-sd2-supply: Input supply for SD2.
- vsup-sd3-supply: Input supply for SD3.
- vsup-sd4-supply: Input supply for SD4.
- vsup-sd5-supply: Input supply for SD5.
- vin-ldo0-supply: Input supply for LDO0.
- vin-ldo1-6-supply: Input supply for LDO1 and LDO6.
- vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7.
- vin-ldo3-4-supply: Input supply for LDO3 and LDO4.
- vin-ldo9-10-supply: Input supply for LDO9 and LDO10.
- vin-ldo11-supply: Input supply for LDO11.
-
- Optional sub nodes for regulators:
- ---------------------------------
- The subnodes name is the name of regulator and it must be one of:
- sd[0-6], ldo[0-7], ldo[9-11]
-
- Each sub-node should contain the constraints and initialization
- information for that regulator. See regulator.txt for a description
- of standard properties for these sub-nodes.
- Additional optional custom properties are listed below.
- ams,ext-control: External control of the rail. The option of
- this properties will tell which external input is
- controlling this rail. Valid values are 0, 1, 2 ad 3.
- 0: There is no external control of this rail.
- 1: Rail is controlled by ENABLE1 input pin.
- 2: Rail is controlled by ENABLE2 input pin.
- 3: Rail is controlled by ENABLE3 input pin.
- Missing this property on DT will be assume as no
- external control. The external control pin macros
- are defined @dt-bindings/mfd/as3722.h
-
- ams,enable-tracking: Enable tracking with SD1, only supported
- by LDO3.
-
-Power-off:
-=========
-AS3722 supports the system power off by turning off all its rails.
-The device node should have the following properties to enable this
-functionality
-ams,system-power-controller: Boolean, to enable the power off functionality
- through this device.
-
-Example:
---------
-#include <dt-bindings/mfd/as3722.h>
-...
-ams3722 {
- compatible = "ams,as3722";
- reg = <0x48>;
-
- ams,system-power-controller;
-
- interrupt-parent = <&intc>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&as3722_default>;
-
- as3722_default: pinmux {
- gpio0 {
- pins = "gpio0";
- function = "gpio";
- bias-pull-down;
- };
-
- gpio1_2_4_7 {
- pins = "gpio1", "gpio2", "gpio4", "gpio7";
- function = "gpio";
- bias-pull-up;
- };
-
- gpio5 {
- pins = "gpio5";
- function = "clk32k_out";
- };
- }
-
- regulators {
- vsup-sd2-supply = <...>;
- ...
-
- sd0 {
- regulator-name = "vdd_cpu";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1400000>;
- regulator-always-on;
- ams,ext-control = <2>;
- };
-
- sd1 {
- regulator-name = "vdd_core";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1400000>;
- regulator-always-on;
- ams,ext-control = <1>;
- };
-
- sd2 {
- regulator-name = "vddio_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- };
-
- sd4 {
- regulator-name = "avdd-hdmi-pex";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- regulator-always-on;
- };
-
- sd5 {
- regulator-name = "vdd-1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
- ....
- };
-};
diff --git a/Documentation/devicetree/bindings/regulator/as3722-regulator.txt b/Documentation/devicetree/bindings/regulator/as3722-regulator.txt
deleted file mode 100644
index caad0c8a258d..000000000000
--- a/Documentation/devicetree/bindings/regulator/as3722-regulator.txt
+++ /dev/null
@@ -1,91 +0,0 @@
-Regulator of AMS AS3722 PMIC.
-Name of the regulator subnode must be "regulators".
-
-Optional properties:
---------------------
-The input supply of regulators are the optional properties on the
-regulator node. The AS3722 is having 7 DCDC step-down regulators as
-sd[0-6], 10 LDOs as ldo[0-7], ldo[9-11]. The input supply of these
-regulators are provided through following properties:
-vsup-sd2-supply: Input supply for SD2.
-vsup-sd3-supply: Input supply for SD3.
-vsup-sd4-supply: Input supply for SD4.
-vsup-sd5-supply: Input supply for SD5.
-vin-ldo0-supply: Input supply for LDO0.
-vin-ldo1-6-supply: Input supply for LDO1 and LDO6.
-vin-ldo2-5-7-supply: Input supply for LDO2, LDO5 and LDO7.
-vin-ldo3-4-supply: Input supply for LDO3 and LDO4.
-vin-ldo9-10-supply: Input supply for LDO9 and LDO10.
-vin-ldo11-supply: Input supply for LDO11.
-
-Optional nodes:
---------------
-- regulators : Must contain a sub-node per regulator from the list below.
- Each sub-node should contain the constraints and initialization
- information for that regulator. See regulator.txt for a
- description of standard properties for these sub-nodes.
- Additional custom properties are listed below.
- sd[0-6], ldo[0-7], ldo[9-11].
-
- Optional sub-node properties:
- ----------------------------
- ams,ext-control: External control of the rail. The option of
- this properties will tell which external input is
- controlling this rail. Valid values are 0, 1, 2 ad 3.
- 0: There is no external control of this rail.
- 1: Rail is controlled by ENABLE1 input pin.
- 2: Rail is controlled by ENABLE2 input pin.
- 3: Rail is controlled by ENABLE3 input pin.
- ams,enable-tracking: Enable tracking with SD1, only supported
- by LDO3.
-
-Example:
--------
- ams3722: ams3722 {
- compatible = "ams,as3722";
- reg = <0x40>;
- ...
-
- regulators {
- vsup-sd2-supply = <...>;
- ...
-
- sd0 {
- regulator-name = "vdd_cpu";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1400000>;
- regulator-always-on;
- ams,ext-control = <2>;
- };
-
- sd1 {
- regulator-name = "vdd_core";
- regulator-min-microvolt = <700000>;
- regulator-max-microvolt = <1400000>;
- regulator-always-on;
- ams,ext-control = <1>;
- };
-
- sd2 {
- regulator-name = "vddio_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- };
-
- sd4 {
- regulator-name = "avdd-hdmi-pex";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- regulator-always-on;
- };
-
- sd5 {
- regulator-name = "vdd-1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- };
- ....
- };
- };
--
2.55.0
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 2/2] dt-bindings: sound: tegra-ahub: Convert to json-schema
2026-09-28 16:24 [PATCH 0/2] arm64: tegra: Fix DT validation issues for Tegra132 Thierry Reding
2026-09-28 16:24 ` [PATCH 1/2] dt-bindings: mfd: as3722: Convert to json-schema Thierry Reding
@ 2026-09-28 16:24 ` Thierry Reding
2026-09-28 16:38 ` Mark Brown
` (2 more replies)
1 sibling, 3 replies; 9+ messages in thread
From: Thierry Reding @ 2026-09-28 16:24 UTC (permalink / raw)
To: Lee Jones, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Liam Girdwood, Mark Brown, Laxman Dewangan, Thierry Reding,
Jonathan Hunter
Cc: mfd, devicetree, linux-kernel, Thierry Reding, linux-sound,
linux-tegra, Thierry Reding
From: Thierry Reding <treding@nvidia.com>
Convert Tegra AHUB bindings from the free-form text format to
json-schema.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
.../bindings/sound/nvidia,tegra30-ahub.txt | 88 -------
.../bindings/sound/nvidia,tegra30-ahub.yaml | 260 +++++++++++++++++++++
2 files changed, 260 insertions(+), 88 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
deleted file mode 100644
index 0e9a1895d7fb..000000000000
--- a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.txt
+++ /dev/null
@@ -1,88 +0,0 @@
-NVIDIA Tegra30 AHUB (Audio Hub)
-
-Required properties:
-- compatible : For Tegra30, must contain "nvidia,tegra30-ahub". For Tegra114,
- must contain "nvidia,tegra114-ahub". For Tegra124, must contain
- "nvidia,tegra124-ahub". Otherwise, must contain "nvidia,<chip>-ahub",
- plus at least one of the above, where <chip> is tegra132.
-- reg : Should contain the register physical address and length for each of
- the AHUB's register blocks.
- - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
- - Tegra114 requires an additional entry, for the APBIF2 register block.
-- interrupts : Should contain AHUB interrupt
-- clocks : Must contain an entry for each entry in clock-names.
- See ../clocks/clock-bindings.txt for details.
-- clock-names : Must include the following entries:
- - d_audio
- - apbif
-- resets : Must contain an entry for each entry in reset-names.
- See ../reset/reset.txt for details.
-- reset-names : Must include the following entries:
- Tegra30 and later:
- - d_audio
- - apbif
- - i2s0
- - i2s1
- - i2s2
- - i2s3
- - i2s4
- - dam0
- - dam1
- - dam2
- - spdif
- Tegra114 and later additionally require:
- - amx
- - adx
- Tegra124 and later additionally require:
- - amx1
- - adx1
- - afc0
- - afc1
- - afc2
- - afc3
- - afc4
- - afc5
-- ranges : The bus address mapping for the configlink register bus.
- Can be empty since the mapping is 1:1.
-- dmas : Must contain an entry for each entry in clock-names.
- See ../dma/dma.txt for details.
-- dma-names : Must include the following entries:
- - rx0 .. rx<n>
- - tx0 .. tx<n>
- ... where n is:
- Tegra30: 3
- Tegra114, Tegra124: 9
-- #address-cells : For the configlink bus. Should be <1>;
-- #size-cells : For the configlink bus. Should be <1>.
-
-AHUB client modules need to specify the IDs of their CIFs (Client InterFaces).
-For RX CIFs, the numbers indicate the register number within AHUB routing
-register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1).
-For TX CIFs, the numbers indicate the bit position within the AHUB routing
-registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
-
-Example:
-
-ahub@70080000 {
- compatible = "nvidia,tegra30-ahub";
- reg = <0x70080000 0x200 0x70080200 0x100>;
- interrupts = < 0 103 0x04 >;
- nvidia,dma-request-selector = <&apbdma 1>;
- clocks = <&tegra_car 106>, <&tegra_car 107>;
- clock-names = "d_audio", "apbif";
- resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
- <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
- <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,
- <&tegra_car 110>, <&tegra_car 10>;
- reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
- "i2s3", "i2s4", "dam0", "dam1", "dam2",
- "spdif";
- dmas = <&apbdma 1>, <&apbdma 1>;
- <&apbdma 2>, <&apbdma 2>;
- <&apbdma 3>, <&apbdma 3>;
- <&apbdma 4>, <&apbdma 4>;
- dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3";
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.yaml
new file mode 100644
index 000000000000..c064a2acae5e
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra30-ahub.yaml
@@ -0,0 +1,260 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/nvidia,tegra30-ahub.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra30 AHUB (Audio Hub)
+
+maintainers:
+ - Thierry Reding <thierry.reding@gmail.com>
+ - Jon Hunter <jonathanh@nvidia.com>
+
+description: AHUB client modules need to specify the IDs of their CIFs (Client InterFaces). For RX
+ CIFs, the numbers indicate the register number within AHUB routing register space (APBIF 0..3 RX,
+ I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1). For TX CIFs, the numbers indicate the bit position
+ within the AHUB routing registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
+
+properties:
+ compatible:
+ enum:
+ - nvidia,tegra30-ahub
+ - nvidia,tegra114-ahub
+ - nvidia,tegra124-ahub
+
+ reg:
+ minItems: 2
+ maxItems: 3
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: digital audio clock
+ - description: module clock
+
+ clock-names:
+ items:
+ - const: d_audio
+ - const: apbif
+
+ resets:
+ minItems: 11
+ maxItems: 21
+
+ reset-names:
+ minItems: 11
+ maxItems: 21
+
+ ranges: true
+
+ dmas:
+ minItems: 8
+ maxItems: 20
+
+ dma-names:
+ minItems: 8
+ maxItems: 20
+
+ "#address-cells":
+ enum: [ 1, 2 ]
+
+ "#size-cells":
+ enum: [ 1, 2 ]
+
+patternProperties:
+ "^i2s@[0-9a-f]+$":
+ type: object
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - ranges
+ - dmas
+ - dma-names
+ - "#address-cells"
+ - "#size-cells"
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra30-ahub
+ then:
+ properties:
+ reg:
+ items:
+ - description: APBIF registers
+ - description: AHUB/AUDIO registers
+
+ reset-names:
+ items:
+ - const: d_audio
+ - const: apbif
+ - const: i2s0
+ - const: i2s1
+ - const: i2s2
+ - const: i2s3
+ - const: i2s4
+ - const: dam0
+ - const: dam1
+ - const: dam2
+ - const: spdif
+
+ dma-names:
+ items:
+ - const: rx0
+ - const: tx0
+ - const: rx1
+ - const: tx1
+ - const: rx2
+ - const: tx2
+ - const: rx3
+ - const: tx3
+
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra114-ahub
+ then:
+ properties:
+ reg:
+ items:
+ - description: APBIF registers
+ - description: AHUB/AUDIO registers
+ - description: APBIF2 registers
+
+ reset-names:
+ items:
+ - const: d_audio
+ - const: apbif
+ - const: i2s0
+ - const: i2s1
+ - const: i2s2
+ - const: i2s3
+ - const: i2s4
+ - const: dam0
+ - const: dam1
+ - const: dam2
+ - const: spdif
+ - const: amx
+ - const: adx
+
+ dma-names:
+ items:
+ - const: rx0
+ - const: tx0
+ - const: rx1
+ - const: tx1
+ - const: rx2
+ - const: tx2
+ - const: rx3
+ - const: tx3
+ - const: rx4
+ - const: tx4
+ - const: rx5
+ - const: tx5
+ - const: rx6
+ - const: tx6
+ - const: rx7
+ - const: tx7
+ - const: rx8
+ - const: tx8
+ - const: rx9
+ - const: tx9
+
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra124-ahub
+ then:
+ properties:
+ reg:
+ items:
+ - description: APBIF registers
+ - description: AHUB/AUDIO registers
+ - description: APBIF2 registers
+
+ reset-names:
+ items:
+ - const: d_audio
+ - const: apbif
+ - const: i2s0
+ - const: i2s1
+ - const: i2s2
+ - const: i2s3
+ - const: i2s4
+ - const: dam0
+ - const: dam1
+ - const: dam2
+ - const: spdif
+ - const: amx
+ - const: amx1
+ - const: adx
+ - const: adx1
+ - const: afc0
+ - const: afc1
+ - const: afc2
+ - const: afc3
+ - const: afc4
+ - const: afc5
+
+ dma-names:
+ items:
+ - const: rx0
+ - const: tx0
+ - const: rx1
+ - const: tx1
+ - const: rx2
+ - const: tx2
+ - const: rx3
+ - const: tx3
+ - const: rx4
+ - const: tx4
+ - const: rx5
+ - const: tx5
+ - const: rx6
+ - const: tx6
+ - const: rx7
+ - const: tx7
+ - const: rx8
+ - const: tx8
+ - const: rx9
+ - const: tx9
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/tegra30-car.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ahub@70080000 {
+ compatible = "nvidia,tegra30-ahub";
+ reg = <0x70080000 0x200>,
+ <0x70080200 0x100>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA30_CLK_D_AUDIO>, <&tegra_car TEGRA30_CLK_APBIF>;
+ clock-names = "d_audio", "apbif";
+ resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
+ <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
+ <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,
+ <&tegra_car 110>, <&tegra_car 10>;
+ reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
+ "i2s3", "i2s4", "dam0", "dam1", "dam2",
+ "spdif";
+ dmas = <&apbdma 1>, <&apbdma 1>,
+ <&apbdma 2>, <&apbdma 2>,
+ <&apbdma 3>, <&apbdma 3>,
+ <&apbdma 4>, <&apbdma 4>;
+ dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3";
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
--
2.55.0
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