From: Charlie Jenkins <thecharlesjenkins@gmail.com>
To: "Radim Krčmář" <radim.krcmar@oss.qualcomm.com>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alexandre Ghiti <alex@ghiti.fr>,
Samuel Holland <samuel.holland@sifive.com>,
Andy Chiu <andybnac@gmail.com>, Guodong Xu <guodong@riscstar.com>,
Zong Li <zong.li@sifive.com>
Subject: Re: [PATCH 5/6] riscv: hwprobe: Report XTheadVector only when available
Date: Wed, 7 Oct 2026 01:07:20 -0700 [thread overview]
Message-ID: <asX9uMyiJMAzjIFF@blinky> (raw)
In-Reply-To: <DLYG41IFMP2J.12CCFGMZGC4ZQ@oss.qualcomm.com>
On Wed, Oct 07, 2026 at 09:59:30AM +0200, Radim Krčmář wrote:
> 2026-10-06T16:54:53-07:00, Charlie Jenkins <thecharlesjenkins@gmail.com>:
> >> User-mode use of XTheadVector requires non-Off sstatus.VS, which we set
> >> only when has_xtheadvector() (CONFIG_RISCV_ISA_XTHEADVECTOR and
> >> XTheadVector on all harts). XTheadVector also bundles operations with
> >> floating state, which additionally requires non-Off sstatus.FS and hence
> >> has_fpu(). hwprobe reports XTheadVector from the per-hart vendor ISA
> >> bitmaps alone, so it can advertise an extension that is always disabled
> >> in user-mode.
> >>
> >> Report correct environment to user-mode.
> >>
> >> Fixes: a5ea53da65c5 ("riscv: hwprobe: Add thead vendor extension probing")
> >> Signed-off-by: Radim Krčmář <radim.krcmar@oss.qualcomm.com>
> >>
> >> diff --git a/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c
> >> index 2eba34011786..f07aa1c8acac 100644
> >> --- a/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c
> >> +++ b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c
> >> @@ -1,5 +1,7 @@
> >> // SPDX-License-Identifier: GPL-2.0-only
> >>
> >> +#include <asm/switch_to.h>
> >> +#include <asm/vector.h>
> >> #include <asm/vendor_extensions/thead.h>
> >> #include <asm/vendor_extensions/thead_hwprobe.h>
> >> #include <asm/vendor_extensions/vendor_hwprobe.h>
> >> @@ -14,6 +16,7 @@ void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpu
> >> {
> >> VENDOR_EXTENSION_SUPPORTED(pair, cpus,
> >> riscv_isa_vendor_ext_list_thead.per_hart_isa_bitmap, {
> >> - VENDOR_EXT_KEY(XTHEADVECTOR);
> >> + if (has_xtheadvector() && has_fpu())
> >
> > xtheadvector is also gated on FPU=y so this is a reduntant addition. Is
> > it worthwhile to make this change?
>
> With CONFIG_FPU=y, has_fpu() is set to false when a single hart doesn't
> have the D, and has_xtheadvector() could still be true.
Ahh that's a good point.
>
> > Is
> > it worthwhile to make this change?
>
> I think that it's sensible to mimic the validation we do for the
> non-vendor extension, but users of vendor extensions likely already have
> to go out of their way to utilize them, so they can do the sanity checks
> too... I can drop the last two patches in v2.
I don't know, it seems better to keep standardization if possible and
leave the check in here to mimic the standard extensions?
- Charlie
>
> Thanks.
next prev parent reply other threads:[~2026-10-07 8:07 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-06 7:52 [PATCH 0/6] riscv: hwprobe: do not report disabled extensions Radim Krčmář
2026-10-06 7:52 ` [PATCH 1/6] riscv: hwprobe: Report FP extensions only when available Radim Krčmář
2026-10-06 23:54 ` Charlie Jenkins
2026-10-07 7:46 ` Radim Krčmář
2026-10-07 8:05 ` Charlie Jenkins
2026-10-06 7:52 ` [PATCH 2/6] riscv: hwprobe: Report Zicbom and Zicboz " Radim Krčmář
2026-10-06 7:53 ` [PATCH 3/6] riscv: hwprobe: Report Zicfilp and Zicfiss " Radim Krčmář
2026-10-06 7:53 ` [PATCH 4/6] riscv: hwprobe: Report Supm " Radim Krčmář
2026-10-06 7:53 ` [PATCH 5/6] riscv: hwprobe: Report XTheadVector " Radim Krčmář
2026-10-06 23:54 ` Charlie Jenkins
2026-10-07 7:59 ` Radim Krčmář
2026-10-07 8:07 ` Charlie Jenkins [this message]
2026-10-06 7:53 ` [PATCH 6/6] riscv: hwprobe: Report SiFive vector extensions " Radim Krčmář
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