Re: [PATCH v2 1/5] arm64: dts: qcom: nord: Add PCIe PHY and controller nodes

[Shawn Guo <shengchao.guo@oss.qualcomm.com>]

On Mon, Oct 12, 2026 at 09:40:24AM +0200, Konrad Dybcio wrote:
> On 10/12/26 8:37 AM, Shawn Guo wrote:
> > On Mon, Oct 12, 2026 at 10:52:34AM +0530, Krishna Chaitanya Chundru wrote:
> >>
> >>
> >> On 10/10/2026 8:04 AM, Shawn Guo wrote:
> >>> On Tue, Sep 15, 2026 at 09:56:28AM +0800, Shawn Guo wrote:
> >>>> From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> 
> [...]
> 
> >>>> +		perst-pins {
> >>>> +			pins = "gpio2";
> >>>> +			function = "gpio";
> >>>> +			drive-strength = <2>;
> >>>> +			bias-disable;
> >>>> +		};
> >>> pcie0_clk_req_n is a SoC level pin function, so it has a good reason to
> >>> stay here. But wake and perst are board chosen GPIOs. I think they should
> >>> go to board DTS.
> >> Shawn, I don't see perst and wake gpios are changing per board, for that
> >> reason I added them here, but such requirement is coming we can move them to
> >> board file.
> > 
> > Well, we have only seen Ride and RRD so far. We never know how other Nord
> > based boards to come will choose the perst and wake GPIOs. This is
> > simply a board level configuration and should go to board dts.
> 
> They never do in practice (for a good reason, the reference-chosen pins are
> consecutive and presumably next to each other)

Ah, good point! That's indeed a good reason to keep PCIe perst and wake
GPIO in nord-embedded.dtsi along with clk_req_n.

Shawn

> and we have no occurences of
> that in the tree across the hundreds of devices.