Re: [PATCH v2 3/5] x86,fs/resctrl: Move MSR_IA32_L{2,3}_QOS_CFG scope property to x86 resource

[Chen Yu <chen.yu@linux.dev>]

Hi Reinette,

On Wed, Oct 07, 2026 at 02:06:45PM -0700, Reinette Chatre wrote:
> 
> MSR_IA32_L{2,3}_QOS_CFG enable code and data prioritization on x86. On
> Intel the registers have the scope of the associated cache while on AMD
> they have CPU scope. The scope is recorded as a property of the cache
> resource's control, of which each cache resource currently supports only
> one.
> 
> The scope of MSR_IA32_L{2,3}_QOS_CFG is only relevant to x86. Even so, the
> property is found among the resctrl filesystem's cache properties while only
> x86 code sets and reads it. Keeping the property with the cache control
> properties would also duplicate it across all controls of a resource when
> resources support multiple controls.
> 
> Make the scope of MSR_IA32_L{2,3}_QOS_CFG a property of the x86 hardware
> resource and name it for the registers it describes now that it no longer
> needs to be generic.
> 
> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>

[ ... ]

> @@ -140,6 +143,7 @@ struct rdt_hw_resource {
>  	unsigned int		mon_scale;
>  	unsigned int		mbm_width;
>  	bool			cdp_enabled;
> +	bool			qos_cfg_has_cpu_scope;
>  	bool			mbm_cntr_assign_enabled;
>  	bool			sdciae_enabled;
>  };

It seems that some flags are in resource scope, while others are in the controller's scope,
cache's flags are in the resource scope, MB's flags are in controller's scope, for example "linear".
For now, there is only one controller under the L2/L3 cache resource, so it might
not be duplicated if we keep qos_cfg_has_cpu_scope in the controller scope to keep consistence? Or do
you mean if in the future there are multiple controllers under this cache resource, all controllers'
flags (e.g., qos_cfg_has_cpu_scope) would still share the same value, so it is OK to put the flag in
the cache resource? If yes, the code looks good to me,

Review-by: Chen Yu <yu.c.chen@intel.com>

thanks,
Chenyu