From: Pranjal Shrivastava <praan@google.com>
To: Thomas Gleixner <tglx@kernel.org>
Cc: iommu@lists.linux.dev, Will Deacon <will@kernel.org>,
Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
Mostafa Saleh <smostafa@google.com>,
Nicolin Chen <nicolinc@nvidia.com>,
Daniel Mentz <danielmentz@google.com>,
Ashish Mhetre <amhetre@nvidia.com>,
linux-arm-kernel@lists.infradead.org,
Radu Rendec <radu@rendec.net>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
rafael@kernel.org, Danilo Krummrich <dakr@kernel.org>,
driver-core@lists.linux.dev, sashiko-bot@kernel.org
Subject: Re: [PATCH v11 08/16] genirq/msi: Provide msi_device_domain_restore_msi_msgs()
Date: Mon, 19 Oct 2026 08:19:18 +0000 [thread overview]
Message-ID: <atXShi9ReURhBmdB@google.com> (raw)
In-Reply-To: <8733u8eygy.ffs@fw13>
On Wed, Oct 14, 2026 at 11:58:21PM +0200, Thomas Gleixner wrote:
> On Tue, Sep 29 2026 at 03:45, Pranjal Shrivastava wrote:
> > +void msi_device_domain_restore_msi_msgs(struct device *dev, unsigned int domid)
> > +{
> > + if (!dev->msi.data)
> > + return;
> > +
> > + guard(msi_descs_lock)(dev);
> > + struct irq_domain *domain = msi_get_device_domain(dev, domid);
> > +
> > + if (!domain || !irq_domain_is_msi_device(domain))
> > + return;
> > +
> > + struct xarray *xa = &dev->msi.data->__domains[domid].store;
> > + struct msi_domain_info *info = domain->host_data;
> > + struct msi_desc *msi_desc;
> > + unsigned long idx;
> > +
> > + xa_for_each_range(xa, idx, msi_desc, 0, info->hwsize - 1) {
> > + /* Only handle MSI entries which have an interrupt associated */
> > + if (!msi_desc_match(msi_desc, MSI_DESC_ASSOCIATED))
> > + continue;
> > +
> > + scoped_irqdesc_get_and_buslock(msi_desc->irq, 0) {
> > + struct irq_data *data = irq_desc_get_irq_data(scoped_irqdesc);
> > + struct msi_msg msg = msi_desc->msg;
> > +
> > + if (data->chip)
> > + irq_chip_write_msi_msg(data, &msg);
> > + }
> > + }
>
> In this case sashiko is wrong:
>
> > [Severity: Critical]
> > Will this result in a NULL pointer dereference in hierarchical IRQ domains?
> >
> > Since irq_desc_get_irq_data() retrieves the top-level irq_data, data->chip
> > points to the top-level irq_chip. In hierarchical IRQ domains, the top-level
> > irq_chip typically does not implement the irq_write_msi_msg callback.
> >
> > When this top-level irq_data is passed to irq_chip_write_msi_msg(), it will
> > dereference a NULL function pointer:
>
> All MSI top level (device) domains implement the irq_write_msi_msg()
> callback. That's the whole point of the top level MSI domain as that's
> the one which has access to the device and the associated message store.
>
Ack, I can try folding this into a comment to avoid sashiko reporting
this multiple time in the v12.
Thanks,
Praan
next prev parent reply other threads:[~2026-10-19 8:19 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 3:44 [PATCH v11 00/16] iommu/arm-smmu-v3: Implement Runtime/System Sleep ops Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 01/16] iommu/arm-smmu-v3: Refactor arm_smmu_setup_irqs Pranjal Shrivastava
2026-10-07 14:06 ` Will Deacon
2026-09-29 3:44 ` [PATCH v11 02/16] iommu/arm-smmu-v3: Add Q_POS() macro Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 03/16] iommu/arm-smmu-v3: Add arm_smmu_drain_queue() helper Pranjal Shrivastava
2026-09-30 18:24 ` Nicolin Chen
2026-09-30 20:17 ` Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 04/16] iommu/tegra241-cmdqv: Add a helper to drain VCMDQs Pranjal Shrivastava
2026-09-29 3:44 ` [PATCH v11 05/16] iommu/arm-smmu-v3: Add a helper to drain cmd queues Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 06/16] iommu/tegra241-cmdqv: Restore PROD and CONS after resume Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 07/16] genirq/msi: Cache MSI message in irq_chip_write_msi_msg() Pranjal Shrivastava
2026-10-14 21:52 ` Thomas Gleixner
2026-10-19 8:18 ` Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 08/16] genirq/msi: Provide msi_device_domain_restore_msi_msgs() Pranjal Shrivastava
2026-10-14 21:58 ` Thomas Gleixner
2026-10-19 8:19 ` Pranjal Shrivastava [this message]
2026-09-29 3:45 ` [PATCH v11 09/16] iommu/arm-smmu-v3: Restore MSI config on resume Pranjal Shrivastava
2026-10-07 14:07 ` Will Deacon
2026-09-29 3:45 ` [PATCH v11 10/16] iommu/arm-smmu-v3: Factor out arm_smmu_handle_gerror() Pranjal Shrivastava
2026-09-30 18:34 ` Nicolin Chen
2026-09-30 20:00 ` Pranjal Shrivastava
2026-09-30 20:12 ` Nicolin Chen
2026-09-30 20:03 ` Pranjal Shrivastava
2026-10-07 14:07 ` Will Deacon
2026-09-29 3:45 ` [PATCH v11 11/16] iommu/arm-smmu-v3: Add CMDQ_PROD_STOP_FLAG to gate CMDQ submissions Pranjal Shrivastava
2026-09-30 20:33 ` Nicolin Chen
2026-10-01 5:40 ` Pranjal Shrivastava
2026-10-01 18:03 ` Nicolin Chen
2026-10-02 16:47 ` Jason Gunthorpe
2026-10-02 21:11 ` Pranjal Shrivastava
2026-10-06 17:26 ` Nicolin Chen
2026-10-17 17:49 ` Jason Gunthorpe
2026-10-17 18:16 ` Nicolin Chen
2026-10-19 8:06 ` Pranjal Shrivastava
2026-10-19 8:02 ` Pranjal Shrivastava
2026-10-07 14:08 ` Will Deacon
2026-10-13 11:35 ` Robin Murphy
2026-10-19 8:28 ` Pranjal Shrivastava
2026-10-19 8:24 ` Pranjal Shrivastava
2026-10-19 8:25 ` Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 12/16] iommu/tegra241-cmdqv: Add a helper to quiesce VCMDQs Pranjal Shrivastava
2026-09-30 19:02 ` Nicolin Chen
2026-09-30 19:57 ` Pranjal Shrivastava
2026-09-30 20:03 ` Nicolin Chen
2026-09-29 3:45 ` [PATCH v11 13/16] iommu/arm-smmu-v3: Implement pm_runtime & system sleep ops Pranjal Shrivastava
2026-10-01 20:22 ` Nicolin Chen
2026-10-07 14:08 ` Will Deacon
2026-09-29 3:45 ` [PATCH v11 14/16] iommu/arm-smmu-v3: Enable pm_runtime and setup devlinks Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 15/16] iommu/arm-smmu-v3: Invoke pm_runtime before hw access Pranjal Shrivastava
2026-09-29 3:45 ` [PATCH v11 16/16] iommu/arm-smmu-v3: Add KUnit unit tests for Runtime PM Pranjal Shrivastava
2026-10-01 19:12 ` Nicolin Chen
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