From: Frank Li <Frank.li@oss.nxp.com>
To: Diogo Ivo <diogo.ivo.sx@renesas.com>
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>,
Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Frank Li <Frank.Li@nxp.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Linus Walleij <linusw@kernel.org>,
linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 3/8] dt-bindings: i3c: renesas,i3c: Add RZ/G3L support
Date: Tue, 20 Oct 2026 15:23:04 -0400 [thread overview]
Message-ID: <ate_mAihhY_Squlr@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20261020-divo-ssgrlpcsrc-2966-i3c-v1-3-30a47f25e515@renesas.com>
On Tue, Oct 20, 2026 at 10:14:57AM +0100, Diogo Ivo wrote:
> Add support for the I3C Bus Interface on the Renesas RZ/G3L (R9A08G046)
> SoC. In this SoC, the controller has no HDR Exit Pattern detection
> interrupt and no SFRs clock, so constrain its number of interrupts to 16
> and the number of clocks to 2.
>
> Signed-off-by: Diogo Ivo <diogo.ivo.sx@renesas.com>
> ---
Reviewed-by: Frank Li <Frank.Li@nxp.com>
> Documentation/devicetree/bindings/i3c/renesas,i3c.yaml | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml b/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml
> index a20d875086d4..08fcea89a015 100644
> --- a/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml
> +++ b/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml
> @@ -16,6 +16,7 @@ properties:
> - items:
> - enum:
> - renesas,r9a08g045-i3c # RZ/G3S
> + - renesas,r9a08g046-i3c # RZ/G3L
> - renesas,r9a09g047-i3c # RZ/G3E
> - items:
> - enum:
> @@ -125,6 +126,22 @@ allOf:
> interrupt-names:
> minItems: 17
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a08g046-i3c
> + then:
> + properties:
> + clocks:
> + maxItems: 2
> + clock-names:
> + maxItems: 2
> + interrupts:
> + maxItems: 16
> + interrupt-names:
> + maxItems: 16
> +
> - if:
> properties:
> compatible:
>
> --
> 2.56.0
>
next prev parent reply other threads:[~2026-10-20 19:23 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-20 9:14 [PATCH 0/8] i3c: renesas: " Diogo Ivo
2026-10-20 9:14 ` [PATCH 1/8] i3c: renesas: Fix zero I2C SCL rate on pure I3C buses Diogo Ivo
2026-10-20 9:27 ` Geert Uytterhoeven
2026-10-20 14:13 ` Diogo Ivo
2026-10-23 10:27 ` Wolfram Sang
2026-10-23 15:04 ` Diogo Ivo
2026-10-20 9:14 ` [PATCH 2/8] i3c: renesas: Drop comma after OF match table sentinel Diogo Ivo
2026-10-20 19:20 ` Frank Li
2026-10-23 10:27 ` Wolfram Sang
2026-10-20 9:14 ` [PATCH 3/8] dt-bindings: i3c: renesas,i3c: Add RZ/G3L support Diogo Ivo
2026-10-20 19:23 ` Frank Li [this message]
2026-10-23 8:27 ` Krzysztof Kozlowski
2026-10-20 9:14 ` [PATCH 4/8] i3c: renesas: " Diogo Ivo
2026-10-20 19:29 ` Frank Li
2026-10-23 8:28 ` Krzysztof Kozlowski
2026-10-23 10:45 ` Wolfram Sang
2026-10-23 11:01 ` Biju Das
2026-10-23 11:25 ` Krzysztof Kozlowski
2026-10-23 15:08 ` Diogo Ivo
2026-10-20 9:14 ` [PATCH 5/8] clk: renesas: r9a08g046: Add I3C clocks and resets Diogo Ivo
2026-10-20 9:15 ` [PATCH 6/8] pinctrl: renesas: rzg2l: Split SoC-specific masks in struct rzg2l_register_masks Diogo Ivo
2026-10-20 9:15 ` [PATCH 7/8] pinctrl: renesas: rzg2l: Add RZ/G3L support for selecting I3C power source Diogo Ivo
2026-10-20 9:15 ` [PATCH 8/8] arm64: dts: renesas: r9a08g046: Add I3C support Diogo Ivo
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