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From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: "Cosmin Tanislav" <cosmin-gabriel.tanislav.xa@renesas.com>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"Andy Shevchenko" <andy@kernel.org>,
	"David Lechner" <dlechner@baylibre.com>,
	"Nuno Sá" <nuno.sa@analog.com>, "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Prabhakar <prabhakar.csengg+renesas@gmail.com>,
	"Biju Das" <biju.das.jz@bp.renesas.com>,
	"Fabrizio Castro" <fabrizio.castro.jz@renesas.com>,
	"Lad Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v3 8/8] iio: adc: rzt2h: Add support for RZ/V2H(P) SoC
Date: Sat, 24 Oct 2026 13:38:27 +0300	[thread overview]
Message-ID: <atyKo0pTYZyt5XJc@ashevche-desk.local> (raw)
In-Reply-To: <20261023175919.160103-9-prabhakar.mahadev-lad.rj@bp.renesas.com>

On Fri, Oct 23, 2026 at 06:59:19PM +0100, Prabhakar wrote:

> Add support for the ADC found on the Renesas RZ/V2H(P) SoC, which shares
> the RZ/T2H ADC IP but differs in channel count, sampling, calibration and
> resolution support.
> 
> The RZ/V2H(P) ADC provides 8 channels, has a fixed conversion time of
> 20 ADCLK cycles, does not support calibration, and supports selectable
> 12-bit and 8-bit conversion resolution.
> 
> Expose the fixed sampling frequency as a read-only attribute and allow
> the conversion resolution to be changed through the scale attribute.
> Use extended scan types so the reported scan type follows the selected
> resolution, and prevent resolution changes while buffered capture is
> active.

...

> +static int rzt2h_adc_write_scale(struct iio_dev *indio_dev,
> +				 struct iio_chan_spec const *chan,
> +				 int val, int val2)
> +{
> +	struct rzt2h_adc *adc = iio_priv(indio_dev);
> +	u64 req_scale, scale;
> +	unsigned int i;
> +
> +	if (!(adc->chip_info->features & RZT2H_ADC_FEATURE_RES_SELECT))
> +		return -EINVAL;
> +
> +	req_scale = mul_u32_u32(val, NANO) + val2;

But what's wrong with the simple 1ULL * val * NANO?

> +	for (i = 0; i < chan->num_ext_scan_type; i++) {
> +		scale = mul_u32_u32(RZT2H_ADC_VREF_mV, NANO) >>

Similar Q.

> +			chan->ext_scan_type[i].realbits;
> +		if (scale == req_scale)
> +			break;
> +	}
> +	if (i == chan->num_ext_scan_type)
> +		return -EINVAL;
> +
> +	/* The scan type changes with the resolution. */
> +	IIO_DEV_ACQUIRE_DIRECT_MODE(indio_dev, claim);
> +	if (IIO_DEV_ACQUIRE_FAILED(claim))
> +		return -EBUSY;
> +
> +	adc->resolution = i;
> +
> +	return 0;
> +}

-- 
With Best Regards,
Andy Shevchenko



  reply	other threads:[~2026-10-24 10:38 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-23 17:59 [PATCH v3 0/8] Add ADC driver support for RZ/V2H(P) and RZ/V2N SoCs Prabhakar
2026-10-23 17:59 ` [PATCH v3 1/8] dt-bindings: iio: adc: renesas,r9a09g077-adc: Add RZ/V2H(P) and RZ/V2N support Prabhakar
2026-10-23 17:59 ` [PATCH v3 2/8] iio: adc: rzt2h: Wait for the analog part to stop after a forced stop Prabhakar
2026-10-23 17:59 ` [PATCH v3 3/8] iio: adc: rzt2h: Add chip-specific configuration Prabhakar
2026-10-23 17:59 ` [PATCH v3 4/8] iio: adc: rzt2h: Add optional reset support Prabhakar
2026-10-23 17:59 ` [PATCH v3 5/8] iio: adc: rzt2h: Prepare for SoCs without sample state registers Prabhakar
2026-10-23 17:59 ` [PATCH v3 6/8] iio: adc: rzt2h: Prepare for SoCs with different ADC info Prabhakar
2026-10-23 20:45   ` Jonathan Cameron
2026-10-23 17:59 ` [PATCH v3 7/8] iio: adc: rzt2h: Use scan type for ADC scale Prabhakar
2026-10-23 17:59 ` [PATCH v3 8/8] iio: adc: rzt2h: Add support for RZ/V2H(P) SoC Prabhakar
2026-10-24 10:38   ` Andy Shevchenko [this message]
2026-10-23 20:49 ` [PATCH v3 0/8] Add ADC driver support for RZ/V2H(P) and RZ/V2N SoCs Jonathan Cameron

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