From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Sascha Bischoff <sascha.bischoff@arm.com>
Cc: Marc Zyngier <maz@kernel.org>, Thomas Gleixner <tglx@kernel.org>,
Radu Rendec <radu@rendec.net>,
Timothy Hayes <timothy.hayes@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Jonathan Cameron <jic23@kernel.org>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH 06/10] irqchip/gic-v5: Honour ACPI ITS noncoherent flag
Date: Mon, 2 Nov 2026 15:13:02 +0100 [thread overview]
Message-ID: <auiabr1U4c9C7FwL@red-moon> (raw)
In-Reply-To: <20261102-host_gicv5_fixes-v1-6-743b61626fc5@arm.com>
On Mon, Nov 02, 2026 at 01:32:59PM +0000, Sascha Bischoff wrote:
> The ACPI ITS probe passes its noncoherent flag to
> gicv5_its_init_bases(), but the common initializer checks a DT
> property instead. For an ACPI ITS, this always selects coherent cache
> settings and skips the cache maintenance required for its tables.
>
> Use the noncoherent argument, which both firmware paths already
> supply.
>
> Fixes: a97efa5ba5946 ("irqchip/gic-v5: Add ACPI ITS probing")
> Cc: stable@vger.kernel.org
> Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
> ---
> drivers/irqchip/irq-gic-v5-its.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-gic-v5-its.c b/drivers/irqchip/irq-gic-v5-its.c
> index 866c238f08dfe..c5d057f713134 100644
> --- a/drivers/irqchip/irq-gic-v5-its.c
> +++ b/drivers/irqchip/irq-gic-v5-its.c
> @@ -1135,7 +1135,7 @@ static int __init gicv5_its_init_bases(void __iomem *its_base, struct fwnode_han
> goto out_free_node;
> }
>
> - if (of_property_read_bool(np, "dma-noncoherent")) {
> + if (noncoherent) {
Bah. This is a very stupid thinko. Apologies.
Acked-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
> /*
> * A non-coherent ITS implies that some cache levels cannot be
> * used coherently by the cores and GIC. Our only option is to mark
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2026-11-02 14:13 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-02 13:32 [PATCH 00/10] irqchip/gic-v5: Fix misc IRS and ITS host driver issues Sascha Bischoff
2026-11-02 13:32 ` [PATCH 01/10] irqchip/gic-v5: Reject SPIs not backed by an IRS Sascha Bischoff
2026-11-02 13:50 ` Lorenzo Pieralisi
2026-11-02 13:32 ` [PATCH 02/10] irqchip/gic-v5: Only set IRS DPS when 1ofN routing is supported Sascha Bischoff
2026-11-02 14:00 ` Lorenzo Pieralisi
2026-11-02 13:32 ` [PATCH 03/10] irqchip/gic-v5: Serialise IRS synchronisation requests Sascha Bischoff
2026-11-02 13:32 ` [PATCH 04/10] irqchip/gic-v5: Serialise ITS invalidation commands Sascha Bischoff
2026-11-02 15:56 ` Lorenzo Pieralisi
2026-11-02 13:32 ` [PATCH 05/10] irqchip/gic-v5: Use linear DT and ITT when L2 covers all IDs Sascha Bischoff
2026-11-02 13:32 ` [PATCH 06/10] irqchip/gic-v5: Honour ACPI ITS noncoherent flag Sascha Bischoff
2026-11-02 14:13 ` Lorenzo Pieralisi [this message]
2026-11-02 13:33 ` [PATCH 07/10] irqchip/gic-v5: Use firmware node name in ITS warning Sascha Bischoff
2026-11-02 14:21 ` Lorenzo Pieralisi
2026-11-02 13:33 ` [PATCH 08/10] irqchip/gic-v5: Invalidate ITS device cache before freeing ITT Sascha Bischoff
2026-11-02 15:22 ` Lorenzo Pieralisi
2026-11-02 13:33 ` [PATCH 09/10] irqchip/gic-v5: Clean the allocated linear device table size Sascha Bischoff
2026-11-02 14:46 ` Lorenzo Pieralisi
2026-11-02 13:33 ` [PATCH 10/10] irqchip/gic-v5: Release ITS MMIO region on DT probe failure Sascha Bischoff
2026-11-02 14:54 ` Lorenzo Pieralisi
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