Re: [PATCH v2] MIPS: Cobalt: Include legacy IDE ports in the PCI I/O window

[Thomas Bogendoerfer <tsbogend@alpha.franken.de>]

On Thu, Oct 22, 2026 at 09:31:00AM -0700, Florian Fainelli wrote:
> The Cobalt PCI I/O window starts at 0x1000, excluding the VIA IDE
> controller's fixed compatibility-mode ports at 0x170, 0x1f0, 0x376 and
> 0x3f6. Since pcibios_enable_device() was converted to
> pci_enable_resources(), these unclaimed resources cause pata_via to
> fail to probe with -EINVAL.
> 
> Start the PCI I/O window at zero to cover the southbridge legacy ports,
> retaining 0x1000 as the allocation minimum via PCIBIOS_MIN_IO. Register
> the PCI controller from plat_mem_setup(), before the VIA reservations
> and i8259 initialization, so the legacy resources do not conflict with
> the host bridge window and prevent PCI bus scanning.
> 
> Keep the VIA resource reservations in plat_mem_setup() after the PCI
> controller registration and use insert_resource() to nest them beneath
> the PCI window. The i8259 and RTC resources are also claimed beneath it.
> 
> Boot-tested on a Qube2 with a MIPS64 kernel. All seven PCI functions
> enumerate, both tulip devices bind, and pata_via initializes both ATA
> hosts and detects the ST380012A 80 GB disk. All 18 boot checks pass,
> including a read-only disk test and Ethernet ping.
> 
> Fixes: ae81aad5c2e1 ("MIPS: PCI: Use pci_enable_resources()")
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
> Changes in v2:
> 
> - implement Maciej's suggestion to reserve PCI resources first
>   and then the rest of the peripherals
> 
>  arch/mips/cobalt/pci.c                     | 11 +++++------
>  arch/mips/cobalt/setup.c                   |  4 +++-
>  arch/mips/include/asm/mach-cobalt/cobalt.h |  1 +
>  3 files changed, 9 insertions(+), 7 deletions(-)

applied to mips-next

Thomas.

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