From: Lorenzo Bianconi <lorenzo@kernel.org>
To: John Crispin <john@phrozen.org>
Cc: Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Ahmed Naseef <naseefkm@gmail.com>,
Benjamin Larsson <benjamin.larsson@genexis.eu>,
Christian Marangi <ansuelsmth@gmail.com>,
devicetree@vger.kernel.org, lei.dong@airoha.com,
Linqi.zhang@airoha.com, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
mfd@lists.linux.dev,
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>,
Rajeev.kumar@airoha.com, upstream@airoha.com,
Weifeng.xu@airoha.com, zhengping.zhang@airoha.com
Subject: Re: [PATCH 3/7] pinctrl: airoha: make the chip SCU optional
Date: Wed, 11 Nov 2026 12:27:53 +0100 [thread overview]
Message-ID: <avRROTmy9oFLwJCS@lore-desk> (raw)
In-Reply-To: <20261110173941.301478-4-john@phrozen.org>
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> A SoC that muxes every pin through the IOMUX block and describes no
> pin configuration has no use for the chip SCU. Skip the lookup when
> the match data names no chip SCU compatible, instead of handing a
> NULL compatible to syscon_regmap_lookup_by_compatible().
>
> No functional change for the existing SoCs, which all name one.
>
> Signed-off-by: John Crispin <john@phrozen.org>
> ---
> drivers/pinctrl/airoha/pinctrl-airoha.c | 25 +++++++++++++++++++------
> 1 file changed, 19 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
> index f9ae4020b764..9116d3ded258 100644
> --- a/drivers/pinctrl/airoha/pinctrl-airoha.c
> +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
> @@ -833,6 +833,22 @@ static const struct pinctrl_ops airoha_pctlops = {
> .dt_free_map = pinconf_generic_dt_free_map,
> };
>
> +static struct regmap *
> +airoha_pinctrl_chip_scu(struct device *dev,
> + const struct airoha_pinctrl_match_data *data)
> +{
> + struct regmap *map;
> +
> + if (!data->chip_scu_compatible)
> + return NULL;
should you move this check after the first lookup?
Regards,
Lorenzo
> +
> + map = syscon_regmap_lookup_by_phandle(dev->of_node, "airoha,chip-scu");
> + if (!IS_ERR_OR_NULL(map))
> + return map;
> +
> + return syscon_regmap_lookup_by_compatible(data->chip_scu_compatible);
> +}
> +
> int airoha_pinctrl_probe(struct platform_device *pdev)
> {
> const struct airoha_pinctrl_match_data *data;
> @@ -853,12 +869,9 @@ int airoha_pinctrl_probe(struct platform_device *pdev)
> if (IS_ERR(pinctrl->regmap))
> return PTR_ERR(pinctrl->regmap);
>
> - map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "airoha,chip-scu");
> - if (IS_ERR_OR_NULL(map)) {
> - map = syscon_regmap_lookup_by_compatible(data->chip_scu_compatible);
> - if (IS_ERR(map))
> - return PTR_ERR(map);
> - }
> + map = airoha_pinctrl_chip_scu(dev, data);
> + if (IS_ERR(map))
> + return PTR_ERR(map);
>
> pinctrl->chip_scu = map;
>
> --
> 2.34.1
>
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next prev parent reply other threads:[~2026-11-11 11:27 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 17:39 [PATCH 0/7] pinctrl: airoha: add AN7589 support John Crispin
2026-11-10 17:39 ` [PATCH 1/7] pinctrl: airoha: make gpio register layout per SoC John Crispin
2026-11-11 11:22 ` Lorenzo Bianconi
2026-11-10 17:39 ` [PATCH 2/7] pinctrl: airoha: add per pin mode field mux John Crispin
2026-11-10 17:39 ` [PATCH 3/7] pinctrl: airoha: make the chip SCU optional John Crispin
2026-11-11 11:27 ` Lorenzo Bianconi [this message]
2026-11-10 17:39 ` [PATCH 4/7] pinctrl: airoha: mux a requested GPIO through the IOMUX John Crispin
2026-11-10 17:39 ` [PATCH 5/7] dt-bindings: pinctrl: airoha: add AN7589 John Crispin
2026-11-10 18:27 ` Conor Dooley
2026-11-10 17:39 ` [PATCH 6/7] pinctrl: airoha: move the GPIO register offsets to the common header John Crispin
2026-11-11 11:29 ` Lorenzo Bianconi
2026-11-10 17:39 ` [PATCH 7/7] pinctrl: airoha: add support of an7589 SoC John Crispin
2026-11-11 11:32 ` Lorenzo Bianconi
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