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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Kuogee Hsieh <quic_khsieh@quicinc.com>,
	dri-devel@lists.freedesktop.org, robdclark@gmail.com,
	sean@poorly.run, swboyd@chromium.org, dianders@chromium.org,
	vkoul@kernel.org, daniel@ffwll.ch, airlied@gmail.com,
	agross@kernel.org, andersson@kernel.org
Cc: quic_abhinavk@quicinc.com, quic_jesszhan@quicinc.com,
	quic_sbillaka@quicinc.com, marijn.suijten@somainline.org,
	freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 2/8] drm/msm/dpu: add DPU_PINGPONG_DSC feature bit for DPU < 7.0.0
Date: Fri, 12 May 2023 21:17:20 +0300	[thread overview]
Message-ID: <bbdef42d-1458-9acc-9233-d9a63d92d7bc@linaro.org> (raw)
In-Reply-To: <1683914423-17612-3-git-send-email-quic_khsieh@quicinc.com>

On 12/05/2023 21:00, Kuogee Hsieh wrote:
> DPU < 7.0.0 requires the PINGPONG block to be involved during
> DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC
> encoder engine was moved to INTF with the help of the flush mechanism.
> Add a DPU_PINGPONG_DSC feature bit to restrict the availability of
> dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the
> PINGPONG block to DPU < 7.0.0 hardware, as the registers are not
> available [in the PINGPONG block] on DPU 7.0.0 and higher anymore.
> Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, PINGPONG_SDM845_TE2_MASK
> and PINGPONG_SM8150_MASK which is used for all DPU < 7.0 chipsets.
> 
> changes in v6:
> -- split patches and rearrange to keep catalog related files at this patch
> 
> changes in v7:
> -- rewording commit text as suggested at review comments
> 
> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

Single nit below

> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +++-
>   2 files changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 82b58c6..78e4bf6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -76,13 +76,13 @@
>   	(BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
>   
>   #define PINGPONG_SDM845_MASK \
> -	(BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE))
> +	(BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC))
>   
>   #define PINGPONG_SDM845_TE2_MASK \
> -	(PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2))
> +	(PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2) | BIT(DPU_PINGPONG_DSC))
>   
>   #define PINGPONG_SM8150_MASK \
> -	(BIT(DPU_PINGPONG_DITHER))
> +	(BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC))
>   
>   #define CTL_SC7280_MASK \
>   	(BIT(DPU_CTL_ACTIVE_CFG) | \
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> index 6ee48f0..dc0a4da 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
> @@ -144,7 +144,8 @@ enum {
>    * @DPU_PINGPONG_TE2        Additional tear check block for split pipes
>    * @DPU_PINGPONG_SPLIT      PP block supports split fifo
>    * @DPU_PINGPONG_SLAVE      PP block is a suitable slave for split fifo
> - * @DPU_PINGPONG_DITHER,    Dither blocks
> + * @DPU_PINGPONG_DITHER     Dither blocks

Ideally this should be a separate commit. It is irrelevant to 
DPU_PINGPONG_DSC

> + * @DPU_PINGPONG_DSC        PP ops functions required for DSC
>    * @DPU_PINGPONG_MAX
>    */
>   enum {
> @@ -153,6 +154,7 @@ enum {
>   	DPU_PINGPONG_SPLIT,
>   	DPU_PINGPONG_SLAVE,
>   	DPU_PINGPONG_DITHER,
> +	DPU_PINGPONG_DSC,
>   	DPU_PINGPONG_MAX
>   };
>   

-- 
With best wishes
Dmitry


  reply	other threads:[~2023-05-12 18:17 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-12 18:00 [PATCH v8 0/8] add DSC 1.2 dpu supports Kuogee Hsieh
2023-05-12 18:00 ` [PATCH v8 1/8] drm/msm/dpu: add dsc blocks for remaining chipsets in catalog Kuogee Hsieh
2023-05-14 21:39   ` Marijn Suijten
2023-05-15 18:20     ` Abhinav Kumar
2023-05-15 20:07       ` Marijn Suijten
2023-05-15 20:58         ` Abhinav Kumar
2023-05-15 21:23           ` Marijn Suijten
2023-05-15 21:26             ` Abhinav Kumar
2023-05-12 18:00 ` [PATCH v8 2/8] drm/msm/dpu: add DPU_PINGPONG_DSC feature bit for DPU < 7.0.0 Kuogee Hsieh
2023-05-12 18:17   ` Dmitry Baryshkov [this message]
2023-05-13 19:26   ` Marijn Suijten
2023-05-12 18:00 ` [PATCH v8 3/8] drm/msm/dpu: test DPU_PINGPONG_DSC bit before assign DSC ops to PINGPONG Kuogee Hsieh
2023-05-14 21:43   ` Marijn Suijten
2023-05-12 18:00 ` [PATCH v8 4/8] drm/msm/dpu: Introduce PINGPONG_NONE to disconnect DSC from PINGPONG Kuogee Hsieh
2023-05-12 18:00 ` [PATCH v8 5/8] drm/msm/dpu: add support for DSC encoder v1.2 engine Kuogee Hsieh
2023-05-12 18:19   ` Dmitry Baryshkov
2023-05-12 20:48     ` Kuogee Hsieh
2023-05-12 21:04       ` Dmitry Baryshkov
2023-05-14 21:46     ` Marijn Suijten
2023-05-15 17:46       ` Kuogee Hsieh
2023-05-15 18:08         ` Dmitry Baryshkov
2023-05-15 20:11         ` Marijn Suijten
2023-05-14 22:18   ` Marijn Suijten
2023-05-15 17:06     ` Kuogee Hsieh
2023-05-15 20:17       ` Marijn Suijten
2023-05-15 17:36     ` Kuogee Hsieh
2023-05-12 18:00 ` [PATCH v8 6/8] drm/msm/dpu: separate DSC flush update out of interface Kuogee Hsieh
2023-05-12 18:21   ` Dmitry Baryshkov
2023-05-12 18:47     ` Abhinav Kumar
2023-05-12 18:50       ` Dmitry Baryshkov
2023-05-12 19:05         ` Abhinav Kumar
2023-05-15 21:52   ` Marijn Suijten
2023-05-12 18:00 ` [PATCH v8 7/8] drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets Kuogee Hsieh
2023-05-15 21:21   ` Marijn Suijten
2023-05-15 22:03     ` Abhinav Kumar
2023-05-15 22:10       ` [Freedreno] " Abhinav Kumar
2023-05-15 22:23       ` Marijn Suijten
2023-05-15 23:58         ` Abhinav Kumar
2023-05-15 21:24   ` Marijn Suijten
2023-05-12 18:00 ` [PATCH v8 8/8] drm/msm/dpu: tear down DSC data path when DSC disabled Kuogee Hsieh
2023-05-14 21:31 ` [PATCH v8 0/8] add DSC 1.2 dpu supports Marijn Suijten

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