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From: Julien Thierry <julien.thierry@arm.com>
To: Suzuki K Poulose <Suzuki.Poulose@arm.com>,
	linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org,
	joel@joelfernandes.org, marc.zyngier@arm.com,
	mark.rutland@arm.com, christoffer.dall@arm.com,
	james.morse@arm.com, catalin.marinas@arm.com,
	will.deacon@arm.com
Subject: Re: [PATCH v4 02/26] arm64: cpufeature: Add cpufeature for IRQ priority masking
Date: Tue, 12 Jun 2018 14:46:38 +0100	[thread overview]
Message-ID: <bc8bb69d-8db4-87b7-adfb-589e1dd905c0@arm.com> (raw)
In-Reply-To: <acf4b44f-d5c7-c31a-7f47-cfbe1049eadc@arm.com>



On 25/05/18 11:48, Julien Thierry wrote:
> 
> 
> On 25/05/18 11:41, Suzuki K Poulose wrote:
>> On 25/05/18 11:39, Julien Thierry wrote:
>>>
>>>
>>> On 25/05/18 11:36, Suzuki K Poulose wrote:
>>>> On 25/05/18 11:17, Julien Thierry wrote:
>>>>>
>>>>>
>>>>> On 25/05/18 11:04, Suzuki K Poulose wrote:
>>>>>> On 25/05/18 10:49, Julien Thierry wrote:
>>>>>>> Add a cpufeature indicating whether a cpu supports masking 
>>>>>>> interrupts
>>>>>>> by priority.
>>>>>>
>>>>>> How is this different from the SYSREG_GIC_CPUIF cap ? Is it just
>>>>>> the description ?
>>>>>
>>>>> More or less.
>>>>>
>>>>> It is just to have an easier condition in the rest of the series. 
>>>>> Basically the PRIO masking feature is enabled if we have a GICv3 
>>>>> CPUIF working *and* the option was selected at build time. Before 
>>>>> this meant that I was checking for the GIC_CPUIF cap inside #ifdefs 
>>>>> (and putting alternatives depending on that inside #ifdefs as well).
>>>>>
>>>>> Having this as a separate feature feels easier to manage in the 
>>>>> code. It also makes it clearer at boot time that the kernel will be 
>>>>> using irq priorities (although I admit it was not the initial 
>>>>> intention):
>>>>>
>>>>> [    0.000000] CPU features: detected: IRQ priority masking
>>>>>
>>>>>
>>>>> But yes that new feature will be detected only if SYSREG_GIC_CPUIF 
>>>>> gets detected as well.
>>>>
>>>> Well, you could always wrap the check like :
>>>>
>>>> static inline bool system_has_irq_priority_masking(void)
>>>> {
>>>>      return (IS_ENABLED(CONFIG_YOUR_CONFIG) && 
>>>> cpus_have_const_cap(HWCAP_SYSREG_GIC_CPUIF));
>>>> }
>>>>
>>>> and use it everywhere.
>>>>
>>>
>>> Yes, but I can't use that in the asm parts that use alternatives and 
>>> would need to surround them in #ifdef... :\
>>
>> I thought there is _ALTERNATIVE_CFG() to base the alternative depend 
>> on a CONFIG_xxx ?
>> Doesn't that solve the problem ?
> 
> Right, I didn't see that one. It should work yes.
> 
> I'll try that when working on the next version.

I've been trying to use this now, but I can't figure out how.

The _ALTERNATIVE_CFG does not seem to work in assembly code (despite 
having its own definition for __ASSEMBLY__), and the alternative_insn 
does not seem to be suited for instructions that take operands (or more 
than one operand)

If I am mistaken, can you provide an example of how to use this in 
assembly with instructions having more than 1 operand?

Cheers,

-- 
Julien Thierry

  reply	other threads:[~2018-06-12 13:46 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-25  9:49 [PATCH v4 00/26] arm64: provide pseudo NMI with GICv3 Julien Thierry
2018-05-25  9:49 ` [PATCH v4 01/26] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2018-05-25  9:49 ` [PATCH v4 02/26] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2018-05-25 10:04   ` Suzuki K Poulose
2018-05-25 10:17     ` Julien Thierry
2018-05-25 10:36       ` Suzuki K Poulose
2018-05-25 10:39         ` Julien Thierry
2018-05-25 10:41           ` Suzuki K Poulose
2018-05-25 10:48             ` Julien Thierry
2018-06-12 13:46               ` Julien Thierry [this message]
2018-06-15 10:16                 ` Suzuki K Poulose
2018-05-25  9:49 ` [PATCH v4 03/26] arm64: cpufeature: Use alternatives for VHE cpu_enable Julien Thierry
2018-05-25  9:49 ` [PATCH v4 04/26] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2018-05-25 10:00   ` Suzuki K Poulose
2018-05-25 10:25     ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 05/26] irqchip/gic: Unify GIC priority definitions Julien Thierry
2018-05-25  9:49 ` [PATCH v4 06/26] irqchip/gic: Lower priority of GIC interrupts Julien Thierry
2018-05-25  9:49 ` [PATCH v4 07/26] irqchip/gic-v3: Remove acknowledge loop Julien Thierry
2018-05-25  9:49 ` [PATCH v4 08/26] arm64: daifflags: Use irqflags functions for daifflags Julien Thierry
2018-05-25  9:49 ` [PATCH v4 09/26] arm64: Use daifflag_restore after bp_hardening Julien Thierry
2018-05-25  9:49 ` [PATCH v4 10/26] arm64: Delay daif masking for user return Julien Thierry
2018-05-25  9:49 ` [PATCH v4 11/26] arm64: Make PMR part of task context Julien Thierry
2018-05-25  9:49 ` [PATCH v4 12/26] arm64: Unmask PMR before going idle Julien Thierry
2018-05-25  9:49 ` [PATCH v4 13/26] arm/arm64: gic-v3: Add helper functions to manage IRQ priorities Julien Thierry
2018-05-25  9:49 ` [PATCH v4 14/26] arm64: kvm: Unmask PMR before entering guest Julien Thierry
2018-05-25  9:49 ` [PATCH v4 15/26] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2018-05-25  9:49 ` [PATCH v4 16/26] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2018-05-25  9:49 ` [PATCH v4 17/26] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2018-05-25  9:49 ` [PATCH v4 18/26] irqchip/gic-v3: Do not overwrite PMR value Julien Thierry
2018-05-25  9:49 ` [PATCH v4 19/26] irqchip/gic-v3: Switch to PMR masking after IRQ acknowledge Julien Thierry
2018-05-25  9:49 ` [PATCH v4 20/26] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2018-05-25  9:49 ` [PATCH v4 21/26] arm64: Add build option for IRQ masking via priority Julien Thierry
2018-05-25  9:49 ` [PATCH v4 22/26] arm64: Detect current view of GIC priorities Julien Thierry
2018-05-25  9:49 ` [PATCH v4 23/26] irqchip/gic: Add functions to access irq priorities Julien Thierry
2018-05-25  9:49 ` [PATCH v4 24/26] irqchip/gic-v3: Add base support for pseudo-NMI Julien Thierry
2018-06-13 11:14   ` Julien Thierry
2018-05-25  9:49 ` [PATCH v4 25/26] irqchip/gic-v3: Provide NMI handlers Julien Thierry
2018-05-25  9:49 ` [PATCH v4 26/26] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2018-06-13 11:07   ` Julien Thierry
2018-05-25 10:16 ` [PATCH v4 00/26] arm64: provide pseudo NMI with GICv3 Daniel Thompson
2018-05-25 10:40   ` Julien Thierry
2018-05-25 13:42     ` Julien Thierry
2018-07-20 15:09 ` Daniel Thompson
2018-07-23 12:39   ` Julien Thierry

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