From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Marc Zyngier <maz@kernel.org>, linux-arm-kernel@lists.infradead.org
Cc: leo.yan@linaro.org, catalin.marinas@arm.com,
Linu Cherian <lcherian@marvell.com>,
Will Deacon <will@kernel.org>,
coresight@lists.linaro.org, Peter Zilstra <peterz@infradead.org>,
anshuman.khandual@arm.com, mike.leach@linaro.org,
mathieu.poirier@linaro.org, linux-kernel@vger.kernel.org
Subject: Re: (subset) [PATCH v5 00/19] coresight: Add support for ETE and TRBE
Date: Tue, 23 Mar 2021 17:05:26 +0000 [thread overview]
Message-ID: <bd50ab75-19eb-1957-942a-f045e3df8a51@arm.com> (raw)
In-Reply-To: <161651726490.2050093.5536833570808361940.b4-ty@kernel.org>
On 23/03/2021 16:34, Marc Zyngier wrote:
> On Tue, 23 Mar 2021 12:06:28 +0000, Suzuki K Poulose wrote:
>> This series enables future IP trace features Embedded Trace Extension
>> (ETE) and Trace Buffer Extension (TRBE). This series applies on
>> v5.12-rc4 + some patches queued. A standalone tree is also available here [0].
>> The queued patches (almost there) are included in this posting for
>> the sake of constructing a tree from the posting.
>>
>> ETE is the PE (CPU) trace unit for CPUs, implementing future
>> architecture extensions. ETE overlaps with the ETMv4 architecture, with
>> additions to support the newer architecture features and some restrictions
>> on the supported features w.r.t ETMv4. The ETE support is added by extending
>> the ETMv4 driver to recognise the ETE and handle the features as exposed by
>> the TRCIDRx registers. ETE only supports system instructions access from the
>> host CPU. The ETE could be integrated with a TRBE (see below), or with
>> the legacy CoreSight trace bus (e.g, ETRs). Thus the ETE follows same
>> firmware description as the ETMs and requires a node per instance.
>>
>> [...]
>
> Applied to fixes, thanks!
>
> [01/19] kvm: arm64: Hide system instruction access to Trace registers
> commit: 4af0afe252a2701732c317585f7c3ef6596b8f3d
>
Thanks Marc !
prev parent reply other threads:[~2021-03-23 17:06 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-23 12:06 Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 01/19] [Queued] kvm: arm64: Hide system instruction access to Trace registers Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 02/19] [Queued] kvm: arm64: Disable guest access to trace filter controls Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 03/19] perf: aux: Add flags for the buffer format Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 04/19] perf: aux: Add CoreSight PMU buffer formats Suzuki K Poulose
2021-03-29 16:56 ` Mathieu Poirier
2021-04-19 7:46 ` Peter Zijlstra
2021-03-23 12:06 ` [PATCH v5 05/19] arm64: Add support for trace synchronization barrier Suzuki K Poulose
2021-03-23 18:21 ` Catalin Marinas
2021-03-24 9:39 ` Suzuki K Poulose
2021-03-24 13:49 ` Marc Zyngier
2021-03-24 15:51 ` Suzuki K Poulose
2021-03-24 16:16 ` Marc Zyngier
2021-03-24 16:25 ` Suzuki K Poulose
2021-03-24 16:30 ` Marc Zyngier
2021-03-24 17:06 ` Suzuki K Poulose
2021-03-24 17:19 ` Catalin Marinas
2021-03-24 17:40 ` Marc Zyngier
2021-03-26 16:31 ` Mathieu Poirier
2021-03-23 12:06 ` [PATCH v5 06/19] arm64: Add TRBE definitions Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 07/19] arm64: kvm: Enable access to TRBE support for host Suzuki K Poulose
2021-03-26 16:55 ` Mathieu Poirier
2021-03-30 10:16 ` Marc Zyngier
2021-03-30 10:38 ` Suzuki K Poulose
2021-03-30 15:23 ` Mathieu Poirier
2021-03-30 15:34 ` Marc Zyngier
2021-03-30 15:35 ` Greg KH
2021-03-30 16:33 ` Mathieu Poirier
2021-03-30 16:47 ` Greg KH
2021-03-30 16:51 ` Mathieu Poirier
2021-03-30 10:12 ` Marc Zyngier
2021-03-30 11:12 ` Suzuki K Poulose
2021-03-30 12:15 ` Marc Zyngier
2021-03-30 13:34 ` Suzuki K Poulose
2021-03-30 14:00 ` Marc Zyngier
2021-03-31 15:28 ` Alexandru Elisei
2021-03-31 15:37 ` Marc Zyngier
2021-03-23 12:06 ` [PATCH v5 08/19] coresight: etm4x: Move ETM to prohibited region for disable Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 09/19] coresight: etm-perf: Allow an event to use different sinks Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 10/19] coresight: Do not scan for graph if none is present Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 11/19] coresight: etm4x: Add support for PE OS lock Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 12/19] coresight: ete: Add support for ETE tracing Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 13/19] dts: bindings: Document device tree bindings for ETE Suzuki K Poulose
2021-03-23 22:46 ` Rob Herring
2021-03-23 12:06 ` [PATCH v5 14/19] coresight: etm-perf: Handle stale output handles Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 15/19] coresight: core: Add support for dedicated percpu sinks Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 16/19] coresight: sink: Add TRBE driver Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 17/19] Documentation: coresight: trbe: Sysfs ABI description Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 18/19] Documentation: trace: Add documentation for TRBE Suzuki K Poulose
2021-03-23 12:06 ` [PATCH v5 19/19] dts: bindings: Document device tree bindings for Arm TRBE Suzuki K Poulose
2021-03-23 16:33 ` (subset) [PATCH v5 00/19] coresight: Add support for ETE and TRBE Marc Zyngier
2021-03-23 16:34 ` Marc Zyngier
2021-03-23 17:05 ` Suzuki K Poulose [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=bd50ab75-19eb-1957-942a-f045e3df8a51@arm.com \
--to=suzuki.poulose@arm.com \
--cc=anshuman.khandual@arm.com \
--cc=catalin.marinas@arm.com \
--cc=coresight@lists.linaro.org \
--cc=lcherian@marvell.com \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mathieu.poirier@linaro.org \
--cc=maz@kernel.org \
--cc=mike.leach@linaro.org \
--cc=peterz@infradead.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®