* [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR
@ 2024-12-30 7:11 Jing Zhang
2025-01-02 19:02 ` Liang, Kan
0 siblings, 1 reply; 6+ messages in thread
From: Jing Zhang @ 2024-12-30 7:11 UTC (permalink / raw)
To: Peter Zijlstra (Intel), Kan Liang, Ian Rogers, Arnaldo Carvalho de Melo
Cc: Shuai Xue, linux-perf-users, linux-kernel
perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL event
because of lack of ch_mask format in drivers, and perf test "104: perf
all PMU test (exclusive)" failed.
$perf stat -e perf stat -e UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL
sleep 1
Initial error:
event syntax error: 'UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL'
\___ unknown term 'ch_mask' for pmu 'uncore_cha_0'
104: perf all PMU test (exclusive) : FAILED!
Add ch_mask format for SPR to fix it.
Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
---
arch/x86/events/intel/uncore_snbep.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index ca98744..e537623 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -5967,6 +5967,7 @@ static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev
&format_attr_inv.attr,
&format_attr_thresh8.attr,
&format_attr_filter_tid5.attr,
+ &format_attr_ch_mask.attr,
NULL,
};
static const struct attribute_group spr_uncore_chabox_format_group = {
--
1.8.3.1
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR 2024-12-30 7:11 [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR Jing Zhang @ 2025-01-02 19:02 ` Liang, Kan 2025-01-06 2:16 ` Jing Zhang 0 siblings, 1 reply; 6+ messages in thread From: Liang, Kan @ 2025-01-02 19:02 UTC (permalink / raw) To: Jing Zhang, Peter Zijlstra (Intel), Ian Rogers, Arnaldo Carvalho de Melo Cc: Shuai Xue, linux-perf-users, linux-kernel On 2024-12-30 2:11 a.m., Jing Zhang wrote: > perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL event > because of lack of ch_mask format in drivers, and perf test "104: perf > all PMU test (exclusive)" failed. > > $perf stat -e perf stat -e UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL > sleep 1 > > Initial error: > event syntax error: 'UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL' > \___ unknown term 'ch_mask' for pmu 'uncore_cha_0' > > 104: perf all PMU test (exclusive) : FAILED! > > Add ch_mask format for SPR to fix it. > I don't think there is a ch_mask. It should be extended umask. The issue of the CHA extended umask should has been fixed by https://lore.kernel.org/lkml/172052531679.2215.16140288595428337453.tip-bot2@tip-bot2/ Thanks, Kan > Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support") > Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com> > --- > arch/x86/events/intel/uncore_snbep.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c > index ca98744..e537623 100644 > --- a/arch/x86/events/intel/uncore_snbep.c > +++ b/arch/x86/events/intel/uncore_snbep.c > @@ -5967,6 +5967,7 @@ static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev > &format_attr_inv.attr, > &format_attr_thresh8.attr, > &format_attr_filter_tid5.attr, > + &format_attr_ch_mask.attr, > NULL, > }; > static const struct attribute_group spr_uncore_chabox_format_group = { ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR 2025-01-02 19:02 ` Liang, Kan @ 2025-01-06 2:16 ` Jing Zhang 2025-01-06 13:44 ` Liang, Kan 0 siblings, 1 reply; 6+ messages in thread From: Jing Zhang @ 2025-01-06 2:16 UTC (permalink / raw) To: Liang, Kan, Peter Zijlstra (Intel), Ian Rogers, Arnaldo Carvalho de Melo Cc: Shuai Xue, linux-perf-users, linux-kernel 在 2025/1/3 上午3:02, Liang, Kan 写道: > > > On 2024-12-30 2:11 a.m., Jing Zhang wrote: >> perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL event >> because of lack of ch_mask format in drivers, and perf test "104: perf >> all PMU test (exclusive)" failed. >> >> $perf stat -e perf stat -e UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL >> sleep 1 >> >> Initial error: >> event syntax error: 'UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL' >> \___ unknown term 'ch_mask' for pmu 'uncore_cha_0' >> >> 104: perf all PMU test (exclusive) : FAILED! >> >> Add ch_mask format for SPR to fix it. >> > > I don't think there is a ch_mask. It should be extended umask. > The issue of the CHA extended umask should has been fixed by > https://lore.kernel.org/lkml/172052531679.2215.16140288595428337453.tip-bot2@tip-bot2/ > I think it is not the same issue. I have this patch but still error. in "tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json", the event "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL" is described as: { "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", "Counter": "0,1,2,3", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", "Experimental": "1", "PerPkg": "1", "PortMask": "0x000", "UMask": "0x10c0008101", "Unit": "CHA" }, the PortMask is ch_mask, but driver not output ch_mask on SPR, it causes error. Thanks, Jing > Thanks, > Kan >> Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support") >> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com> >> --- >> arch/x86/events/intel/uncore_snbep.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c >> index ca98744..e537623 100644 >> --- a/arch/x86/events/intel/uncore_snbep.c >> +++ b/arch/x86/events/intel/uncore_snbep.c >> @@ -5967,6 +5967,7 @@ static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev >> &format_attr_inv.attr, >> &format_attr_thresh8.attr, >> &format_attr_filter_tid5.attr, >> + &format_attr_ch_mask.attr, >> NULL, >> }; >> static const struct attribute_group spr_uncore_chabox_format_group = { ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR 2025-01-06 2:16 ` Jing Zhang @ 2025-01-06 13:44 ` Liang, Kan 2025-01-07 1:55 ` Jing Zhang 0 siblings, 1 reply; 6+ messages in thread From: Liang, Kan @ 2025-01-06 13:44 UTC (permalink / raw) To: Jing Zhang, Peter Zijlstra (Intel), Ian Rogers, Arnaldo Carvalho de Melo Cc: Shuai Xue, linux-perf-users, linux-kernel, Thomas Falcon On 2025-01-05 9:16 p.m., Jing Zhang wrote: > > > 在 2025/1/3 上午3:02, Liang, Kan 写道: >> >> >> On 2024-12-30 2:11 a.m., Jing Zhang wrote: >>> perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL event >>> because of lack of ch_mask format in drivers, and perf test "104: perf >>> all PMU test (exclusive)" failed. >>> >>> $perf stat -e perf stat -e UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL >>> sleep 1 >>> >>> Initial error: >>> event syntax error: 'UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL' >>> \___ unknown term 'ch_mask' for pmu 'uncore_cha_0' >>> >>> 104: perf all PMU test (exclusive) : FAILED! >>> >>> Add ch_mask format for SPR to fix it. >>> >> >> I don't think there is a ch_mask. It should be extended umask. >> The issue of the CHA extended umask should has been fixed by >> https://lore.kernel.org/lkml/172052531679.2215.16140288595428337453.tip-bot2@tip-bot2/ >> > > I think it is not the same issue. I have this patch but still error. > > in "tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json", > the event "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL" is described as: > { > "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", > "Counter": "0,1,2,3", > "EventCode": "0x35", > "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", > "Experimental": "1", > "PerPkg": "1", > "PortMask": "0x000", > "UMask": "0x10c0008101", > "Unit": "CHA" > }, > > the PortMask is ch_mask, but driver not output ch_mask on SPR, it causes error. There is no ch_mask on SPR. It should be Extended Umask. The convertor tool should avoid generating the PortMask and FCMask for SPR/EMR/GNR. + Thomas Could you please take a look? We may have to re-generate the event list. Thanks, Kan > > Thanks, > Jing > >> Thanks, >> Kan > > > > >>> Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support") >>> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com> >>> --- >>> arch/x86/events/intel/uncore_snbep.c | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c >>> index ca98744..e537623 100644 >>> --- a/arch/x86/events/intel/uncore_snbep.c >>> +++ b/arch/x86/events/intel/uncore_snbep.c >>> @@ -5967,6 +5967,7 @@ static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev >>> &format_attr_inv.attr, >>> &format_attr_thresh8.attr, >>> &format_attr_filter_tid5.attr, >>> + &format_attr_ch_mask.attr, >>> NULL, >>> }; >>> static const struct attribute_group spr_uncore_chabox_format_group = { > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR 2025-01-06 13:44 ` Liang, Kan @ 2025-01-07 1:55 ` Jing Zhang 2025-01-07 17:12 ` Falcon, Thomas 0 siblings, 1 reply; 6+ messages in thread From: Jing Zhang @ 2025-01-07 1:55 UTC (permalink / raw) To: Liang, Kan, Peter Zijlstra (Intel), Ian Rogers, Arnaldo Carvalho de Melo Cc: Shuai Xue, linux-perf-users, linux-kernel, Thomas Falcon 在 2025/1/6 下午9:44, Liang, Kan 写道: > > > On 2025-01-05 9:16 p.m., Jing Zhang wrote: >> >> >> 在 2025/1/3 上午3:02, Liang, Kan 写道: >>> >>> >>> On 2024-12-30 2:11 a.m., Jing Zhang wrote: >>>> perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL event >>>> because of lack of ch_mask format in drivers, and perf test "104: perf >>>> all PMU test (exclusive)" failed. >>>> >>>> $perf stat -e perf stat -e UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL >>>> sleep 1 >>>> >>>> Initial error: >>>> event syntax error: 'UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL' >>>> \___ unknown term 'ch_mask' for pmu 'uncore_cha_0' >>>> >>>> 104: perf all PMU test (exclusive) : FAILED! >>>> >>>> Add ch_mask format for SPR to fix it. >>>> >>> >>> I don't think there is a ch_mask. It should be extended umask. >>> The issue of the CHA extended umask should has been fixed by >>> https://lore.kernel.org/lkml/172052531679.2215.16140288595428337453.tip-bot2@tip-bot2/ >>> >> >> I think it is not the same issue. I have this patch but still error. >> >> in "tools/perf/pmu-events/arch/x86/sapphirerapids/uncore-cache.json", >> the event "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL" is described as: >> { >> "BriefDescription": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", >> "Counter": "0,1,2,3", >> "EventCode": "0x35", >> "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", >> "Experimental": "1", >> "PerPkg": "1", >> "PortMask": "0x000", >> "UMask": "0x10c0008101", >> "Unit": "CHA" >> }, >> >> the PortMask is ch_mask, but driver not output ch_mask on SPR, it causes error. > > There is no ch_mask on SPR. It should be Extended Umask. > The convertor tool should avoid generating the PortMask and FCMask for > SPR/EMR/GNR. Oh, I see. Maybe the event description is inaccurate. Thanks, Jing > > + Thomas > > Could you please take a look? We may have to re-generate the event list. > > Thanks, > Kan > >> >> Thanks, >> Jing >> >>> Thanks, >>> Kan >> >> >> >> >>>> Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support") >>>> Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com> >>>> --- >>>> arch/x86/events/intel/uncore_snbep.c | 1 + >>>> 1 file changed, 1 insertion(+) >>>> >>>> diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c >>>> index ca98744..e537623 100644 >>>> --- a/arch/x86/events/intel/uncore_snbep.c >>>> +++ b/arch/x86/events/intel/uncore_snbep.c >>>> @@ -5967,6 +5967,7 @@ static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *ev >>>> &format_attr_inv.attr, >>>> &format_attr_thresh8.attr, >>>> &format_attr_filter_tid5.attr, >>>> + &format_attr_ch_mask.attr, >>>> NULL, >>>> }; >>>> static const struct attribute_group spr_uncore_chabox_format_group = { >> > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR 2025-01-07 1:55 ` Jing Zhang @ 2025-01-07 17:12 ` Falcon, Thomas 0 siblings, 0 replies; 6+ messages in thread From: Falcon, Thomas @ 2025-01-07 17:12 UTC (permalink / raw) To: peterz, acme, renyu.zj, kan.liang, irogers Cc: linux-kernel, linux-perf-users, xueshuai On Tue, 2025-01-07 at 09:55 +0800, Jing Zhang wrote: > > > 在 2025/1/6 下午9:44, Liang, Kan 写道: > > > > > > On 2025-01-05 9:16 p.m., Jing Zhang wrote: > > > > > > > > > 在 2025/1/3 上午3:02, Liang, Kan 写道: > > > > > > > > > > > > On 2024-12-30 2:11 a.m., Jing Zhang wrote: > > > > > perf stat errors out with > > > > > UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL event > > > > > because of lack of ch_mask format in drivers, and perf test > > > > > "104: perf > > > > > all PMU test (exclusive)" failed. > > > > > > > > > > $perf stat -e perf stat -e > > > > > UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL > > > > > sleep 1 > > > > > > > > > > Initial error: > > > > > event syntax error: > > > > > 'UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL' > > > > > \___ unknown term 'ch_mask' > > > > > for pmu 'uncore_cha_0' > > > > > > > > > > 104: perf all PMU test > > > > > (exclusive) : FAILED! > > > > > > > > > > Add ch_mask format for SPR to fix it. > > > > > > > > > > > > > I don't think there is a ch_mask. It should be extended umask. > > > > The issue of the CHA extended umask should has been fixed by > > > > https://lore.kernel.org/lkml/172052531679.2215.16140288595428337453.tip-bot2@tip-bot2/ > > > > > > > > > > I think it is not the same issue. I have this patch but still > > > error. > > > > > > in "tools/perf/pmu-events/arch/x86/sapphirerapids/uncore- > > > cache.json", > > > the event "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL" is described > > > as: > > > { > > > "BriefDescription": > > > "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", > > > "Counter": "0,1,2,3", > > > "EventCode": "0x35", > > > "EventName": "UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL", > > > "Experimental": "1", > > > "PerPkg": "1", > > > "PortMask": "0x000", > > > "UMask": "0x10c0008101", > > > "Unit": "CHA" > > > }, > > > > > > the PortMask is ch_mask, but driver not output ch_mask on SPR, it > > > causes error. > > > > There is no ch_mask on SPR. It should be Extended Umask. > > The convertor tool should avoid generating the PortMask and FCMask > > for > > SPR/EMR/GNR. > > Oh, I see. Maybe the event description is inaccurate. > > Thanks, > Jing > > > > > + Thomas > > > > Could you please take a look? We may have to re-generate the event > > list. Jing, could you please retest with the latest perf-tools-next: https://git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/?h=perf-tools-next and with this patch series applied: https://lore.kernel.org/lkml/20241209222800.296000-1-irogers@google.com/ Please let us know if that resolves the issue for you. Thanks, Tom > > > > Thanks, > > Kan > > > > > > > > Thanks, > > > Jing > > > > > > > Thanks, > > > > Kan > > > > > > > > > > > > > > > > > Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire > > > > > Rapids server CHA support") > > > > > Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com> > > > > > --- > > > > > arch/x86/events/intel/uncore_snbep.c | 1 + > > > > > 1 file changed, 1 insertion(+) > > > > > > > > > > diff --git a/arch/x86/events/intel/uncore_snbep.c > > > > > b/arch/x86/events/intel/uncore_snbep.c > > > > > index ca98744..e537623 100644 > > > > > --- a/arch/x86/events/intel/uncore_snbep.c > > > > > +++ b/arch/x86/events/intel/uncore_snbep.c > > > > > @@ -5967,6 +5967,7 @@ static int spr_cha_hw_config(struct > > > > > intel_uncore_box *box, struct perf_event *ev > > > > > &format_attr_inv.attr, > > > > > &format_attr_thresh8.attr, > > > > > &format_attr_filter_tid5.attr, > > > > > + &format_attr_ch_mask.attr, > > > > > NULL, > > > > > }; > > > > > static const struct attribute_group > > > > > spr_uncore_chabox_format_group = { > > > > > ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-01-07 17:13 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2024-12-30 7:11 [PATCH] perf/x86/intel/uncore: Fix the lack of ch_mask format for SPR Jing Zhang 2025-01-02 19:02 ` Liang, Kan 2025-01-06 2:16 ` Jing Zhang 2025-01-06 13:44 ` Liang, Kan 2025-01-07 1:55 ` Jing Zhang 2025-01-07 17:12 ` Falcon, Thomas
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