From: "Yu-Chun Lin [林祐君]" <eleanor.lin@realtek.com>
To: "Lee Jones" <lee@kernel.org>,
"James Tai [戴志峰]" <james.tai@realtek.com>,
"Andreas Färber" <afaerber@suse.com>,
"Linus Walleij" <linusw@kernel.org>,
"TY_Chang[張子逸]" <tychang@realtek.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-realtek-soc@lists.infradead.org"
<linux-realtek-soc@lists.infradead.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: RE: [PATCH 07/10] pinctrl: realtek: Initialise omitted offset fields to NA in config macros
Date: Wed, 4 Nov 2026 06:07:33 +0000 [thread overview]
Message-ID: <c48f0d12ee764bf3bd04b57db9a8b9cb@realtek.com> (raw)
In-Reply-To: <20261103213002.1673560-8-lee@kernel.org>
> The Realtek pinctrl driver uses NA (0xffffffff) as the sentinel for unsupported
> pin configuration features. However, RTK_PIN_CONFIG omits
> input_volt_offset, slew_rate_offset, and hvil_offset, and
> RTK_PIN_CONFIG_V2 omits slew_rate_offset and hvil_offset. Because C99
> designated initialisers zero-initialise omitted members, those fields default to 0
> instead of NA, causing rtd_pconf_parse_conf() to treat unsupported features as
> valid at bit offset base_bit + 0 and corrupt adjacent register bits.
>
> Explicitly initialise the omitted offset fields to NA in RTK_PIN_CONFIG and
> RTK_PIN_CONFIG_V2.
>
> Fixes: dcc9334435b0 ("pinctrl: realtek: add support for slew rate, input voltage
> and high VIL")
This should be:
Fixes: e99ce78030db ("pinctrl: realtek: Add common pinctrl driver for Realtek
DHC RTD SoCs")
> Fixes: e309dbd523b8 ("pinctrl: realtek: add rtd1625 pinctrl driver")
> Closes:
> https://sashiko.dev/#/bug/linux-fbd0bf54-6dba-4652-9418-270b11fb6d8b
> Cc: stable@vger.kernel.org
> Signed-off-by: Lee Jones <lee@kernel.org>
Otherwise, looks good to me.
Thanks for the fixes.
Reviewed-by: Yu-Chun Lin <eleanor.lin@realtek.com>
> ---
> drivers/pinctrl/realtek/pinctrl-rtd.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/pinctrl/realtek/pinctrl-rtd.h
> b/drivers/pinctrl/realtek/pinctrl-rtd.h
> index 77c30ea76443..86db54ea3ce8 100644
> --- a/drivers/pinctrl/realtek/pinctrl-rtd.h
> +++ b/drivers/pinctrl/realtek/pinctrl-rtd.h
> @@ -96,6 +96,9 @@ struct rtd_pin_reg_list {
> .smt_offset = _smt_off, \
> .power_offset = _pow_off, \
> .curr_type = _curr_type, \
> + .input_volt_offset = NA, \
> + .slew_rate_offset = NA, \
> + .hvil_offset = NA, \
> }
>
> #define RTK_PIN_CONFIG_V2(_name, _reg_off, _base_bit, _pud_en_off, \
> @@ -112,6 +115,8 @@ struct rtd_pin_reg_list {
> .power_offset = _pow_off, \
> .input_volt_offset = _input_volt_off, \
> .curr_type = _curr_type, \
> + .slew_rate_offset = NA, \
> + .hvil_offset = NA, \
> }
>
> #define RTK_PIN_CONFIG_I2C(_name, _reg_off, _base_bit, _pud_en_off, \
> --
> 2.56.0.385.gac671c819a-goog
next prev parent reply other threads:[~2026-11-04 6:08 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 21:29 [PATCH 00/10] pinctrl: Fix out-of-bounds accesses, divide-by-zero, and error handling Lee Jones
2026-11-03 21:29 ` [PATCH 01/10] pinctrl: sunxi: Fix out-of-bounds irq_bank index when first bank has no IRQs Lee Jones
2026-11-03 21:29 ` [PATCH 02/10] pinctrl: tegra186: Fix out-of-bounds register bank index for AON drive groups Lee Jones
2026-11-03 21:29 ` [PATCH 03/10] pinctrl: ingenic: Fix element type of x1600_sfc_funcs array Lee Jones
2026-11-03 22:00 ` H. Nikolaus Schaller
2026-11-03 21:29 ` [PATCH 04/10] pinctrl: mediatek: mt7981: Add missing entries to mt7981_ant_sel_funcs Lee Jones
2026-11-03 21:29 ` [PATCH 05/10] pinctrl: realtek: Prevent out-of-bounds access in rtd_pinctrl_find_config() Lee Jones
2026-11-04 6:04 ` Yu-Chun Lin [林祐君]
2026-11-03 21:29 ` [PATCH 06/10] pinctrl: realtek: Fix bit shift when configuring RTD_HIGH_VIL Lee Jones
2026-11-04 6:06 ` Yu-Chun Lin [林祐君]
2026-11-03 21:29 ` [PATCH 07/10] pinctrl: realtek: Initialise omitted offset fields to NA in config macros Lee Jones
2026-11-04 6:07 ` Yu-Chun Lin [林祐君] [this message]
2026-11-03 21:29 ` [PATCH 08/10] pinctrl: mediatek: Clean up partially initialised hw->eint on error Lee Jones
2026-11-03 21:29 ` [PATCH 09/10] pinctrl: mediatek: Prevent divide-by-zero for pins with fixed drive strength Lee Jones
2026-11-03 21:29 ` [PATCH 10/10] pinctrl: qcom: Check qcom_scm_io_readl() return value in msm_gpio_irq_set_type() Lee Jones
2026-11-04 8:17 ` Konrad Dybcio
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c48f0d12ee764bf3bd04b57db9a8b9cb@realtek.com \
--to=eleanor.lin@realtek.com \
--cc=afaerber@suse.com \
--cc=james.tai@realtek.com \
--cc=lee@kernel.org \
--cc=linusw@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-realtek-soc@lists.infradead.org \
--cc=stable@vger.kernel.org \
--cc=tychang@realtek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®