From: "guanghuifeng@linux.alibaba.com" <guanghuifeng@linux.alibaba.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, jgg@nvidia.com
Cc: yi.l.liu@intel.com, kevin.tian@intel.com, nicolinc@nvidia.com,
vasant.hegde@amd.com, jon.grimm@amd.com, santosh.shukla@amd.com,
Sairaj.K@amd.com, jay.chen@amd.com, wvw@google.com,
wnliu@google.com, dantuluris@google.com, chriscli@google.com,
kpsingh@google.com, alejandro.j.jimenez@oracle.com,
joao.m.martins@oracle.com
Subject: Re: [PATCH 17/24] iommu/amd: Introduce helper function for updating domain ID mapping table
Date: Wed, 19 Aug 2026 18:45:40 +0800 [thread overview]
Message-ID: <c5f7f26f-ea3f-48a8-a2ac-5320155fd824@linux.alibaba.com> (raw)
In-Reply-To: <20260727132913.22475-18-suravee.suthikulpanit@amd.com>
在 2026/7/27 21:29, Suravee Suthikulpanit 写道:
> AMD vIOMMU hardware uses the Domain ID mapping table to map Guest Domain ID
> (GDomID) to Host Domain ID when it virtualises guest IOMMU commands.
> It uses GID and GDomID to index into the table to look up host domain ID.
>
> Linux IOMMU driver programs the table entry using VFCntlMMIO Guest Domain
> Map Control Register.
>
> Introduce amd_viommu_domain_id_update(), which is used to set the entry
> when attaching the nested device. Clearing the entry is done during VM
> destroy.
>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
> drivers/iommu/amd/amd_viommu.h | 2 ++
> drivers/iommu/amd/nested.c | 9 ++++++-
> drivers/iommu/amd/viommu.c | 45 ++++++++++++++++++++++++++++++++++
> 3 files changed, 55 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/amd/amd_viommu.h b/drivers/iommu/amd/amd_viommu.h
> index 8b57717c22a6..b6fd5ffc3b82 100644
> --- a/drivers/iommu/amd/amd_viommu.h
> +++ b/drivers/iommu/amd/amd_viommu.h
> @@ -18,6 +18,8 @@ int amd_viommu_init_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu
>
> void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu);
>
> +int amd_viommu_domain_id_update(struct amd_iommu *iommu, u16 gid,
> + u16 hdom_id, u16 gdom_id);
> #else
>
> static inline int amd_viommu_init(struct amd_iommu *iommu)
> diff --git a/drivers/iommu/amd/nested.c b/drivers/iommu/amd/nested.c
> index 6f3ae2496160..1365c67168b6 100644
> --- a/drivers/iommu/amd/nested.c
> +++ b/drivers/iommu/amd/nested.c
> @@ -254,6 +254,7 @@ static int nested_attach_device(struct iommu_domain *dom, struct device *dev,
> struct iommu_domain *old)
> {
> struct dev_table_entry new = {0};
> + struct nested_domain *ndom = to_ndomain(dom);
> struct iommu_dev_data *dev_data = dev_iommu_priv_get(dev);
> struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
> int ret = 0;
> @@ -267,10 +268,16 @@ static int nested_attach_device(struct iommu_domain *dom, struct device *dev,
>
> mutex_lock(&dev_data->mutex);
>
> - set_dte_nested(iommu, dom, dev_data, &new);
> + ret = set_dte_nested(iommu, dom, dev_data, &new);
> + if (ret)
> + goto out_err;
>
> amd_iommu_update_dte(iommu, dev_data, &new);
>
> + ret = amd_viommu_domain_id_update(iommu, ndom->viommu->gid,
> + ndom->gdom_info->hdom_id, ndom->gdom_id);
> +
> +out_err:
> mutex_unlock(&dev_data->mutex);
>
> return ret;
> diff --git a/drivers/iommu/amd/viommu.c b/drivers/iommu/amd/viommu.c
> index 91d0dd3ac912..708f2c7496a4 100644
> --- a/drivers/iommu/amd/viommu.c
> +++ b/drivers/iommu/amd/viommu.c
> @@ -40,6 +40,8 @@
> #define VIOMMU_DOMID_MAPPING_BASE 0x2000000000ULL
> #define VIOMMU_DOMID_MAPPING_ENTRY_SIZE (1 << 19)
>
> +#define VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL1_OFFSET 0x08
> +
> LIST_HEAD(viommu_devid_map);
>
> static int viommu_init_pci_vsc(struct amd_iommu *iommu)
> @@ -420,6 +422,22 @@ static void __maybe_unused free_private_vm_region(struct amd_iommu *iommu, u64 *
> *entry = NULL;
> }
>
> +static void viommu_clear_mapping(struct amd_iommu *iommu,
> + struct amd_iommu_viommu *aviommu)
> +{
> + int i;
> + u16 gid = aviommu->gid;
> +
> + /*
> + * IOMMU hardware uses the domain ID mapping table to map gdom ID to hdom ID.
> + * If the mapping does not exist, the hardware would generate error in the event log.
> + * Therefore, initialize all gdom ID entries to map to parent domain ID to prevent
> + * unknown mapping scenario.
> + */
> + for (i = 0; i <= VIOMMU_MAX_GDOMID; i++)
> + amd_viommu_domain_id_update(iommu, gid, aviommu->parent->id, i);
> +}
> +
> void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *aviommu)
> {
> pr_debug("%s: gid=%u\n", __func__, aviommu->gid);
> @@ -432,6 +450,7 @@ void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *avi
> VIOMMU_DOMID_MAPPING_BASE,
> VIOMMU_DOMID_MAPPING_ENTRY_SIZE,
> aviommu->gid);
> + viommu_clear_mapping(iommu, aviommu);
> }
Use-after-free in vIOMMU teardown ordering
The teardown path releases the DevID/DomID mapping table memory
BEFORE resetting the vIOMMU state:
free_private_vm_region(iommu, &aviommu->devid_table, ...);
free_private_vm_region(iommu, &aviommu->domid_table, ...);
...
viommu_clear_mapping(iommu, aviommu); /* too late */
Since the IOMMU hardware may still reference these tables until the
guest vIOMMU state is reset, freeing the backing memory first can
result in a use-after-free by hardware.
>
> int amd_viommu_init_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu)
> @@ -452,8 +471,34 @@ int amd_viommu_init_one(struct amd_iommu *iommu, struct amd_iommu_viommu *viommu
> if (ret)
> goto err_out;
>
> + viommu_clear_mapping(iommu, viommu);
> +
> return 0;
> err_out:
> amd_viommu_uninit_one(iommu, viommu);
> return -ENOMEM;
> }
> +
> +/*
> + * Program the DomID via VFCTRL registers
> + * This function will be called during VM init via VFIO.
> + */
> +
> + #define DOMID_ENTRY_GDOMID_MASK GENMASK_ULL(61, 46)
> + #define DOMID_ENTRY_HDOMID_MASK GENMASK_ULL(29, 14)
> + #define DOMID_ENTRY_VALID BIT_ULL(0)
> + #define DOMID_ENTRY_WRITE BIT_ULL(63)
> +
> +int amd_viommu_domain_id_update(struct amd_iommu *iommu, u16 gid,
> + u16 hdom_id, u16 gdom_id)
> +{
> + u64 val;
> + u8 __iomem *vfctrl = VIOMMU_VFCTRL_MMIO_BASE(iommu, gid);
> +
> + val = FIELD_PREP(DOMID_ENTRY_GDOMID_MASK, gdom_id) |
> + FIELD_PREP(DOMID_ENTRY_HDOMID_MASK, hdom_id) |
> + DOMID_ENTRY_WRITE | DOMID_ENTRY_VALID;
> +
> + writeq(val, vfctrl + VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL1_OFFSET);
> + return 0;
> +}
next prev parent reply other threads:[~2026-08-19 10:45 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-27 13:28 [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 01/24] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-08-05 17:01 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 02/24] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-08-10 7:12 ` Vasant Hegde
2026-08-19 8:17 ` guanghuifeng
2026-07-27 13:28 ` [PATCH 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-08-10 8:13 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 04/24] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 05/24] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-08-10 9:21 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 06/24] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-08-10 10:00 ` Vasant Hegde
2026-08-19 13:18 ` guanghuifeng
2026-07-27 13:28 ` [PATCH 07/24] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-08-10 10:49 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 08/24] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-08-19 8:34 ` guanghuifeng
2026-07-27 13:28 ` [PATCH 09/24] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 10/24] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-08-10 11:07 ` Vasant Hegde
2026-07-27 13:29 ` [PATCH 11/24] iommu/amd: Export amd_iommu_alloc_dev_data() helper Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 12/24] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 13/24] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 14/24] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 15/24] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-08-19 13:30 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 16/24] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-08-19 13:34 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 17/24] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-08-19 10:45 ` guanghuifeng [this message]
2026-07-27 13:29 ` [PATCH 18/24] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-08-10 15:17 ` Vasant Hegde
2026-08-19 10:26 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 19/24] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 20/24] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 21/24] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 22/24] iommu/amd: Add translate-device-id alloc/free with vIOMMU owner Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 23/24] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-08-19 10:18 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve Suravee Suthikulpanit
2026-08-19 9:42 ` guanghuifeng
2026-08-11 7:18 ` [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Tian, Kevin
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