From: "guanghuifeng@linux.alibaba.com" <guanghuifeng@linux.alibaba.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev,
joro@8bytes.org, jgg@nvidia.com
Cc: yi.l.liu@intel.com, kevin.tian@intel.com, nicolinc@nvidia.com,
vasant.hegde@amd.com, jon.grimm@amd.com, santosh.shukla@amd.com,
Sairaj.K@amd.com, jay.chen@amd.com, wvw@google.com,
wnliu@google.com, dantuluris@google.com, chriscli@google.com,
kpsingh@google.com, alejandro.j.jimenez@oracle.com,
joao.m.martins@oracle.com
Subject: Re: [PATCH 18/24] iommu/amd: Introduce helper function for updating device ID mapping table
Date: Wed, 19 Aug 2026 18:26:58 +0800 [thread overview]
Message-ID: <fbfc7a4a-3108-4cc0-b6d4-d89f56393aba@linux.alibaba.com> (raw)
In-Reply-To: <20260727132913.22475-19-suravee.suthikulpanit@amd.com>
在 2026/7/27 21:29, Suravee Suthikulpanit 写道:
> AMD vIOMMU hardware uses the Device ID mapping table to map Guest Device ID
> (GDevID) to Host Device ID when it virtualises guest IOMMU commands.
> It uses GID and GDevID to indexe into the table to look up host device ID.
>
> Linux IOMMU driver programs the table entry using VFCntlMMIO Guest Device
> Map Control Register.
>
> Introduce amd_viommu_set/clear_device_mapping(), which are used to set
> the entry when initialize the IOMMUFD vDevice. Clearing the entry is
> done during VM destroy.
>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> ---
> drivers/iommu/amd/amd_viommu.h | 10 +++++++
> drivers/iommu/amd/iommufd.c | 9 ++++++
> drivers/iommu/amd/viommu.c | 53 +++++++++++++++++++++++++++++++++-
> 3 files changed, 71 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/amd/amd_viommu.h b/drivers/iommu/amd/amd_viommu.h
> index b6fd5ffc3b82..ca09a9856938 100644
> --- a/drivers/iommu/amd/amd_viommu.h
> +++ b/drivers/iommu/amd/amd_viommu.h
> @@ -6,6 +6,8 @@
> #ifndef AMD_VIOMMU_H
> #define AMD_VIOMMU_H
>
> +#define VIOMMU_MAX_GDEVID 0xFFFF
> +
> #if IS_ENABLED(CONFIG_AMD_IOMMU_IOMMUFD)
>
> int amd_viommu_init(struct amd_iommu *iommu);
> @@ -20,6 +22,9 @@ void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *vio
>
> int amd_viommu_domain_id_update(struct amd_iommu *iommu, u16 gid,
> u16 hdom_id, u16 gdom_id);
> +
> +void amd_viommu_set_device_mapping(struct amd_iommu *iommu, u16 hDevId,
> + u16 guestId, u16 gDevId);
> #else
>
> static inline int amd_viommu_init(struct amd_iommu *iommu)
> @@ -45,6 +50,11 @@ static inline void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iom
> {
> }
>
> +static inline void amd_viommu_set_device_mapping(struct amd_iommu *iommu, u16 hDevId,
> + u16 guestId, u16 gDevId)
> +{
> +}
> +
> #endif /* CONFIG_AMD_IOMMU_IOMMUFD */
>
> #endif /* AMD_VIOMMU_H */
> diff --git a/drivers/iommu/amd/iommufd.c b/drivers/iommu/amd/iommufd.c
> index 1975b2932107..7e070f72f02e 100644
> --- a/drivers/iommu/amd/iommufd.c
> +++ b/drivers/iommu/amd/iommufd.c
> @@ -136,12 +136,18 @@ static int _amd_viommu_vdevice_init(struct iommufd_vdevice *vdev)
> struct pci_dev *pdev = to_pci_dev(vdev->idev->dev);
> struct iommufd_viommu *viommu = vdev->viommu;
> struct amd_iommu_viommu *aviommu = container_of(viommu, struct amd_iommu_viommu, core);
> + struct amd_iommu *iommu = container_of(viommu->iommu_dev, struct amd_iommu, iommu);
>
> if (!pdev) {
> pr_err("%s: not a PCI device\n", __func__);
> return -EINVAL;
> }
>
> + if (vdev->virt_id > VIOMMU_MAX_GDEVID) {
> + pr_err("%s: Invalid virtual ID (virt_id=%#llx)\n", __func__, vdev->virt_id);
> + return -EINVAL;
> + }
> +
> dev_data = dev_iommu_priv_get(&pdev->dev);
> if (!dev_data) {
> pr_err("%s: Device not found (devid=%#x)\n",
> @@ -152,6 +158,9 @@ static int _amd_viommu_vdevice_init(struct iommufd_vdevice *vdev)
> pr_debug("%s: gid=%#x, hdev_id=%#x, gdev_id=%#llx\n", __func__,
> aviommu->gid, pci_dev_id(pdev), vdev->virt_id);
>
> + amd_viommu_set_device_mapping(iommu, pci_dev_id(pdev), aviommu->gid,
> + (u16)vdev->virt_id);
> +
> return 0;
> }
>
> diff --git a/drivers/iommu/amd/viommu.c b/drivers/iommu/amd/viommu.c
> index 708f2c7496a4..eb3f5217d856 100644
> --- a/drivers/iommu/amd/viommu.c
> +++ b/drivers/iommu/amd/viommu.c
> @@ -29,7 +29,6 @@
> /*
> * Guest Device ID Mapping Table
> */
> -#define VIOMMU_MAX_GDEVID 0xFFFF
> #define VIOMMU_DEVID_MAPPING_BASE 0x1000000000ULL
> #define VIOMMU_DEVID_MAPPING_ENTRY_SIZE (1 << 20)
>
> @@ -40,6 +39,7 @@
> #define VIOMMU_DOMID_MAPPING_BASE 0x2000000000ULL
> #define VIOMMU_DOMID_MAPPING_ENTRY_SIZE (1 << 19)
>
> +#define VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL0_OFFSET 0x00
> #define VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL1_OFFSET 0x08
>
> LIST_HEAD(viommu_devid_map);
> @@ -422,6 +422,53 @@ static void __maybe_unused free_private_vm_region(struct amd_iommu *iommu, u64 *
> *entry = NULL;
> }
>
> +#define DEVID_ENTRY_GDEVID_MASK GENMASK_ULL(61, 46)
> +#define DEVID_ENTRY_HDEVID_MASK GENMASK_ULL(29, 14)
> +#define DEVID_ENTRY_WRITE BIT_ULL(63)
> +#define DEVID_ENTRY_VALID BIT_ULL(0)
> +
> +/*
> + * Program the DevID via VFCTRL registers
> + * This function will be called during VM init via VFIO.
> + */
> +void amd_viommu_set_device_mapping(struct amd_iommu *iommu, u16 hDevId,
> + u16 guestId, u16 gDevId)
> +{
> + u64 val;
> + u8 __iomem *vfctrl;
> +
> + pr_debug("%s: iommu_devid=%#x, gid=%#x, hDevId=%#x, gDevId=%#x\n",
> + __func__, pci_dev_id(iommu->dev), guestId, hDevId, gDevId);
> +
> + val = FIELD_PREP(DEVID_ENTRY_GDEVID_MASK, gDevId) |
> + FIELD_PREP(DEVID_ENTRY_HDEVID_MASK, hDevId) |
> + DEVID_ENTRY_WRITE | DEVID_ENTRY_VALID;
> +
> + vfctrl = VIOMMU_VFCTRL_MMIO_BASE(iommu, guestId);
> +
> + writeq(val, vfctrl + VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL0_OFFSET);
> +}
> +
> +/*
> + * Clear the DevID via VFCTRL registers
> + * This function will be called during VM destroy via VFIO.
> + */
> +static void clear_device_mapping(struct amd_iommu *iommu, u16 guestId, u16 gDevId)
> +{
> + u64 val;
> + u8 __iomem *vfctrl;
> +
> + /*
> + * Clear the DevID in VFCTRL registers
> + */
> + val = FIELD_PREP(DEVID_ENTRY_GDEVID_MASK, gDevId) |
> + FIELD_PREP(DEVID_ENTRY_HDEVID_MASK, 0) |
> + DEVID_ENTRY_WRITE | DEVID_ENTRY_VALID;
> +
> + vfctrl = VIOMMU_VFCTRL_MMIO_BASE(iommu, guestId);
> + writeq(val, vfctrl + VIOMMU_VFCTRL_GUEST_DID_MAP_CONTROL0_OFFSET);
> +}
The clear path sets Vld=1 with hDevID=0. This semantics is ambiguous:
Vld=1 marks the entry as a *valid* mapping, and hDevID=0 is a legal PCI
BDF (Bus 0, Dev 0, Func 0), instead of treating the entry as invalid. To
actually invalidate the mapping,
please use Vld=0
val = FIELD_PREP(DEVID_ENTRY_GDEVID_MASK, gDevId) |
FIELD_PREP(DEVID_ENTRY_HDEVID_MASK, 0) |
DEVID_ENTRY_WRITE;
Alternatively, during the clear dev mapping process, you might directly
specify the original hdevid being used.
> +
> static void viommu_clear_mapping(struct amd_iommu *iommu,
> struct amd_iommu_viommu *aviommu)
> {
> @@ -436,6 +483,10 @@ static void viommu_clear_mapping(struct amd_iommu *iommu,
> */
> for (i = 0; i <= VIOMMU_MAX_GDOMID; i++)
> amd_viommu_domain_id_update(iommu, gid, aviommu->parent->id, i);
> +
> + for (i = 0; i <= VIOMMU_MAX_GDEVID; i++)
> + clear_device_mapping(iommu, gid, i);
> +
> }
>
> void amd_viommu_uninit_one(struct amd_iommu *iommu, struct amd_iommu_viommu *aviommu)
next prev parent reply other threads:[~2026-08-19 10:27 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-27 13:28 [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 01/24] iommu/amd: Make amd_iommu_completion_wait() non-static Suravee Suthikulpanit
2026-08-05 17:01 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 02/24] iommu/amd: Introduce vIOMMU-specific events and event Suravee Suthikulpanit
2026-08-10 7:12 ` Vasant Hegde
2026-08-19 8:17 ` guanghuifeng
2026-07-27 13:28 ` [PATCH 03/24] iommu/amd: Detect and initialize AMD vIOMMU feature Suravee Suthikulpanit
2026-08-10 8:13 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 04/24] iommu/amd: Introduce IOMMUFD vIOMMU support for AMD Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 05/24] iommu/amd: Allocate Guest IDs for IOMMUFD vIOMMU instances Suravee Suthikulpanit
2026-08-10 9:21 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 06/24] iommu/amd: Map vIOMMU VF and VF Control MMIO BARs Suravee Suthikulpanit
2026-08-10 10:00 ` Vasant Hegde
2026-08-19 13:18 ` guanghuifeng
2026-07-27 13:28 ` [PATCH 07/24] iommu/amd: Add support for AMD vIOMMU VF MMIO region Suravee Suthikulpanit
2026-08-10 10:49 ` Vasant Hegde
2026-07-27 13:28 ` [PATCH 08/24] iommu/amd: Introduce Reset vMMIO Command Suravee Suthikulpanit
2026-08-19 8:34 ` guanghuifeng
2026-07-27 13:28 ` [PATCH 09/24] iommu/amd: Introduce and map vIOMMU private IPA region Suravee Suthikulpanit
2026-07-27 13:28 ` [PATCH 10/24] iommu/amd: Pass iommu to device_flush_dte() Suravee Suthikulpanit
2026-08-10 11:07 ` Vasant Hegde
2026-07-27 13:29 ` [PATCH 11/24] iommu/amd: Export amd_iommu_alloc_dev_data() helper Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 12/24] iommu/amd: Pass iommu and devid to amd_iommu_make_clear_dte() Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 13/24] iommu/amd: Assign IOMMU Private Address domain to IOMMU Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 14/24] iommu/amd: Add per-VM private IPA alloc/map helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 15/24] iommu/amd: Add helper functions to manage DevID / DomID mapping tables Suravee Suthikulpanit
2026-08-19 13:30 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 16/24] iommu/amd: Introduce IOMMUFD vDevice support for AMD Suravee Suthikulpanit
2026-08-19 13:34 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 17/24] iommu/amd: Introduce helper function for updating domain ID mapping table Suravee Suthikulpanit
2026-08-19 10:45 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 18/24] iommu/amd: Introduce helper function for updating device " Suravee Suthikulpanit
2026-08-10 15:17 ` Vasant Hegde
2026-08-19 10:26 ` guanghuifeng [this message]
2026-07-27 13:29 ` [PATCH 19/24] iommu/amd: Add per-segment translate device ID pool Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 20/24] iommu/amd: Reserve translate-device-id for PCI requestor aliases Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 21/24] iommu/amd: Add translation DTE and VFctrl TransDevID helpers Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 22/24] iommu/amd: Add translate-device-id alloc/free with vIOMMU owner Suravee Suthikulpanit
2026-07-27 13:29 ` [PATCH 23/24] iommu/amd: Assign per-vIOMMU translate device ID Suravee Suthikulpanit
2026-08-19 10:18 ` guanghuifeng
2026-07-27 13:29 ` [PATCH 24/24] iommu/amd: Relocate vIOMMU translate-device-id on PCI reserve Suravee Suthikulpanit
2026-08-19 9:42 ` guanghuifeng
2026-08-11 7:18 ` [PATCH v4 00/24] iommu/amd: Introduce AMD Hardware-accelerated Virtualized IOMMU (vIOMMU) Support Tian, Kevin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=fbfc7a4a-3108-4cc0-b6d4-d89f56393aba@linux.alibaba.com \
--to=guanghuifeng@linux.alibaba.com \
--cc=Sairaj.K@amd.com \
--cc=alejandro.j.jimenez@oracle.com \
--cc=chriscli@google.com \
--cc=dantuluris@google.com \
--cc=iommu@lists.linux.dev \
--cc=jay.chen@amd.com \
--cc=jgg@nvidia.com \
--cc=joao.m.martins@oracle.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=kpsingh@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=santosh.shukla@amd.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=vasant.hegde@amd.com \
--cc=wnliu@google.com \
--cc=wvw@google.com \
--cc=yi.l.liu@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®