* [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
@ 2026-01-06 9:07 Krzysztof Kozlowski
2026-01-06 9:07 ` [PATCH v4 1/3] " Krzysztof Kozlowski
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-06 9:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Krzysztof Kozlowski
Hi,
Changes in v4:
- Add required-opps to fix reported dtbs_check error
- Link to v3: https://patch.msgid.link/20251120-b4-sm8750-iris-dts-v3-0-8715442c30d9@kernel.org
Changes in v3:
- Add tags, update dependencies, rebase.
- Add missing opp-570.
- Link to v2: https://lore.kernel.org/r/20250806-b4-sm8750-iris-dts-v2-0-2ce197525eed@linaro.org
Changes in v2:
- Patch #1: Add RPMHPD_MXC (Konrad)
- Link to v1: https://lore.kernel.org/r/20250714-b4-sm8750-iris-dts-v1-0-93629b246d2e@linaro.org
No dependencies, can be merged as is.
Best regards,
Krzysztof
---
Krzysztof Kozlowski (3):
arm64: dts: qcom: sm8750: Add Iris VPU v3.5
arm64: dts: qcom: sm8750-mtp: Enable Iris codec
arm64: dts: qcom: sm8750-qrd: Enable Iris codec
arch/arm64/boot/dts/qcom/sm8750-mtp.dts | 4 ++
arch/arm64/boot/dts/qcom/sm8750-qrd.dts | 4 ++
arch/arm64/boot/dts/qcom/sm8750.dtsi | 121 ++++++++++++++++++++++++++++++++
3 files changed, 129 insertions(+)
---
base-commit: ee5fcf7f77ea551082fe5bbc257aa3b727571494
change-id: 20250714-b4-sm8750-iris-dts-ebdb5dc4ee27
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
2026-01-06 9:07 [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Krzysztof Kozlowski
@ 2026-01-06 9:07 ` Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
` (2 more replies)
2026-01-06 9:07 ` [PATCH v4 2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec Krzysztof Kozlowski
` (2 subsequent siblings)
3 siblings, 3 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-06 9:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Krzysztof Kozlowski
Add Iris video codec to SM8750 SoC, which comes with significantly
different powering up sequence than previous SM8650, thus different
clocks and resets. For consistency keep existing clock and clock-names
naming, so the list shares common part.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8750.dtsi | 121 +++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 0a6f2a449c20..a76bf5193a70 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sm8750-gcc.h>
#include <dt-bindings/clock/qcom,sm8750-tcsr.h>
+#include <dt-bindings/clock/qcom,sm8750-videocc.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,icc.h>
@@ -2811,6 +2812,126 @@ usb_dwc3_ss: endpoint {
};
};
+ iris: video-codec@aa00000 {
+ compatible = "qcom,sm8750-iris";
+ reg = <0x0 0x0aa00000 0x0 0xf0000>;
+
+ clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
+ <&videocc VIDEO_CC_MVS0C_CLK>,
+ <&videocc VIDEO_CC_MVS0_CLK>,
+ <&gcc GCC_VIDEO_AXI1_CLK>,
+ <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>,
+ <&videocc VIDEO_CC_MVS0_FREERUN_CLK>;
+ clock-names = "iface",
+ "core",
+ "vcodec0_core",
+ "iface1",
+ "core_freerun",
+ "vcodec0_core_freerun";
+
+ dma-coherent;
+ iommus = <&apps_smmu 0x1940 0>,
+ <&apps_smmu 0x1947 0>;
+
+ interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
+ &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
+ <&mmss_noc MASTER_VIDEO_MVP QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+ interconnect-names = "cpu-cfg",
+ "video-mem";
+
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+
+ memory-region = <&video_mem>;
+
+ operating-points-v2 = <&iris_opp_table>;
+
+ power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
+ <&videocc VIDEO_CC_MVS0_GDSC>,
+ <&rpmhpd RPMHPD_MXC>,
+ <&rpmhpd RPMHPD_MMCX>;
+ power-domain-names = "venus",
+ "vcodec0",
+ "mxc",
+ "mmcx";
+
+ resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
+ <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>,
+ <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>;
+ reset-names = "bus0",
+ "bus1",
+ "core",
+ "vcodec0_core";
+
+ /*
+ * IRIS firmware is signed by vendors, only
+ * enable in boards where the proper signed firmware
+ * is available.
+ */
+ status = "disabled";
+
+ iris_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-240000000 {
+ opp-hz = /bits/ 64 <240000000>;
+ required-opps = <&rpmhpd_opp_low_svs_d1>,
+ <&rpmhpd_opp_low_svs_d1>;
+ };
+
+ opp-338000000 {
+ opp-hz = /bits/ 64 <338000000>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-420000000 {
+ opp-hz = /bits/ 64 <420000000>;
+ required-opps = <&rpmhpd_opp_svs>,
+ <&rpmhpd_opp_svs>;
+ };
+
+ opp-444000000 {
+ opp-hz = /bits/ 64 <444000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>,
+ <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-533333334 {
+ opp-hz = /bits/ 64 <533333334>;
+ required-opps = <&rpmhpd_opp_nom>,
+ <&rpmhpd_opp_nom>;
+ };
+
+ opp-570000000 {
+ opp-hz = /bits/ 64 <570000000>;
+ required-opps = <&rpmhpd_opp_nom_l1>,
+ <&rpmhpd_opp_nom_l1>;
+ };
+
+ opp-630000000 {
+ opp-hz = /bits/ 64 <630000000>;
+ required-opps = <&rpmhpd_opp_turbo>,
+ <&rpmhpd_opp_turbo>;
+ };
+ };
+ };
+
+ videocc: clock-controller@aaf0000 {
+ compatible = "qcom,sm8750-videocc";
+ reg = <0x0 0x0aaf0000 0x0 0x10000>;
+ clocks = <&bi_tcxo_div2>,
+ <&gcc GCC_VIDEO_AHB_CLK>;
+ power-domains = <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
pdc: interrupt-controller@b220000 {
compatible = "qcom,sm8750-pdc", "qcom,pdc";
reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x164400f0 0x0 0x64>;
--
2.51.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec
2026-01-06 9:07 [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Krzysztof Kozlowski
2026-01-06 9:07 ` [PATCH v4 1/3] " Krzysztof Kozlowski
@ 2026-01-06 9:07 ` Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
2026-01-06 9:07 ` [PATCH v4 3/3] arm64: dts: qcom: sm8750-qrd: " Krzysztof Kozlowski
2026-01-06 17:52 ` [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Bjorn Andersson
3 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-06 9:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Krzysztof Kozlowski
Enable on SM8750 MTP the Iris video codec for accelerated video
encoding/decoding.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8750-mtp.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
index e77fe0ce91ca..cb718331496e 100644
--- a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
@@ -925,6 +925,10 @@ vreg_l7n_3p3: ldo7 {
};
};
+&iris {
+ status = "okay";
+};
+
&lpass_vamacro {
pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
pinctrl-names = "default";
--
2.51.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 3/3] arm64: dts: qcom: sm8750-qrd: Enable Iris codec
2026-01-06 9:07 [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Krzysztof Kozlowski
2026-01-06 9:07 ` [PATCH v4 1/3] " Krzysztof Kozlowski
2026-01-06 9:07 ` [PATCH v4 2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec Krzysztof Kozlowski
@ 2026-01-06 9:07 ` Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
2026-01-06 17:52 ` [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Bjorn Andersson
3 siblings, 1 reply; 10+ messages in thread
From: Krzysztof Kozlowski @ 2026-01-06 9:07 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel, Krzysztof Kozlowski
Enable on SM8750 QRD the Iris video codec for accelerated video
encoding/decoding.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/sm8750-qrd.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8750-qrd.dts b/arch/arm64/boot/dts/qcom/sm8750-qrd.dts
index 439ffb202599..801c46d55602 100644
--- a/arch/arm64/boot/dts/qcom/sm8750-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8750-qrd.dts
@@ -858,6 +858,10 @@ vreg_l7n_3p3: ldo7 {
};
};
+&iris {
+ status = "okay";
+};
+
&pm8550_flash {
status = "okay";
--
2.51.0
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
2026-01-06 9:07 ` [PATCH v4 1/3] " Krzysztof Kozlowski
@ 2026-01-06 15:56 ` Bryan O'Donoghue
2026-01-06 17:13 ` Taniya Das
2026-01-08 7:54 ` Dikshita Agarwal
2 siblings, 0 replies; 10+ messages in thread
From: Bryan O'Donoghue @ 2026-01-06 15:56 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 06/01/2026 09:07, Krzysztof Kozlowski wrote:
> Add Iris video codec to SM8750 SoC, which comes with significantly
> different powering up sequence than previous SM8650, thus different
> clocks and resets. For consistency keep existing clock and clock-names
> naming, so the list shares common part.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sm8750.dtsi | 121 +++++++++++++++++++++++++++++++++++
> 1 file changed, 121 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> index 0a6f2a449c20..a76bf5193a70 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> @@ -6,6 +6,7 @@
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/clock/qcom,sm8750-gcc.h>
> #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
> +#include <dt-bindings/clock/qcom,sm8750-videocc.h>
> #include <dt-bindings/dma/qcom-gpi.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interconnect/qcom,icc.h>
> @@ -2811,6 +2812,126 @@ usb_dwc3_ss: endpoint {
> };
> };
>
> + iris: video-codec@aa00000 {
> + compatible = "qcom,sm8750-iris";
> + reg = <0x0 0x0aa00000 0x0 0xf0000>;
> +
> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> + <&videocc VIDEO_CC_MVS0C_CLK>,
> + <&videocc VIDEO_CC_MVS0_CLK>,
> + <&gcc GCC_VIDEO_AXI1_CLK>,
> + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>,
> + <&videocc VIDEO_CC_MVS0_FREERUN_CLK>;
> + clock-names = "iface",
> + "core",
> + "vcodec0_core",
> + "iface1",
> + "core_freerun",
> + "vcodec0_core_freerun";
> +
> + dma-coherent;
> + iommus = <&apps_smmu 0x1940 0>,
> + <&apps_smmu 0x1947 0>;
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&mmss_noc MASTER_VIDEO_MVP QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "cpu-cfg",
> + "video-mem";
> +
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +
> + memory-region = <&video_mem>;
> +
> + operating-points-v2 = <&iris_opp_table>;
> +
> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
> + <&videocc VIDEO_CC_MVS0_GDSC>,
> + <&rpmhpd RPMHPD_MXC>,
> + <&rpmhpd RPMHPD_MMCX>;
> + power-domain-names = "venus",
> + "vcodec0",
> + "mxc",
> + "mmcx";
> +
> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
> + <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
> + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>,
> + <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>;
> + reset-names = "bus0",
> + "bus1",
> + "core",
> + "vcodec0_core";
> +
> + /*
> + * IRIS firmware is signed by vendors, only
> + * enable in boards where the proper signed firmware
> + * is available.
> + */
> + status = "disabled";
> +
> + iris_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-240000000 {
> + opp-hz = /bits/ 64 <240000000>;
> + required-opps = <&rpmhpd_opp_low_svs_d1>,
> + <&rpmhpd_opp_low_svs_d1>;
> + };
> +
> + opp-338000000 {
> + opp-hz = /bits/ 64 <338000000>;
> + required-opps = <&rpmhpd_opp_low_svs>,
> + <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-420000000 {
> + opp-hz = /bits/ 64 <420000000>;
> + required-opps = <&rpmhpd_opp_svs>,
> + <&rpmhpd_opp_svs>;
> + };
> +
> + opp-444000000 {
> + opp-hz = /bits/ 64 <444000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>,
> + <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-533333334 {
> + opp-hz = /bits/ 64 <533333334>;
> + required-opps = <&rpmhpd_opp_nom>,
> + <&rpmhpd_opp_nom>;
> + };
> +
> + opp-570000000 {
> + opp-hz = /bits/ 64 <570000000>;
> + required-opps = <&rpmhpd_opp_nom_l1>,
> + <&rpmhpd_opp_nom_l1>;
> + };
> +
> + opp-630000000 {
> + opp-hz = /bits/ 64 <630000000>;
> + required-opps = <&rpmhpd_opp_turbo>,
> + <&rpmhpd_opp_turbo>;
> + };
> + };
> + };
> +
> + videocc: clock-controller@aaf0000 {
> + compatible = "qcom,sm8750-videocc";
> + reg = <0x0 0x0aaf0000 0x0 0x10000>;
> + clocks = <&bi_tcxo_div2>,
> + <&gcc GCC_VIDEO_AHB_CLK>;
> + power-domains = <&rpmhpd RPMHPD_MMCX>,
> + <&rpmhpd RPMHPD_MXC>;
> + required-opps = <&rpmhpd_opp_low_svs>,
> + <&rpmhpd_opp_low_svs>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> pdc: interrupt-controller@b220000 {
> compatible = "qcom,sm8750-pdc", "qcom,pdc";
> reg = <0x0 0x0b220000 0x0 0x10000>, <0x0 0x164400f0 0x0 0x64>;
>
> --
> 2.51.0
>
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec
2026-01-06 9:07 ` [PATCH v4 2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec Krzysztof Kozlowski
@ 2026-01-06 15:56 ` Bryan O'Donoghue
0 siblings, 0 replies; 10+ messages in thread
From: Bryan O'Donoghue @ 2026-01-06 15:56 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 06/01/2026 09:07, Krzysztof Kozlowski wrote:
> Enable on SM8750 MTP the Iris video codec for accelerated video
> encoding/decoding.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sm8750-mtp.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
> index e77fe0ce91ca..cb718331496e 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts
> @@ -925,6 +925,10 @@ vreg_l7n_3p3: ldo7 {
> };
> };
>
> +&iris {
> + status = "okay";
> +};
> +
> &lpass_vamacro {
> pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
> pinctrl-names = "default";
>
> --
> 2.51.0
>
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 3/3] arm64: dts: qcom: sm8750-qrd: Enable Iris codec
2026-01-06 9:07 ` [PATCH v4 3/3] arm64: dts: qcom: sm8750-qrd: " Krzysztof Kozlowski
@ 2026-01-06 15:56 ` Bryan O'Donoghue
0 siblings, 0 replies; 10+ messages in thread
From: Bryan O'Donoghue @ 2026-01-06 15:56 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 06/01/2026 09:07, Krzysztof Kozlowski wrote:
> Enable on SM8750 QRD the Iris video codec for accelerated video
> encoding/decoding.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sm8750-qrd.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8750-qrd.dts b/arch/arm64/boot/dts/qcom/sm8750-qrd.dts
> index 439ffb202599..801c46d55602 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750-qrd.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8750-qrd.dts
> @@ -858,6 +858,10 @@ vreg_l7n_3p3: ldo7 {
> };
> };
>
> +&iris {
> + status = "okay";
> +};
> +
> &pm8550_flash {
> status = "okay";
>
>
> --
> 2.51.0
>
>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
2026-01-06 9:07 ` [PATCH v4 1/3] " Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
@ 2026-01-06 17:13 ` Taniya Das
2026-01-08 7:54 ` Dikshita Agarwal
2 siblings, 0 replies; 10+ messages in thread
From: Taniya Das @ 2026-01-06 17:13 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 1/6/2026 2:37 PM, Krzysztof Kozlowski wrote:
> + videocc: clock-controller@aaf0000 {
> + compatible = "qcom,sm8750-videocc";
> + reg = <0x0 0x0aaf0000 0x0 0x10000>;
> + clocks = <&bi_tcxo_div2>,
> + <&gcc GCC_VIDEO_AHB_CLK>;
> + power-domains = <&rpmhpd RPMHPD_MMCX>,
> + <&rpmhpd RPMHPD_MXC>;
> + required-opps = <&rpmhpd_opp_low_svs>,
> + <&rpmhpd_opp_low_svs>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
--
Thanks,
Taniya Das
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
2026-01-06 9:07 [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Krzysztof Kozlowski
` (2 preceding siblings ...)
2026-01-06 9:07 ` [PATCH v4 3/3] arm64: dts: qcom: sm8750-qrd: " Krzysztof Kozlowski
@ 2026-01-06 17:52 ` Bjorn Andersson
3 siblings, 0 replies; 10+ messages in thread
From: Bjorn Andersson @ 2026-01-06 17:52 UTC (permalink / raw)
To: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Krzysztof Kozlowski
Cc: linux-arm-msm, devicetree, linux-kernel
On Tue, 06 Jan 2026 10:07:38 +0100, Krzysztof Kozlowski wrote:
> Changes in v4:
> - Add required-opps to fix reported dtbs_check error
> - Link to v3: https://patch.msgid.link/20251120-b4-sm8750-iris-dts-v3-0-8715442c30d9@kernel.org
>
> Changes in v3:
> - Add tags, update dependencies, rebase.
> - Add missing opp-570.
> - Link to v2: https://lore.kernel.org/r/20250806-b4-sm8750-iris-dts-v2-0-2ce197525eed@linaro.org
>
> [...]
Applied, thanks!
[1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
commit: c0d11ff904753a99e0f6efd29e614268bc6e98db
[2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec
commit: 10d764c8cb1bdaff15020115aa49ee7a0489655b
[3/3] arm64: dts: qcom: sm8750-qrd: Enable Iris codec
commit: ad0721bba4156d4d06c5f79b0a32e9d876f5ad0f
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
2026-01-06 9:07 ` [PATCH v4 1/3] " Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
2026-01-06 17:13 ` Taniya Das
@ 2026-01-08 7:54 ` Dikshita Agarwal
2 siblings, 0 replies; 10+ messages in thread
From: Dikshita Agarwal @ 2026-01-08 7:54 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 1/6/2026 2:37 PM, Krzysztof Kozlowski wrote:
> Add Iris video codec to SM8750 SoC, which comes with significantly
> different powering up sequence than previous SM8650, thus different
> clocks and resets. For consistency keep existing clock and clock-names
> naming, so the list shares common part.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sm8750.dtsi | 121 +++++++++++++++++++++++++++++++++++
> 1 file changed, 121 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> index 0a6f2a449c20..a76bf5193a70 100644
> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
> @@ -6,6 +6,7 @@
> #include <dt-bindings/clock/qcom,rpmh.h>
> #include <dt-bindings/clock/qcom,sm8750-gcc.h>
> #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
> +#include <dt-bindings/clock/qcom,sm8750-videocc.h>
> #include <dt-bindings/dma/qcom-gpi.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interconnect/qcom,icc.h>
> @@ -2811,6 +2812,126 @@ usb_dwc3_ss: endpoint {
> };
> };
>
> + iris: video-codec@aa00000 {
> + compatible = "qcom,sm8750-iris";
> + reg = <0x0 0x0aa00000 0x0 0xf0000>;
> +
> + clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> + <&videocc VIDEO_CC_MVS0C_CLK>,
> + <&videocc VIDEO_CC_MVS0_CLK>,
> + <&gcc GCC_VIDEO_AXI1_CLK>,
> + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK>,
> + <&videocc VIDEO_CC_MVS0_FREERUN_CLK>;
> + clock-names = "iface",
> + "core",
> + "vcodec0_core",
> + "iface1",
> + "core_freerun",
> + "vcodec0_core_freerun";
> +
> + dma-coherent;
> + iommus = <&apps_smmu 0x1940 0>,
> + <&apps_smmu 0x1947 0>;
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
> + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
> + <&mmss_noc MASTER_VIDEO_MVP QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> + interconnect-names = "cpu-cfg",
> + "video-mem";
> +
> + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> +
> + memory-region = <&video_mem>;
> +
> + operating-points-v2 = <&iris_opp_table>;
> +
> + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
> + <&videocc VIDEO_CC_MVS0_GDSC>,
> + <&rpmhpd RPMHPD_MXC>,
> + <&rpmhpd RPMHPD_MMCX>;
> + power-domain-names = "venus",
> + "vcodec0",
> + "mxc",
> + "mmcx";
> +
> + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
> + <&gcc GCC_VIDEO_AXI1_CLK_ARES>,
> + <&videocc VIDEO_CC_MVS0C_FREERUN_CLK_ARES>,
> + <&videocc VIDEO_CC_MVS0_FREERUN_CLK_ARES>;
> + reset-names = "bus0",
> + "bus1",
> + "core",
> + "vcodec0_core";
> +
> + /*
> + * IRIS firmware is signed by vendors, only
> + * enable in boards where the proper signed firmware
> + * is available.
> + */
> + status = "disabled";
> +
> + iris_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-240000000 {
> + opp-hz = /bits/ 64 <240000000>;
> + required-opps = <&rpmhpd_opp_low_svs_d1>,
> + <&rpmhpd_opp_low_svs_d1>;
> + };
> +
> + opp-338000000 {
> + opp-hz = /bits/ 64 <338000000>;
> + required-opps = <&rpmhpd_opp_low_svs>,
> + <&rpmhpd_opp_low_svs>;
> + };
> +
> + opp-420000000 {
> + opp-hz = /bits/ 64 <420000000>;
> + required-opps = <&rpmhpd_opp_svs>,
> + <&rpmhpd_opp_svs>;
> + };
> +
> + opp-444000000 {
> + opp-hz = /bits/ 64 <444000000>;
> + required-opps = <&rpmhpd_opp_svs_l1>,
> + <&rpmhpd_opp_svs_l1>;
> + };
> +
> + opp-533333334 {
> + opp-hz = /bits/ 64 <533333334>;
> + required-opps = <&rpmhpd_opp_nom>,
> + <&rpmhpd_opp_nom>;
> + };
> +
> + opp-570000000 {
> + opp-hz = /bits/ 64 <570000000>;
> + required-opps = <&rpmhpd_opp_nom_l1>,
> + <&rpmhpd_opp_nom_l1>;
> + };
> +
> + opp-630000000 {
> + opp-hz = /bits/ 64 <630000000>;
> + required-opps = <&rpmhpd_opp_turbo>,
> + <&rpmhpd_opp_turbo>;
> + };
> + };
> + };
Reviewed-by: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
Thanks,
Dikshita
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-01-08 7:55 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2026-01-06 9:07 [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Krzysztof Kozlowski
2026-01-06 9:07 ` [PATCH v4 1/3] " Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
2026-01-06 17:13 ` Taniya Das
2026-01-08 7:54 ` Dikshita Agarwal
2026-01-06 9:07 ` [PATCH v4 2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
2026-01-06 9:07 ` [PATCH v4 3/3] arm64: dts: qcom: sm8750-qrd: " Krzysztof Kozlowski
2026-01-06 15:56 ` Bryan O'Donoghue
2026-01-06 17:52 ` [PATCH v4 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Bjorn Andersson
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