From: Shrikanth Hegde <sshegde@linux.ibm.com>
To: Andrea Righi <arighi@nvidia.com>
Cc: Ingo Molnar <mingo@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Steven Rostedt <rostedt@goodmis.org>,
Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
Valentin Schneider <vschneid@redhat.com>,
Christian Loehle <christian.loehle@arm.com>,
Koba Ko <kobak@nvidia.com>,
Felix Abecassis <fabecassis@nvidia.com>,
Balbir Singh <balbirs@nvidia.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/4] sched/fair: SMT-aware asymmetric CPU capacity
Date: Sat, 28 Mar 2026 12:21:19 +0530 [thread overview]
Message-ID: <caf7edc4-abb8-4a1d-8a55-af1b19c50624@linux.ibm.com> (raw)
In-Reply-To: <aca5jOh0mWCJlCp8@gpd4>
>> How is the performance measured here? Which benchmark?
>
> I've used an internal NVIDIA suite (based on NVBLAS), I also tried Linpack
> and got similar results. I'm planning to repeat the tests using public
> benchmarks and share the results as soon as I can.
>
>> By any chance you are running number_running_task <= (nr_cpus / smt_threads_per_core),
>> so it is all fitting nicely?
>
> That's the case that gives me the optimal results.
>
>>
>> If you increase those numbers, how does the performance numbers compare?
>
> I tried different number of tasks. The more I approach system saturation
> the smaller the benefits are. When I completely saturate the system I don't
> see any benefit with this changes, neither regressions, but I guess that's
> expected.
>
Ok. That's good.
I gave hackbench on powerpc with SMT=4, i didn't observe any regressions or improvements.
Only PATCH 4/4 applies in this case as there is no asym_cpu_capacity
next prev parent reply other threads:[~2026-03-28 6:51 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-26 15:02 Andrea Righi
2026-03-26 15:02 ` [PATCH 1/4] sched/fair: Prefer fully-idle SMT cores in asym-capacity idle selection Andrea Righi
2026-03-27 8:09 ` Vincent Guittot
2026-03-27 9:46 ` Andrea Righi
2026-03-27 10:44 ` K Prateek Nayak
2026-03-27 10:58 ` Andrea Righi
2026-03-27 11:14 ` K Prateek Nayak
2026-03-27 16:39 ` Andrea Righi
2026-03-30 10:17 ` K Prateek Nayak
2026-03-30 13:07 ` Vincent Guittot
2026-03-30 13:22 ` Andrea Righi
2026-03-30 13:46 ` Andrea Righi
2026-03-26 15:02 ` [PATCH 2/4] sched/fair: Reject misfit pulls onto busy SMT siblings on asym-capacity Andrea Righi
2026-03-26 15:02 ` [PATCH 3/4] sched/fair: Enable EAS with SMT on SD_ASYM_CPUCAPACITY systems Andrea Righi
2026-03-27 8:09 ` Vincent Guittot
2026-03-27 9:45 ` Andrea Righi
2026-03-26 15:02 ` [PATCH 4/4] sched/fair: Prefer fully-idle SMT core for NOHZ idle load balancer Andrea Righi
2026-03-27 8:45 ` Vincent Guittot
2026-03-27 9:44 ` Andrea Righi
2026-03-27 11:34 ` K Prateek Nayak
2026-03-27 20:36 ` Andrea Righi
2026-03-27 22:45 ` Andrea Righi
2026-03-30 17:29 ` Andrea Righi
2026-03-27 13:44 ` Shrikanth Hegde
2026-03-26 16:33 ` [PATCH 0/4] sched/fair: SMT-aware asymmetric CPU capacity Christian Loehle
2026-03-27 6:52 ` Andrea Righi
2026-03-27 16:31 ` Shrikanth Hegde
2026-03-27 17:08 ` Andrea Righi
2026-03-28 6:51 ` Shrikanth Hegde [this message]
2026-03-28 13:03 ` Balbir Singh
2026-03-28 22:50 ` Andrea Righi
2026-03-29 21:36 ` Balbir Singh
2026-03-30 22:30 ` Dietmar Eggemann
2026-03-31 9:04 ` Andrea Righi
2026-04-01 11:57 ` Dietmar Eggemann
2026-04-01 12:08 ` Vincent Guittot
2026-04-01 12:42 ` Andrea Righi
2026-04-01 13:12 ` Andrea Righi
2026-04-03 11:47 ` Dietmar Eggemann
2026-04-03 14:45 ` Andrea Righi
2026-04-03 20:44 ` Andrea Righi
2026-04-07 11:50 ` Dietmar Eggemann
2026-04-07 19:16 ` Andrea Righi
2026-04-03 11:47 ` Dietmar Eggemann
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