* [PATCH v3 1/2] dt-bindings: eeprom: at25: add Microchip 25AA128
2026-09-25 4:15 [PATCH v3 0/2] arm64: dts: agilex5: add support for debug daughter card Adrian Ng Ho Yin
@ 2026-09-25 4:15 ` Adrian Ng Ho Yin
2026-09-25 4:15 ` [PATCH v3 2/2] arm64: dts: agilex5: add support for debug daughter card Adrian Ng Ho Yin
1 sibling, 0 replies; 3+ messages in thread
From: Adrian Ng Ho Yin @ 2026-09-25 4:15 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Christian Eggers, devicetree, linux-kernel
Cc: Adrian Ng Ho Yin
Add the vendor-specific compatible for the Microchip 25AA128 SPI EEPROM.
New device trees should pair it with "atmel,at25" rather than using the
bare "atmel,at25" fallback alone.
Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
---
Documentation/devicetree/bindings/eeprom/at25.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml
index bb78e12b8823..dda69e4d62bf 100644
--- a/Documentation/devicetree/bindings/eeprom/at25.yaml
+++ b/Documentation/devicetree/bindings/eeprom/at25.yaml
@@ -32,6 +32,7 @@ properties:
- fujitsu,mb85rs256
- fujitsu,mb85rs64
- microchip,25aa010a
+ - microchip,25aa128
- microchip,at25160bn
- microchip,25lc040
- st,m95m02
--
2.49.GIT
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH v3 2/2] arm64: dts: agilex5: add support for debug daughter card
2026-09-25 4:15 [PATCH v3 0/2] arm64: dts: agilex5: add support for debug daughter card Adrian Ng Ho Yin
2026-09-25 4:15 ` [PATCH v3 1/2] dt-bindings: eeprom: at25: add Microchip 25AA128 Adrian Ng Ho Yin
@ 2026-09-25 4:15 ` Adrian Ng Ho Yin
1 sibling, 0 replies; 3+ messages in thread
From: Adrian Ng Ho Yin @ 2026-09-25 4:15 UTC (permalink / raw)
To: Dinh Nguyen, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Christian Eggers, devicetree, linux-kernel
Cc: Adrian Ng Ho Yin
The debug daughter card replaces gmac2 with gmac0 for Ethernet, leaves
gpio0 unrouted (HPS LED on gpio1/portb), and adds a Microchip 25AA128
16 KByte SPI EEPROM on spi0. Retain the SoC dmas/dma-names on spi0 so
the DT continues to describe the hardware DMA wiring. Set
spi-max-frequency to 500 kHz for board signal-integrity limits.
Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
---
arch/arm64/boot/dts/intel/Makefile | 1 +
.../dts/intel/socfpga_agilex5_socdk_debug.dts | 121 ++++++++++++++++++
2 files changed, 122 insertions(+)
create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_debug.dts
diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index b52cd2330cef..96dcbeed032c 100644
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
socfpga_agilex3_socdk.dtb \
socfpga_agilex5_socdk.dtb \
socfpga_agilex5_socdk_013b.dtb \
+ socfpga_agilex5_socdk_debug.dtb \
socfpga_agilex5_socdk_emmc.dtb \
socfpga_agilex5_socdk_modular.dtb \
socfpga_agilex5_socdk_nand.dtb \
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_debug.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_debug.dts
new file mode 100644
index 000000000000..b7b53576a136
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_debug.dts
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2026, Altera Corporation
+ */
+#include "socfpga_agilex5.dtsi"
+
+/ {
+ model = "SoCFPGA Agilex5 SoCDK - debug daughter card";
+ compatible = "intel,socfpga-agilex5-socdk-debug", "intel,socfpga-agilex5";
+
+ aliases {
+ serial0 = &uart0;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ ethernet2 = &gmac2;
+ i3c0 = &i3c0;
+ i3c1 = &i3c1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ label = "hps_led0";
+ /* gpio0 is unrouted on the debug daughter card; LED is on gpio1 */
+ gpios = <&portb 12 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the reg */
+ reg = <0x0 0x80000000 0x0 0x0>;
+ };
+};
+
+&gmac0 {
+ status = "okay";
+ phy-mode = "rgmii"; /* TX/RX clock delays provided by Agilex5 I/O hardware */
+ phy-handle = <&emac0_phy0>;
+ max-frame-size = <9000>;
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ emac0_phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&osc1 {
+ clock-frequency = <25000000>;
+};
+
+&qspi {
+ status = "okay";
+ flash@0 {
+ compatible = "micron,mt25qu02g", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <100000000>;
+ m25p,fast-read;
+ cdns,read-delay = <2>;
+ cdns,tshsl-ns = <50>;
+ cdns,tsd2d-ns = <50>;
+ cdns,tchsh-ns = <4>;
+ cdns,tslch-ns = <4>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qspi_boot: partition@0 {
+ label = "Boot and fpga data";
+ reg = <0x0 0x04200000>;
+ };
+
+ root: partition@4200000 {
+ label = "root";
+ reg = <0x04200000 0x0be00000>;
+ };
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ eeprom@0 {
+ compatible = "microchip,25aa128", "atmel,at25";
+ reg = <0>;
+ spi-max-frequency = <500000>;
+ size = <16384>;
+ pagesize = <64>;
+ address-width = <16>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb31 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&watchdog0 {
+ status = "okay";
+};
--
2.49.GIT
^ permalink raw reply [flat|nested] 3+ messages in thread