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From: Harshal Dev <harshal.dev@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Basant Kumar <basantk@qti.qualcomm.com>,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-crypto@vger.kernel.org,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Abel Vesa <abelvesa@kernel.org>,
	Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>,
	Neeraj Soni <neeraj.soni@oss.qualcomm.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>,
	Sumit Garg <sumit.garg@oss.qualcomm.com>,
	Selvam Sathappan Periakaruppan
	<selvam.periakaruppan@oss.qualcomm.com>
Subject: Re: [PATCH 3/5] firmware: qcom: Add an TEE bus based ICE back-end
Date: Sun, 25 Oct 2026 21:51:12 +0530	[thread overview]
Message-ID: <da0ad591-7111-4e8f-9d31-3466f6b93ff7@oss.qualcomm.com> (raw)
In-Reply-To: <48e7d80c-ddd3-4a53-82d8-588c3c439709@oss.qualcomm.com>

Hi Konrad,

On 24-10-2026 07:16 pm, Harshal Dev wrote:
> Hi Konrad,
> 
> On 22-10-2026 01:21 pm, Konrad Dybcio wrote:
>> On 10/21/26 5:43 PM, Harshal Dev wrote:
>>> Add support for a TEE client driver which forwards calls from the Inline
>>> Crypto Engine (ICE) service (invoked by the ICE driver) to the OPTEE ICE
>>> Psuedo-TA.
>>>
>>> The ICE PTA supports both ICE Legacy and Standard modes. In Standard mode
>>> Hardware Key Manager v1 is supported.
>>>
>>> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>
>>> ---
>> [...]
>>
>>> +	ret = tee_client_invoke_func(data->ctx, &inv_arg, param);
>>> +	if (ret < 0 || inv_arg.ret != 0) {
>>> +		dev_err(dev,
>>> +			"ICE generate_key failed, ret=%d, err=0x%x\n",
>>> +			ret, inv_arg.ret);
>>> +		ret = ret ?: -EINVAL;
>>> +		goto out;
>>> +	}
>>> +
>>> +	buf = tee_shm_get_va(key_shm, 0);
>>
>> This can return an ERR_PTR()
>>
>>
> 
> Ack. 
>>> +	out_size = param[0].u.memref.size;
>>
>> This returned size is not validated, there are a couple occurences
>> of that
>>
>>
>>
> 
> Ack, will fix in qcom_ice_tee_wrapped_key_call() as well. 
>>> +
>>> +	memcpy(lt_key, buf, lt_key_size);
>>> +	memzero_explicit(buf, out_size);
>>> +out:
>>> +	tee_shm_free(key_shm);
>>
>> LLM is concerned about freeing the key without zeroing the memory
>> first
>>
> 
> When the TEE invoke call fails, the TEE must not touch the out_buf.
> We trust the TEE to behave correctly, since it is a 'Trusted' EE after all. :)
> 
> When we fail after a successful call from the TEE, we must clear the buffer.
> I will check for returned size and ERR_PTR() and clear the out_buf in that
> case.
> 
> Ack. 
>>> +static int qcom_ice_tee_probe(struct tee_client_device *ice_dev)
>>> +{
>>> +	struct device *dev = &ice_dev->dev;
>>> +	struct qcom_ice_tee_private *data;
>>> +	struct tee_ioctl_open_session_arg sess_arg = {
>>> +		.clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL,
>>> +	};
>>> +	int ret, err = -ENODEV;
>>> +
>>> +	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
>>> +	if (!data)
>>> +		return -ENOMEM;
>>> +
>>> +	data->ctx = tee_client_open_context(NULL, optee_ctx_match, NULL, NULL);
>>> +	if (IS_ERR(data->ctx))
>>> +		return -ENODEV;
>>> +
>>> +	export_uuid(sess_arg.uuid, &ice_dev->id.uuid);
>>> +	ret = tee_client_open_session(data->ctx, &sess_arg, NULL);
>>> +	if (ret < 0 || sess_arg.ret != 0) {
>>> +		dev_err(dev,
>>> +			"tee_client_open_session failed, ret=%d, err=0x%x\n",
>>> +			ret, sess_arg.ret);
>>> +		err = ret ?: -EINVAL;
>>> +		goto out_ctx;
>>
>> Should we care about the specific retval that comes from the TEE?
>>
> 
> Traditionally TEE client drivers do not map the TEE error codes to kernel ones
> since a 1-1 mapping is not always possible. Also, since the ICE client driver whose
> calls land into this API via the intermediate ICE service would not know whether
> it is calling into QTEE or OPTEE, any error-code mapping we create here would
> possibly conflict with the ones returned from QTEE.
> 
> So returning a generic error code while printing the specific TEE error in the log
> helps keep things simple and easy to debug.
> 
> I'm open to any alternative suggestions.
> 
>  
>>> +	}
>>> +
>>> +	data->session_id = sess_arg.session;
>>> +	dev_set_drvdata(dev, data);
>>> +
>>> +	qcom_ice_ops_tee.dev = dev;
>>> +	qcom_ice_svc_ops_register(&qcom_ice_ops_tee);
>>
>> This can fail (but it currently returns void)
>>
> 
> Practically it can never fail because if the platform boots with OPTEE, QCOM_SCM never

[...]

> Hypothetically it could fail. If it fails:

[...]

> I can cover this hypothetical scenario by making the function return a failure which
> QCOM_SCM ignores but this driver interprets as fatal. But it could open another Pandora's
> box of compiler/static analysis tool warnings.
> 
> Let me know.

I'd like to backtrack on this one particular comment. I think it's better to simply
return a value as suggested by you and print it when it isn't fatal in the case of
QCOM_SCM driver. In the case of ICE TEE, I'll fail probe here when it returns error.

Ack.

Regards,
Harshal
> Regards,
> Harshal 
>> Konrad
> 


  reply	other threads:[~2026-10-25 16:21 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-21 15:43 [PATCH 0/5] Add support for a TEE agnostic Inline Crypto Engine service Harshal Dev
2026-10-21 15:43 ` [PATCH 1/5] firmware: qcom: Add a generic ICE service Harshal Dev
2026-10-22  7:45   ` Konrad Dybcio
2026-10-24 13:46     ` Harshal Dev
2026-10-21 15:43 ` [PATCH 2/5] firmware: qcom_scm: Transition to the " Harshal Dev
2026-10-23  7:21   ` Abel Vesa
2026-10-21 15:43 ` [PATCH 3/5] firmware: qcom: Add an TEE bus based ICE back-end Harshal Dev
2026-10-22  7:47   ` Konrad Dybcio
2026-10-24 13:46     ` Harshal Dev
2026-10-22  7:51   ` Konrad Dybcio
2026-10-24 13:46     ` Harshal Dev
2026-10-25 16:21       ` Harshal Dev [this message]
2026-10-22  7:52   ` Konrad Dybcio
2026-10-24 13:47     ` Harshal Dev
2026-10-21 15:43 ` [PATCH 4/5] soc: qcom: ice: Migrate to the generic ICE service Harshal Dev
2026-10-23  7:15   ` Abel Vesa
2026-10-21 15:43 ` [PATCH 5/5] firmware: qcom: scm: Drop exported ICE wrapper functions Harshal Dev
2026-10-23  7:16   ` Abel Vesa
2026-10-24 18:56 ` [PATCH 0/5] Add support for a TEE agnostic Inline Crypto Engine service Eric Biggers
2026-10-25 16:46   ` Harshal Dev
2026-10-25 17:19     ` Eric Biggers

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