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From: Tim Chen <tim.c.chen@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Andy Lutomirski <luto@kernel.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Greg KH <gregkh@linuxfoundation.org>
Cc: Tim Chen <tim.c.chen@linux.intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Andrea Arcangeli <aarcange@redhat.com>,
	Andi Kleen <ak@linux.intel.com>,
	Arjan Van De Ven <arjan.van.de.ven@intel.com>,
	David Woodhouse <dwmw@amazon.co.uk>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 2/8] x86/enter: MACROS to set/clear IBRS
Date: Fri,  5 Jan 2018 18:12:17 -0800	[thread overview]
Message-ID: <da65ff098334fc1c278bee1adb728932b24e12a7.1515204614.git.tim.c.chen@linux.intel.com> (raw)
In-Reply-To: <cover.1515204614.git.tim.c.chen@linux.intel.com>
In-Reply-To: <cover.1515204614.git.tim.c.chen@linux.intel.com>

Create macros to control IBRS.  Use these macros to enable IBRS on kernel entry
paths and disable IBRS on kernel exit paths.

The registers rax, rcx and rdx are touched when controlling IBRS
so they need to be saved when they can't be clobbered.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
---
 arch/x86/entry/calling.h | 74 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 74 insertions(+)

diff --git a/arch/x86/entry/calling.h b/arch/x86/entry/calling.h
index 45a63e0..09c870d 100644
--- a/arch/x86/entry/calling.h
+++ b/arch/x86/entry/calling.h
@@ -6,6 +6,8 @@
 #include <asm/percpu.h>
 #include <asm/asm-offsets.h>
 #include <asm/processor-flags.h>
+#include <asm/msr-index.h>
+#include <asm/cpufeatures.h>
 
 /*
 
@@ -347,3 +349,75 @@ For 32-bit we have the following conventions - kernel is built with
 .Lafter_call_\@:
 #endif
 .endm
+
+/*
+ * IBRS related macros
+ */
+
+.macro PUSH_MSR_REGS
+	pushq	%rax
+	pushq	%rcx
+	pushq	%rdx
+.endm
+
+.macro POP_MSR_REGS
+	popq	%rdx
+	popq	%rcx
+	popq	%rax
+.endm
+
+.macro WRMSR_ASM msr_nr:req eax_val:req
+	movl	\msr_nr, %ecx
+	movl	$0, %edx
+	movl	\eax_val, %eax
+.endm
+
+.macro ENABLE_IBRS
+	ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_SPEC_CTRL
+	PUSH_MSR_REGS
+	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_ENABLE_IBRS
+	POP_MSR_REGS
+.Lskip_\@:
+.endm
+
+.macro DISABLE_IBRS
+	ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_SPEC_CTRL
+	PUSH_MSR_REGS
+	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_DISABLE_IBRS
+	POP_MSR_REGS
+.Lskip_\@:
+.endm
+
+.macro ENABLE_IBRS_CLOBBER
+	ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_SPEC_CTRL
+	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_ENABLE_IBRS
+.Lskip_\@:
+.endm
+
+.macro DISABLE_IBRS_CLOBBER
+	ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_SPEC_CTRL
+	WRMSR_ASM $MSR_IA32_SPEC_CTRL, $SPEC_CTRL_FEATURE_DISABLE_IBRS
+.Lskip_\@:
+.endm
+
+.macro ENABLE_IBRS_SAVE_AND_CLOBBER save_reg:req
+	ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_SPEC_CTRL
+	movl	$MSR_IA32_SPEC_CTRL, %ecx
+	rdmsr
+	movl	%eax, \save_reg
+
+	movl	$0, %edx
+	movl	$SPEC_CTRL_FEATURE_ENABLE_IBRS, %eax
+	wrmsr
+.Lskip_\@:
+.endm
+
+.macro RESTORE_IBRS_CLOBBER save_reg:req
+	ALTERNATIVE "jmp .Lskip_\@", "", X86_FEATURE_SPEC_CTRL
+	/* Set IBRS to the value saved in the save_reg */
+	movl    $MSR_IA32_SPEC_CTRL, %ecx
+	movl    $0, %edx
+	movl    \save_reg, %eax
+	wrmsr
+.Lskip_\@:
+.endm
-- 
2.9.4

  parent reply	other threads:[~2018-01-06  2:33 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-06  2:12 [PATCH v2 0/8] IBRS patch series Tim Chen
2018-01-06  2:12 ` [PATCH v2 1/8] x86/feature: Detect the x86 IBRS feature to control Speculation Tim Chen
2018-01-06 12:56   ` Borislav Petkov
2018-01-07 17:14     ` Tim Chen
2018-01-07 18:31       ` Borislav Petkov
2018-01-09 18:13     ` Dave Hansen
2018-01-09 18:55       ` Borislav Petkov
2018-01-08 16:14   ` Paolo Bonzini
2018-01-09 10:39   ` Paolo Bonzini
2018-01-09 17:53     ` Tim Chen
2018-01-09 17:58       ` Paolo Bonzini
2018-01-09 22:59         ` Tim Chen
2018-01-18 23:28   ` Andy Lutomirski
2018-01-06  2:12 ` Tim Chen [this message]
2018-01-07 12:03   ` [PATCH v2 2/8] x86/enter: MACROS to set/clear IBRS Borislav Petkov
2018-01-07 17:12     ` Tim Chen
2018-01-07 18:44       ` Borislav Petkov
2018-01-08 22:24     ` Tim Chen
2018-01-06  2:12 ` [PATCH v2 3/8] x86/enter: Use IBRS on syscall and interrupts Tim Chen
2018-01-07 19:27   ` Borislav Petkov
2018-01-06  2:12 ` [PATCH v2 4/8] x86/spec_ctrl: Add sysctl knobs to enable/disable SPEC_CTRL feature Tim Chen
2018-01-06  3:12   ` Dave Hansen
2018-01-08 12:47     ` Peter Zijlstra
2018-01-08 16:14       ` Peter Zijlstra
2018-01-08 17:28         ` Tim Chen
2018-01-08 17:42           ` Peter Zijlstra
2018-01-08 19:34             ` Woodhouse, David
2018-01-08 19:52               ` Lu, Hongjiu
2018-01-09 10:40             ` Thomas Gleixner
2018-01-09 17:55               ` Tim Chen
2018-01-09 18:13                 ` David Woodhouse
2018-01-09 20:31                   ` Tim Chen
2018-01-27 13:59         ` Konrad Rzeszutek Wilk
2018-01-27 14:26           ` David Woodhouse
2018-01-06  8:54   ` Greg KH
2018-01-06 18:10     ` Tim Chen
2018-01-06 21:25       ` Konrad Rzeszutek Wilk
2018-01-07  8:20         ` Greg KH
2018-01-06 14:41   ` Konrad Rzeszutek Wilk
2018-01-06 17:33     ` Dave Hansen
2018-01-06 17:41       ` Van De Ven, Arjan
2018-01-06 19:22         ` Dave Hansen
2018-01-06 19:47           ` Thomas Gleixner
2018-01-06 21:32             ` Konrad Rzeszutek Wilk
2018-01-06 21:34               ` Van De Ven, Arjan
2018-01-06 21:41                 ` Konrad Rzeszutek Wilk
2018-01-06 21:44                   ` Van De Ven, Arjan
2018-01-06 21:39               ` Thomas Gleixner
2018-01-06 21:46                 ` Is: Linus, name for 'spectre' variable. Was:Re: " Konrad Rzeszutek Wilk
2018-01-06 18:23       ` Tim Chen
2018-01-06 18:20     ` Tim Chen
2018-01-08 15:08   ` Peter Zijlstra
2018-01-08 15:29     ` Van De Ven, Arjan
2018-01-08 17:02       ` Tim Chen
2018-01-08 15:11   ` Peter Zijlstra
2018-01-08 15:15   ` Peter Zijlstra
2018-01-08 15:53   ` Peter Zijlstra
2018-01-09  0:29   ` Borislav Petkov
2018-01-09 18:05     ` Tim Chen
2018-01-06  2:12 ` [PATCH v2 5/8] x86/idle: Disable IBRS entering idle and enable it on wakeup Tim Chen
2018-01-06  2:12 ` [PATCH v2 6/8] x86/microcode: Recheck IBRS features on microcode reload Tim Chen
2018-01-06 12:09   ` Woodhouse, David
2018-01-09  0:34   ` Borislav Petkov
2018-01-06  2:12 ` [PATCH v2 7/8] x86: Do not use dynamic IBRS if retpoline is enabled Tim Chen
2018-01-06  2:12 ` [PATCH v2 8/8] x86: Use IBRS for firmware update path Tim Chen
2018-01-06  8:55   ` Greg KH
2018-01-06  8:57   ` Greg KH
2018-01-06  6:43 ` [PATCH v2 0/8] IBRS patch series Tim Chen
2018-01-06 12:00   ` Woodhouse, David
2018-01-06 12:11 ` Woodhouse, David
     [not found] <CAD4b4WJYMM1_r1MtEsj5zKbMT5hbVGA-vYAHyvQG0ww-9i1GKw@mail.gmail.com>
     [not found] ` <CAD4b4WL2eoiDF1BpoUaL8EwKNWLGcX7_4embJu-qmOB_BDVk-A@mail.gmail.com>
     [not found]   ` <CAD4b4WKoytFLp+d0tgRHuN-O9Or8_C6VR9zg70-PF2=dd4T-8g@mail.gmail.com>
     [not found]     ` <CAD4b4W+Hqkc7Hx977sb6wVAK9oZMh_PdkP_r-MGhKvZ3BYeKJA@mail.gmail.com>
     [not found]       ` <CAD4b4WKNnjww_cayBDgE5XPSF=arC8+BC_i6Py=Ac4_90mO7qQ@mail.gmail.com>
     [not found]         ` <CAD4b4WJp18P261mq8MGMus8=bWgut3TT-iGqO2f+F-cVK+c5LA@mail.gmail.com>
     [not found]           ` <CAD4b4WJX=s+XTrkXp0_JxLgK79PnFmCiWV4ifKFevoW8JoLP2g@mail.gmail.com>
     [not found]             ` <CAD4b4WKbzFLE4K1u3OTyW=us1PRHoDxfiF1yAbPaZmWauCB5_A@mail.gmail.com>
     [not found]               ` <CAD4b4WKsb3R_TieHrcY9RB6jLLAREJgq5ua4xqvTPRV6MNi4Kg@mail.gmail.com>
2018-01-17 21:40                 ` [PATCH v2 2/8] x86/enter: MACROS to set/clear IBRS Tim Chen

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