From: Florian Fainelli <florian.fainelli@broadcom.com>
To: Kamal Dasu <kamal.dasu@broadcom.com>,
adrian.hunter@intel.com, ulf.hansson@linaro.org,
florian.fainelli@broadcom.com
Cc: bcm-kernel-feedback-list@broadcom.com, linux-mmc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] mmc: sdhci-brcmstb: use correct register offset for V1 pin_sel restore
Date: Tue, 17 Feb 2026 10:47:22 -0800 [thread overview]
Message-ID: <dd8c6277-9ca0-4d9f-88bb-362c5b96843b@broadcom.com> (raw)
In-Reply-To: <20260216191543.2514647-1-kamal.dasu@broadcom.com>
On 2/16/26 11:15, Kamal Dasu wrote:
> The restore path for SDIO_CFG_CORE_V1 was incorrectly using
> SDIO_CFG_SD_PIN_SEL (offset 0x44) instead of SDIO_CFG_V1_SD_PIN_SEL
> (offset 0x54), causing the wrong register to be written on resume.
> The save path already uses the correct V1-specific offset. This
> affects BCM7445 and BCM72116 platforms which use the V1 config core.
>
> Fixes: b7e614802e3f ("mmc: sdhci-brcmstb: save and restore registers during PM")
> Signed-off-by: Kamal Dasu <kamal.dasu@broadcom.com>
Late to the party but:
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
--
Florian
next prev parent reply other threads:[~2026-02-17 18:47 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-16 19:15 Kamal Dasu
2026-02-17 14:55 ` Ulf Hansson
2026-02-17 18:47 ` Florian Fainelli [this message]
2026-02-18 11:28 ` Ulf Hansson
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