[PATCH 0/2] MT8195 Cherry: Assign MFG vregs for power saving

[PATCH 0/2] MT8195 Cherry: Assign MFG vregs for power saving

[AngeloGioacchino Del Regno]

This series assigns the right regulators to MFG0 and MFG1, respectively
VGPU (GPU Core) and VSRAM_OTHERS (GPU SRAM), and removes the property
regulator-always-on from both.

This allows to save power both during runtime suspend and during system
sleep; specifically because:
 1. The GPU SRAM regulator is switched off during runtime suspend
 2. The GPU Core regulator is switched off during system sleep

Of course, in order for those power saving actions to actually take
place, it is required to also have the code in [1].
Anyway, even without series [1], this will not introduce any unstability
as the Vgpu regulator will simply not ever get turned off.

[1]: https://lore.kernel.org/r/20231030132257.85379-1-angelogioacchino.delregno@collabora.com

AngeloGioacchino Del Regno (2):
  arm64: dts: mediatek: mt8195-cherry: Add MFG0 domain supply
  arm64: dts: mediatek: mt8195-cherry: Assign sram supply to MFG1 pd

 arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 10 ++++++++--
 arch/arm64/boot/dts/mediatek/mt8195.dtsi        |  2 +-
 2 files changed, 9 insertions(+), 3 deletions(-)

-- 
2.42.0

[PATCH 1/2] arm64: dts: mediatek: mt8195-cherry: Add MFG0 domain supply

[AngeloGioacchino Del Regno]

MFG0 is the main power domain for the GPU and its surrounding glue
logic, and has a specific power rail.

Add its power supply on Cherry platforms and remove the now useless
(and wrong) regulator-always-on property from the vbuck1 regulator.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 2c2f079600ba..26213100419a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -478,6 +478,10 @@ pmic@34 {
 	};
 };
 
+&mfg0 {
+	domain-supply = <&mt6315_7_vbuck1>;
+};
+
 &mmc0 {
 	status = "okay";
 
@@ -1231,7 +1235,6 @@ mt6315_7_vbuck1: vbuck1 {
 				regulator-enable-ramp-delay = <256>;
 				regulator-ramp-delay = <6250>;
 				regulator-allowed-modes = <0 1 2>;
-				regulator-always-on;
 			};
 		};
 	};
-- 
2.42.0

[PATCH 2/2] arm64: dts: mediatek: mt8195-cherry: Assign sram supply to MFG1 pd

[AngeloGioacchino Del Regno]

Add a phandle to the MT8195_POWER_DOMAIN_MFG1 power domain and
assign the GPU SRAM (vsram_others) supply to that in mt8195-cherry:
this allows to keep the sram powered up while the GPU is used.

This means that it's now possible to remove the regulator-always-on
property from the mt6359_vsram_others_ldo_reg vreg, so that it will
be switched on and off during suspend.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 5 ++++-
 arch/arm64/boot/dts/mediatek/mt8195.dtsi        | 2 +-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 26213100419a..9d0f3d25cb07 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -482,6 +482,10 @@ &mfg0 {
 	domain-supply = <&mt6315_7_vbuck1>;
 };
 
+&mfg1 {
+	domain-supply = <&mt6359_vsram_others_ldo_reg>;
+};
+
 &mmc0 {
 	status = "okay";
 
@@ -552,7 +556,6 @@ &mt6359_vrf12_ldo_reg {
 
 /* for GPU SRAM */
 &mt6359_vsram_others_ldo_reg {
-	regulator-always-on;
 	regulator-min-microvolt = <750000>;
 	regulator-max-microvolt = <750000>;
 };
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 79934cf051b9..8136d7631166 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -538,7 +538,7 @@ mfg0: power-domain@MT8195_POWER_DOMAIN_MFG0 {
 					#size-cells = <0>;
 					#power-domain-cells = <1>;
 
-					power-domain@MT8195_POWER_DOMAIN_MFG1 {
+					mfg1: power-domain@MT8195_POWER_DOMAIN_MFG1 {
 						reg = <MT8195_POWER_DOMAIN_MFG1>;
 						clocks = <&apmixedsys CLK_APMIXED_MFGPLL>,
 							 <&topckgen CLK_TOP_MFG_CORE_TMP>;
-- 
2.42.0

Re: [PATCH 0/2] MT8195 Cherry: Assign MFG vregs for power saving

[Chen-Yu Tsai]

On Mon, Oct 30, 2023 at 9:25 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> This series assigns the right regulators to MFG0 and MFG1, respectively
> VGPU (GPU Core) and VSRAM_OTHERS (GPU SRAM), and removes the property
> regulator-always-on from both.
>
> This allows to save power both during runtime suspend and during system
> sleep; specifically because:
>  1. The GPU SRAM regulator is switched off during runtime suspend
>  2. The GPU Core regulator is switched off during system sleep
>
> Of course, in order for those power saving actions to actually take
> place, it is required to also have the code in [1].
> Anyway, even without series [1], this will not introduce any unstability
> as the Vgpu regulator will simply not ever get turned off.
>
> [1]: https://lore.kernel.org/r/20231030132257.85379-1-angelogioacchino.delregno@collabora.com
>
> AngeloGioacchino Del Regno (2):
>   arm64: dts: mediatek: mt8195-cherry: Add MFG0 domain supply
>   arm64: dts: mediatek: mt8195-cherry: Assign sram supply to MFG1 pd

Tested-by: Chen-Yu Tsai <wenst@chromium.org>

on Tomato without the power saving patches. Regulators are correctly
requested and I can see the SRAM regulator get turned on and off with
GPU usage.

Re: [PATCH 0/2] MT8195 Cherry: Assign MFG vregs for power saving

[AngeloGioacchino Del Regno]

Il 31/10/23 10:19, Chen-Yu Tsai ha scritto:
> On Mon, Oct 30, 2023 at 9:25 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> This series assigns the right regulators to MFG0 and MFG1, respectively
>> VGPU (GPU Core) and VSRAM_OTHERS (GPU SRAM), and removes the property
>> regulator-always-on from both.
>>
>> This allows to save power both during runtime suspend and during system
>> sleep; specifically because:
>>   1. The GPU SRAM regulator is switched off during runtime suspend
>>   2. The GPU Core regulator is switched off during system sleep
>>
>> Of course, in order for those power saving actions to actually take
>> place, it is required to also have the code in [1].
>> Anyway, even without series [1], this will not introduce any unstability
>> as the Vgpu regulator will simply not ever get turned off.
>>
>> [1]: https://lore.kernel.org/r/20231030132257.85379-1-angelogioacchino.delregno@collabora.com
>>
>> AngeloGioacchino Del Regno (2):
>>    arm64: dts: mediatek: mt8195-cherry: Add MFG0 domain supply
>>    arm64: dts: mediatek: mt8195-cherry: Assign sram supply to MFG1 pd
> 
> Tested-by: Chen-Yu Tsai <wenst@chromium.org>
> 
> on Tomato without the power saving patches. Regulators are correctly
> requested and I can see the SRAM regulator get turned on and off with
> GPU usage.

Yes, I confirm that the sram vreg going on/off is expected even without the power
saving patches (as the power domain refcount decreases during runtime suspend).

Thanks!

Angelo