[PATCH 0/3] mtd: rawnand: pl353: Fixes and software ECC support

[PATCH 0/3] mtd: rawnand: pl353: Fixes and software ECC support

[Miquel Raynal (DAVE)]

Following the previous reports from Andrea, here are a couple of fixes,
making sure the software ECC support works flawlessly and is compatible
with U-Boot.

Link: https://lore.kernel.org/linux-mtd/MI2P293MB02644DC5515E56A2539C65739765A@MI2P293MB0264.ITAP293.PROD.OUTLOOK.COM/

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
Miquel Raynal (DAVE) (3):
      mtd: rawnand: pl353: Update timings at the right moment
      mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses
      mtd: rawnand: pl353: Fix debug prints

 drivers/mtd/nand/raw/pl35x-nand-controller.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)
---
base-commit: 4691d2a70b587e94717820d96a5b55f2b10942b9
change-id: 20260522-dave-upstream-nand-fixes-5aa6d106e7c3

Best regards,
-- 
Miquel Raynal <miquel.raynal@bootlin.com>

[PATCH 1/3] mtd: rawnand: pl353: Update timings at the right moment

[Miquel Raynal (DAVE)]

If several CE are wired, we would write the registers for every chip one
after the other, and reselect the correct timings for the first chip the
use wants to use after probe. This is not exactly efficient and could
slightly be improved since we already have a helper that applies the
configuration if there is a chip change. Instead of programming the
registers in ->setup_interface(), let's just drop the pointer to the
chip and let the nand_select_target() helper do its magic.

Cc: Olivier Sobrie <olivier@sobrie.be>
Signed-off-by: Miquel Raynal (DAVE) <miquel.raynal@bootlin.com>
---
Olivier,

This is an enhancement to your previous patch which already
works. Can you please tell me if that change is okay for you?

Thanks,
Miquèl
---
 drivers/mtd/nand/raw/pl35x-nand-controller.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
index f2c65eb7a8d9..986019b42153 100644
--- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
+++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
@@ -862,8 +862,11 @@ static int pl35x_nfc_setup_interface(struct nand_chip *chip, int cs,
 			  PL35X_SMC_NAND_TAR_CYCLES(tmgs.t_ar) |
 			  PL35X_SMC_NAND_TRR_CYCLES(tmgs.t_rr);
 
-	writel(plnand->timings, nfc->conf_regs + PL35X_SMC_CYCLES);
-	pl35x_smc_update_regs(nfc);
+	/*
+	 * Reset nfc->selected_chip so the next command will cause the timing
+	 * registers to be updated in ->*_select_target().
+	 */
+	nfc->selected_chip = NULL;
 
 	return 0;
 }

-- 
2.53.0

Re: [PATCH 1/3] mtd: rawnand: pl353: Update timings at the right moment

[Olivier Sobrie]

Hello Miquel,

On Fri, May 29, 2026 at 06:29:56PM +0200, Miquel Raynal (DAVE) wrote:
> If several CE are wired, we would write the registers for every chip one
> after the other, and reselect the correct timings for the first chip the
> use wants to use after probe. This is not exactly efficient and could
> slightly be improved since we already have a helper that applies the
> configuration if there is a chip change. Instead of programming the
> registers in ->setup_interface(), let's just drop the pointer to the
> chip and let the nand_select_target() helper do its magic.
> 
> Cc: Olivier Sobrie <olivier@sobrie.be>
> Signed-off-by: Miquel Raynal (DAVE) <miquel.raynal@bootlin.com>
> ---
> Olivier,
> 
> This is an enhancement to your previous patch which already
> works. Can you please tell me if that change is okay for you?

Yes it looks good.
I tested the patch on one of my boards, it works as expected.

Acked-by: Olivier Sobrie <olivier@sobrie.be>
Tested-by: Olivier Sobrie <olivier@sobrie.be>

Thanks,

Olivier

> 
> Thanks,
> Miquèl
> ---
>  drivers/mtd/nand/raw/pl35x-nand-controller.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> index f2c65eb7a8d9..986019b42153 100644
> --- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
> +++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
> @@ -862,8 +862,11 @@ static int pl35x_nfc_setup_interface(struct nand_chip *chip, int cs,
>  			  PL35X_SMC_NAND_TAR_CYCLES(tmgs.t_ar) |
>  			  PL35X_SMC_NAND_TRR_CYCLES(tmgs.t_rr);
>  
> -	writel(plnand->timings, nfc->conf_regs + PL35X_SMC_CYCLES);
> -	pl35x_smc_update_regs(nfc);
> +	/*
> +	 * Reset nfc->selected_chip so the next command will cause the timing
> +	 * registers to be updated in ->*_select_target().
> +	 */
> +	nfc->selected_chip = NULL;
>  
>  	return 0;
>  }
> 
> -- 
> 2.53.0
> 

[PATCH 2/3] mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses

[Miquel Raynal (DAVE)]

Any access not using the hardware ECC engine should be monolithic
because the controller has its very own way of handling the end of a
transaction during operation configuration, so we cannot easily make
repeated reads.

This has the side effect of fixing support for software ECC engines.

Suggested-by: Andrea Scian <andrea.scian@dave.eu>
Cc: stable@vger.kernel.org
Fixes: 08d8c62164a3 ("mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controller")
Signed-off-by: Miquel Raynal (DAVE) <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/raw/pl35x-nand-controller.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
index 986019b42153..a941b5c836a3 100644
--- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
+++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
@@ -917,7 +917,6 @@ static int pl35x_nand_init_hw_ecc_controller(struct pl35x_nandc *nfc,
 	chip->ecc.steps = mtd->writesize / chip->ecc.size;
 	chip->ecc.read_page = pl35x_nand_read_page_hwecc;
 	chip->ecc.write_page = pl35x_nand_write_page_hwecc;
-	chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
 	pl35x_smc_set_ecc_pg_size(nfc, chip, mtd->writesize);
 
 	nfc->ecc_buf = devm_kmalloc(nfc->dev, chip->ecc.bytes * chip->ecc.steps,
@@ -984,7 +983,6 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
 	case NAND_ECC_ENGINE_TYPE_NONE:
 	case NAND_ECC_ENGINE_TYPE_SOFT:
 		dev_dbg(nfc->dev, "Using software ECC (Hamming 1-bit/512B)\n");
-		chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
 		break;
 	case NAND_ECC_ENGINE_TYPE_ON_HOST:
 		dev_dbg(nfc->dev, "Using hardware ECC\n");
@@ -998,6 +996,9 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
 		return -EINVAL;
 	}
 
+	chip->ecc.read_page_raw = nand_monolithic_read_page_raw;
+	chip->ecc.write_page_raw = nand_monolithic_write_page_raw;
+
 	return 0;
 }
 

-- 
2.53.0

[PATCH 3/3] mtd: rawnand: pl353: Fix debug prints

[Miquel Raynal (DAVE)]

They are partially incorrect since "software" engine does not mean
hamming, the "none" cae is also falling into this print, and on-die
means there is some kind of hardware support; we prefer to use the
wording on-host vs. on-die.

Fix all those prints.

Fixes: 1e06dbfdfb85 ("mtd: rawnand: pl353: Add message about ECC mode")
Signed-off-by: Miquel Raynal (DAVE) <miquel.raynal@bootlin.com>
---
 drivers/mtd/nand/raw/pl35x-nand-controller.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/pl35x-nand-controller.c b/drivers/mtd/nand/raw/pl35x-nand-controller.c
index a941b5c836a3..4d4eaa5bdcf7 100644
--- a/drivers/mtd/nand/raw/pl35x-nand-controller.c
+++ b/drivers/mtd/nand/raw/pl35x-nand-controller.c
@@ -975,17 +975,19 @@ static int pl35x_nand_attach_chip(struct nand_chip *chip)
 
 	switch (chip->ecc.engine_type) {
 	case NAND_ECC_ENGINE_TYPE_ON_DIE:
-		dev_dbg(nfc->dev, "Using on-die ECC\n");
+		dev_dbg(nfc->dev, "Using on-die hardware ECC\n");
 		/* Keep these legacy BBT descriptors for ON_DIE situations */
 		chip->bbt_td = &bbt_main_descr;
 		chip->bbt_md = &bbt_mirror_descr;
 		fallthrough;
 	case NAND_ECC_ENGINE_TYPE_NONE:
+		dev_dbg(nfc->dev, "Using no ECC engine\n");
+		break;
 	case NAND_ECC_ENGINE_TYPE_SOFT:
-		dev_dbg(nfc->dev, "Using software ECC (Hamming 1-bit/512B)\n");
+		dev_dbg(nfc->dev, "Using software ECC\n");
 		break;
 	case NAND_ECC_ENGINE_TYPE_ON_HOST:
-		dev_dbg(nfc->dev, "Using hardware ECC\n");
+		dev_dbg(nfc->dev, "Using on-host hardware ECC\n");
 		ret = pl35x_nand_init_hw_ecc_controller(nfc, chip);
 		if (ret)
 			return ret;

-- 
2.53.0

Re: [PATCH 0/3] mtd: rawnand: pl353: Fixes and software ECC support

[Michal Simek]

Hi Venkatesh,

On 5/29/26 18:29, Miquel Raynal (DAVE) wrote:
> Following the previous reports from Andrea, here are a couple of fixes,
> making sure the software ECC support works flawlessly and is compatible
> with U-Boot.
> 
> Link: https://lore.kernel.org/linux-mtd/MI2P293MB02644DC5515E56A2539C65739765A@MI2P293MB0264.ITAP293.PROD.OUTLOOK.COM/
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> Miquel Raynal (DAVE) (3):
>        mtd: rawnand: pl353: Update timings at the right moment
>        mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses
>        mtd: rawnand: pl353: Fix debug prints
> 
>   drivers/mtd/nand/raw/pl35x-nand-controller.c | 20 +++++++++++++-------
>   1 file changed, 13 insertions(+), 7 deletions(-)
> ---
> base-commit: 4691d2a70b587e94717820d96a5b55f2b10942b9
> change-id: 20260522-dave-upstream-nand-fixes-5aa6d106e7c3
> 
> Best regards,

Can you please test this and provide results?

Thanks,
Michal

Re: [PATCH 0/3] mtd: rawnand: pl353: Fixes and software ECC support

[Michal Simek]

On 5/29/26 18:29, Miquel Raynal (DAVE) wrote:
> Following the previous reports from Andrea, here are a couple of fixes,
> making sure the software ECC support works flawlessly and is compatible
> with U-Boot.
> 
> Link: https://lore.kernel.org/linux-mtd/MI2P293MB02644DC5515E56A2539C65739765A@MI2P293MB0264.ITAP293.PROD.OUTLOOK.COM/
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> Miquel Raynal (DAVE) (3):
>        mtd: rawnand: pl353: Update timings at the right moment
>        mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses
>        mtd: rawnand: pl353: Fix debug prints
> 
>   drivers/mtd/nand/raw/pl35x-nand-controller.c | 20 +++++++++++++-------
>   1 file changed, 13 insertions(+), 7 deletions(-)
> ---
> base-commit: 4691d2a70b587e94717820d96a5b55f2b10942b9
> change-id: 20260522-dave-upstream-nand-fixes-5aa6d106e7c3
> 
> Best regards,

got information from our testing team that they can't see any issue with this 
series that's why

Acked-by: Michal Simek <michal.simek@amd.com>

Thanks,
Michal

Re: [PATCH 0/3] mtd: rawnand: pl353: Fixes and software ECC support

[Miquel Raynal]

On Fri, 29 May 2026 18:29:55 +0200, Miquel Raynal (DAVE) wrote:
> Following the previous reports from Andrea, here are a couple of fixes,
> making sure the software ECC support works flawlessly and is compatible
> with U-Boot.
> 
> Link: https://lore.kernel.org/linux-mtd/MI2P293MB02644DC5515E56A2539C65739765A@MI2P293MB0264.ITAP293.PROD.OUTLOOK.COM/
> 
> 
> [...]

Applied to nand/next, thanks!

[1/3] mtd: rawnand: pl353: Update timings at the right moment
      commit: ee60be8929c7badf1194e3149a8aef930cfd77b8
[2/3] mtd: rawnand: pl353: Make sure we use the monolithic helpers for raw accesses
      commit: 80ecacd054ffeb60cd28e46ed5cd6bd0d2de318b
[3/3] mtd: rawnand: pl353: Fix debug prints
      commit: 2b7baaddf1bc3e39206a0354449fdc349945b86b

Patche(s) should be available on mtd/linux.git and will be
part of the next PR (provided that no robot complains by then).

Kind regards,
Miquèl