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From: "Kumar, Udit" <u-kumar1@ti.com>
To: Sai Sree Kartheek Adivi <s-adivi@ti.com>, <nm@ti.com>,
	<vigneshr@ti.com>, <kristo@kernel.org>, <robh@kernel.org>,
	<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <hnagalla@ti.com>, <jm@ti.com>, <u-kumar1@ti.com>
Subject: Re: [PATCH 1/2] arm64: dts: ti: k3-am62p: Add MCU SRAM node
Date: Wed, 30 Sep 2026 09:26:48 +0530	[thread overview]
Message-ID: <e33193b3-90c4-42f2-8377-e9f2862bae9c@ti.com> (raw)
In-Reply-To: <20260928032221.1072316-2-s-adivi@ti.com>



On 9/28/2026 8:52 AM, Sai Sree Kartheek Adivi wrote:
> From: Hari Nagalla <hnagalla@ti.com>
> 
> AM62P devices have two banks of 256KB each SRAM in MCU domain. This
> memory is typically used by MCU R5 firmware for low latency accesses.
> 

> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> Signed-off-by: Judith Mendez <jm@ti.com>
> Signed-off-by: Sai Sree Kartheek Adivi <s-adivi@ti.com>
> ---
>  .../arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
> index 2394a4fb5a94c..278404cadcd98 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi
> @@ -6,6 +6,18 @@
>   */
>  
>  &cbass_mcu {
> +	mcu_ram: sram@79100000 {
> +		compatible = "mmio-sram";
> +		reg = <0x00 0x79100000 0x00 0x80000>;
> +		ranges = <0x00 0x00 0x79100000 0x80000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +

commit message says, 2 banks of 256Kb, Here you have only 1 block.
Please add description, why you are adding 1 block only

> +		mcu1-sram@0 {
> +			reg = <0x0 0x80000>;
> +		};

what is use of this ?,

If you really need this then, please make it block of 256Kb (something
like below)

mcu-sram-0 {
 			reg = <0x0 0x40000>;
 		};

mcu-sram-1 {
			reg = <0x40000 0x40000>;
		};


> +	};
> +
>  	mcu_pmx0: pinctrl@4084000 {
>  		compatible = "pinctrl-single";
>  		reg = <0x00 0x04084000 0x00 0x88>;


  reply	other threads:[~2026-09-30  3:57 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-28  3:22 [PATCH 0/2] k3-am62p: Add MCU SRAM node and Reserve RTOS IPC memory Sai Sree Kartheek Adivi
2026-09-28  3:22 ` [PATCH 1/2] arm64: dts: ti: k3-am62p: Add MCU SRAM node Sai Sree Kartheek Adivi
2026-09-30  3:56   ` Kumar, Udit [this message]
2026-09-28  3:22 ` [PATCH 2/2] arm64: dts: ti: k3-am62p-ti-ipc-firmware: Reserve RTOS IPC memory Sai Sree Kartheek Adivi

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