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From: Guenter Roeck <linux@roeck-us.net>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	linux-pci@vger.kernel.org,
	"Michał Winiarski" <michal.winiarski@intel.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	LKML <linux-kernel@vger.kernel.org>,
	"Mika Westerberg" <mika.westerberg@linux.intel.com>
Subject: Re: [PATCH 24/25] PCI: Perform reset_resource() and build fail list in sync
Date: Tue, 1 Apr 2025 06:28:51 -0700	[thread overview]
Message-ID: <e54e87cb-5f40-4e7e-8f88-fb08746b701b@roeck-us.net> (raw)
In-Reply-To: <75f74b48-edd8-7d1c-d303-1222d12e3812@linux.intel.com>

On 4/1/25 03:18, Ilpo Järvinen wrote:
> On Mon, 31 Mar 2025, Guenter Roeck wrote:
>> On Mon, Dec 16, 2024 at 07:56:31PM +0200, Ilpo Järvinen wrote:
>>> Resetting resource is problematic as it prevent attempting to allocate
>>> the resource later, unless something in between restores the resource.
>>> Similarly, if fail_head does not contain all resources that were reset,
>>> those resource cannot be restored later.
>>>
>>> The entire reset/restore cycle adds complexity and leaving resources
>>> into reseted state causes issues to other code such as for checks done
>>> in pci_enable_resources(). Take a small step towards not resetting
>>> resources by delaying reset until the end of resource assignment and
>>> build failure list (fail_head) in sync with the reset to avoid leaving
>>> behind resources that cannot be restored (for the case where the caller
>>> provides fail_head in the first place to allow restore somewhere in the
>>> callchain, as is not all callers pass non-NULL fail_head).
>>>
>>> The Expansion ROM check is temporarily left in place while building the
>>> failure list until the upcoming change which reworks optional resource
>>> handling.
>>>
>>> Ideally, whole resource reset could be removed but doing that in a big
>>> step would make the impact non-tractable due to complexity of all
>>> related code.
>>>
>>> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
>>
>> With this patch in the mainline kernel, all mips:boston qemu emulations
>> fail when running a 64-bit little endian configuration (64r6el_defconfig).
>>
>> The problem is that the PCI based IDE/ATA controller is not initialized.
>> There are a number of pci error messages.
>>
>> pci_bus 0002:01: extended config space not accessible
>> pci 0002:01:00.0: [8086:2922] type 00 class 0x010601 conventional PCI endpoint
>> pci 0002:01:00.0: BAR 4 [io  0x0000-0x001f]
>> pci 0002:01:00.0: BAR 5 [mem 0x00000000-0x00000fff]
>> pci 0002:00:00.0: PCI bridge to [bus 01-ff]
>> pci_bus 0002:01: busn_res: [bus 01-ff] end is updated to 01
>> pci 0002:00:00.0: bridge window [mem 0x16000000-0x160fffff]: assigned
>> pci 0002:00:00.0: bridge window [mem size 0x00100000 64bit pref]: can't assign; no space
>> pci 0002:00:00.0: bridge window [mem size 0x00100000 64bit pref]: failed to assign
>> pci 0002:00:00.0: bridge window [io  size 0x1000]: can't assign; no space
>> pci 0002:00:00.0: bridge window [io  size 0x1000]: failed to assign
>> pci 0002:00:00.0: bridge window [mem size 0x00100000]: can't assign; bogus alignment
>> pci 0002:00:00.0: bridge window [mem 0x16000000-0x160fffff 64bit pref]: assigned
>> pci 0002:00:00.0: bridge window [io  size 0x1000]: can't assign; no space
>> pci 0002:00:00.0: bridge window [io  size 0x1000]: failed to assign
>> pci 0002:01:00.0: BAR 5 [mem size 0x00001000]: can't assign; no space
>> pci 0002:01:00.0: BAR 5 [mem size 0x00001000]: failed to assign
>> pci 0002:01:00.0: BAR 4 [io  size 0x0020]: can't assign; no space
>> pci 0002:01:00.0: BAR 4 [io  size 0x0020]: failed to assign
>> pci 0002:01:00.0: BAR 5 [mem size 0x00001000]: can't assign; no space
>> pci 0002:01:00.0: BAR 5 [mem size 0x00001000]: failed to assign
>> pci 0002:01:00.0: BAR 4 [io  size 0x0020]: can't assign; no space
>> pci 0002:01:00.0: BAR 4 [io  size 0x0020]: failed to assign
>> pci 0002:00:00.0: PCI bridge to [bus 01]
>> pci 0002:00:00.0:   bridge window [mem 0x16000000-0x160fffff 64bit pref]
>> pci_bus 0002:00: Some PCI device resources are unassigned, try booting with pci=realloc
>> pci_bus 0002:00: resource 4 [mem 0x16000000-0x160fffff]
>> pci_bus 0002:01: resource 2 [mem 0x16000000-0x160fffff 64bit pref]
>> ...
>> pci 0002:00:00.0: enabling device (0000 -> 0002)
>> ahci 0002:01:00.0: probe with driver ahci failed with error -12
>>
>> Bisect points to this patch. Reverting it together with "PCI: Rework
>> optional resource handling" fixes the problem. For comparison, after
>> reverting the offending patches, the log messages are as follows.
>>
>> pci_bus 0002:00: root bus resource [bus 00-ff]
>> pci_bus 0002:00: root bus resource [mem 0x16000000-0x160fffff]
>> pci 0002:00:00.0: [10ee:7021] type 01 class 0x060400 PCIe Root Complex Integrated Endpoint
>> pci 0002:00:00.0: PCI bridge to [bus 00]
>> pci 0002:00:00.0:   bridge window [io  0x0000-0x0fff]
>> pci 0002:00:00.0:   bridge window [mem 0x00000000-0x000fffff]
>> pci 0002:00:00.0:   bridge window [mem 0x00000000-0x000fffff 64bit pref]
>> pci 0002:00:00.0: enabling Extended Tags
>> pci 0002:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
>> pci_bus 0002:01: extended config space not accessible
>> pci 0002:01:00.0: [8086:2922] type 00 class 0x010601 conventional PCI endpoint
>> pci 0002:01:00.0: BAR 4 [io  0x0000-0x001f]
>> pci 0002:01:00.0: BAR 5 [mem 0x00000000-0x00000fff]
>> pci 0002:00:00.0: PCI bridge to [bus 01-ff]
>> pci_bus 0002:01: busn_res: [bus 01-ff] end is updated to 01
>> pci 0002:00:00.0: bridge window [mem 0x16000000-0x160fffff]: assigned
>> pci 0002:00:00.0: bridge window [mem size 0x00100000 64bit pref]: can't assign; no space
>> pci 0002:00:00.0: bridge window [mem size 0x00100000 64bit pref]: failed to assign
>> pci 0002:00:00.0: bridge window [io  size 0x1000]: can't assign; no space
>> pci 0002:00:00.0: bridge window [io  size 0x1000]: failed to assign
>> pci 0002:01:00.0: BAR 5 [mem 0x16000000-0x16000fff]: assigned
>> pci 0002:01:00.0: BAR 4 [io  size 0x0020]: can't assign; no space
>> pci 0002:01:00.0: BAR 4 [io  size 0x0020]: failed to assign
>> pci 0002:00:00.0: PCI bridge to [bus 01]
>> pci 0002:00:00.0:   bridge window [mem 0x16000000-0x160fffff]
>> pci_bus 0002:00: Some PCI device resources are unassigned, try booting with pci=realloc
>> pci_bus 0002:00: resource 4 [mem 0x16000000-0x160fffff]
>> pci_bus 0002:01: resource 1 [mem 0x16000000-0x160fffff]
>> ...
>> pci 0002:00:00.0: enabling device (0000 -> 0002)
>> ahci 0002:01:00.0: enabling device (0000 -> 0002)
>> ahci 0002:01:00.0: AHCI vers 0001.0000, 32 command slots, 1.5 Gbps, SATA mode
>> ahci 0002:01:00.0: 6/6 ports implemented (port mask 0x3f)
>> ahci 0002:01:00.0: flags: 64bit ncq only
> 
> Hi,
> 
> Thanks for reporting. Please add this to the command line to get the
> resource releasing between the steps to show:
> 
> dyndbg="file drivers/pci/setup-bus.c +p"
> 
> Also, the log snippet just shows it fails but it is impossible to know
> from it why the resource assigments do not fit so could you please provide
> a complete dmesg logs. Also providing the contents of /proc/iomem from the
> working case would save me quite a bit of decoding the iomem layout from
> the dmesgs.
> 

You should find everything you need at http://server.roeck-us.net/qemu/mipsel64/.
Please let me know if you need anything else.

Thanks,
Guenter


  parent reply	other threads:[~2025-04-01 13:28 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-16 17:56 [PATCH 00/25] PCI: Resource fitting/assignment fixes and cleanups Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 01/25] PCI: Remove add_align overwrite unrelated to size0 Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 02/25] PCI: size0 is unrelated to add_align Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 03/25] PCI: Simplify size1 assignment logic Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 04/25] PCI: Optional bridge window size too may need relaxing Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 05/25] PCI: Fix old_size lower bound in calculate_iosize() too Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 06/25] PCI: Use SZ_* instead of literals in setup-bus.c Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 07/25] PCI: resource_set_range/size() conversions Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 08/25] PCI: Add a helper to identify IOV resources Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 09/25] PCI: Check resource_size() separately Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 10/25] PCI: Add pci_resource_num() helper Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 11/25] PCI: Add dev & res local variables to resource assignment funcs Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 12/25] PCI: Converge return paths in __assign_resources_sorted() Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 13/25] PCI: Refactor pdev_sort_resources() & __dev_sort_resources() Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 14/25] PCI: Use while loop and break instead of gotos Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 15/25] PCI: Rename retval to ret Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 16/25] PCI: Consolidate assignment loop next round preparation Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 17/25] PCI: Remove wrong comment from pci_reassign_resource() Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 18/25] PCI: Add restore_dev_resource() Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 19/25] PCI: Extend enable to check for any optional resource Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 20/25] PCI: Always have realloc_head in __assign_resources_sorted() Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 21/25] PCI: Indicate optional resource assignment failures Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 22/25] PCI: Add debug print when releasing resources before retry Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 23/25] PCI: Use res->parent to check is resource is assigned Ilpo Järvinen
2024-12-16 17:56 ` [PATCH 24/25] PCI: Perform reset_resource() and build fail list in sync Ilpo Järvinen
2025-04-01  2:35   ` Guenter Roeck
2025-04-01 10:18     ` Ilpo Järvinen
2025-04-01 12:07       ` Ilpo Järvinen
2025-04-01 14:15         ` Guenter Roeck
2025-04-01 17:38           ` Ilpo Järvinen
2025-04-11 19:37             ` Ondřej Jirman
2025-04-14  9:52               ` Ilpo Järvinen
2025-04-14 12:19                 ` Ondřej Jirman
2025-04-14 13:15                   ` Ilpo Järvinen
2025-04-14 13:43                     ` Ondřej Jirman
2025-04-14 13:52                       ` Ilpo Järvinen
2025-04-01 13:28       ` Guenter Roeck [this message]
2025-05-06 15:03   ` Tudor Ambarus
2025-05-06 15:53     ` Ilpo Järvinen
2025-05-28 11:22       ` Tudor Ambarus
2025-05-28 11:39         ` Tudor Ambarus
2025-05-28 13:09           ` Tudor Ambarus
2025-05-30  6:55             ` Ilpo Järvinen
2025-05-30  6:38         ` Ilpo Järvinen
2025-05-30 14:48           ` Ilpo Järvinen
2025-06-02 14:40             ` Tudor Ambarus
2025-06-02 15:08               ` Ilpo Järvinen
2025-06-02 18:42                 ` Tudor Ambarus
2025-06-03  8:13                   ` Ilpo Järvinen
2025-06-03 10:36                     ` Tudor Ambarus
2025-06-03 10:48                       ` Tudor Ambarus
2025-06-03 11:43                         ` Tudor Ambarus
2025-06-03 14:23                           ` Ilpo Järvinen
2025-06-03 14:43                             ` Ilpo Järvinen
2025-06-03 14:13                       ` Ilpo Järvinen
2025-06-03 15:25                         ` Tudor Ambarus
2025-06-03 17:03                           ` Ilpo Järvinen
2025-06-03 17:09                             ` Ilpo Järvinen
2025-06-02 12:32           ` Tudor Ambarus
2025-06-19  0:30   ` D Scott Phillips
2025-06-24 12:48     ` Ilpo Järvinen
2025-06-25 17:45     ` Ilpo Järvinen
2025-06-25 20:33       ` D Scott Phillips
2025-06-26  9:22         ` Ilpo Järvinen
2025-06-26 14:53           ` D Scott Phillips
2024-12-16 17:56 ` [PATCH 25/25] PCI: Rework optional resource handling Ilpo Järvinen
2025-02-13 21:46 ` [PATCH 00/25] PCI: Resource fitting/assignment fixes and cleanups Bjorn Helgaas
2025-02-14  8:18 ` Xiaochun XC17 Li | 李小春 Xavier
2025-02-14 11:53   ` Ilpo Järvinen
2025-02-14 21:28     ` Bjorn Helgaas
2025-02-14  9:59 ` Xiaochun Lee

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